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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63193 )
Change subject: tests: assert pathname and flags when calling open()
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63193/comment/50af6ea3_b183ed98
PS2, Line 19: Signed-off-by: Daniel Campello <campello(a)chromium.org>
Co-Author:
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Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/62783 )
Change subject: ichspi: Add support for Meteor Lake
......................................................................
ichspi: Add support for Meteor Lake
This patch adds Meteor Lake support into flashrom.
Additionally, utilize CSSO (CPU Soft Strap Offset) to uniquely detect
the chipset when the CSSL (CPU Soft Strap Length) field default value
(0x03) on Meteor Lake is the same as Elkhart Lake.
BUG=b:224325352
TEST=Flashrom is able to detect MTL SPI DID and show chipset name as below:
> flashrom --flash-name
....
Found chipset "Intel Meteor Lake-P/M".
....
> flashrom - internal --ifd -i fd -i bios -r /tmp/bios.rom
....
Reading ich_descriptor... done.
Assuming chipset 'Meteor Lake'.
Using regions: "bios", "fd".
Reading flash... done.
SUCCESS
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I0a2ffe2ba8d96c90d89b77e0d8583d179ff02a75
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62783
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim(a)intel.com>
Reviewed-by: Sam McNally <sammc(a)google.com>
---
M chipset_enable.c
M ich_descriptors.c
M ichspi.c
M programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
5 files changed, 38 insertions(+), 6 deletions(-)
Approvals:
build bot (Jenkins): Verified
Wonkyu Kim: Looks good to me, approved
Edward O'Callaghan: Looks good to me, approved
Sam McNally: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c
index 1cb1700..b050f64 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -606,6 +606,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_ELKHART_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -711,6 +712,7 @@
break;
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
boot_straps = boot_straps_pch500;
break;
case CHIPSET_APOLLO_LAKE:
@@ -744,6 +746,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -1002,6 +1005,11 @@
return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_600_SERIES_ALDER_POINT);
}
+static int enable_flash_mtl(struct pci_dev *const dev, const char *const name)
+{
+ return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_METEOR_LAKE);
+}
+
static int enable_flash_mcc(struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE);
@@ -2151,6 +2159,7 @@
{0x8086, 0x438b, B_S, DEP, "Intel", "HM570", enable_flash_pch500},
{0x8086, 0x54a4, B_S, DEP, "Intel", "Alder Lake-N", enable_flash_pch600},
{0x8086, 0x51a4, B_S, DEP, "Intel", "Alder Lake-P", enable_flash_pch600},
+ {0x8086, 0x7e23, B_S, DEP, "Intel", "Meteor Lake-P/M", enable_flash_mtl},
#endif
{0},
};
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 256224d..7c03499 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -47,6 +47,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_ELKHART_LAKE:
return 16;
case CHIPSET_100_SERIES_SUNRISE_POINT:
@@ -74,6 +75,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
if (cont->NM <= MAX_NUM_MASTERS)
@@ -113,7 +115,7 @@
"8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg",
"9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point",
"C620 series Lewisburg", "300 series Cannon Point", "400 series Comet Point",
- "500 series Tiger Point", "600 series Alder Point", "Apollo Lake", "Gemini Lake", "Elkhart Lake",
+ "500 series Tiger Point", "600 series Alder Point", "Meteor Lake", "Apollo Lake", "Gemini Lake", "Elkhart Lake",
};
if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
cs = 0;
@@ -209,6 +211,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE: {
@@ -304,6 +307,7 @@
return freq_str[2][value];
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
return freq_str[3][value];
case CHIPSET_ELKHART_LAKE:
return freq_str[4][value];
@@ -351,6 +355,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -476,7 +481,8 @@
cs == CHIPSET_300_SERIES_CANNON_POINT ||
cs == CHIPSET_400_SERIES_COMET_POINT ||
cs == CHIPSET_500_SERIES_TIGER_POINT ||
- cs == CHIPSET_600_SERIES_ALDER_POINT) {
+ cs == CHIPSET_600_SERIES_ALDER_POINT ||
+ cs == CHIPSET_METEOR_LAKE) {
const char *const master_names[] = {
"BIOS", "ME", "GbE", "unknown", "EC",
};
@@ -1039,8 +1045,12 @@
return CHIPSET_500_SERIES_TIGER_POINT;
if (content->CSSL == 0x14)
return CHIPSET_600_SERIES_ALDER_POINT;
- if (content->CSSL == 0x03)
- return CHIPSET_ELKHART_LAKE;
+ if (content->CSSL == 0x03) {
+ if (content->CSSO == 0x70)
+ return CHIPSET_METEOR_LAKE;
+ else
+ return CHIPSET_ELKHART_LAKE;
+ }
msg_pwarn("Unknown flash descriptor, assuming 500 series compatibility.\n");
return CHIPSET_500_SERIES_TIGER_POINT;
}
@@ -1063,6 +1073,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
/* `freq_read` was repurposed, so can't check on it any more. */
@@ -1220,6 +1231,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -1260,6 +1272,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
diff --git a/ichspi.c b/ichspi.c
index 9f45ec2..a377247 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1799,6 +1799,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -1836,6 +1837,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -1895,6 +1897,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -1973,6 +1976,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_BAYTRAIL:
@@ -2010,6 +2014,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -2053,8 +2058,9 @@
if (ich_spi_mode == ich_auto &&
(ich_gen == CHIPSET_APOLLO_LAKE ||
ich_gen == CHIPSET_GEMINI_LAKE ||
- ich_gen == CHIPSET_ELKHART_LAKE)) {
- msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Elkhart Lake.\n");
+ ich_gen == CHIPSET_ELKHART_LAKE ||
+ ich_gen == CHIPSET_METEOR_LAKE)) {
+ msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Elkhart/Meteor Lake.\n");
ich_spi_mode = ich_hwseq;
}
diff --git a/programmer.h b/programmer.h
index c79422c..33cbcc7 100644
--- a/programmer.h
+++ b/programmer.h
@@ -352,6 +352,7 @@
CHIPSET_400_SERIES_COMET_POINT,
CHIPSET_500_SERIES_TIGER_POINT,
CHIPSET_600_SERIES_ALDER_POINT,
+ CHIPSET_METEOR_LAKE,
CHIPSET_APOLLO_LAKE,
CHIPSET_GEMINI_LAKE,
CHIPSET_ELKHART_LAKE,
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c
index 532a1fb..13a1897 100644
--- a/util/ich_descriptors_tool/ich_descriptors_tool.c
+++ b/util/ich_descriptors_tool/ich_descriptors_tool.c
@@ -128,6 +128,7 @@
"\t- \"silvermont\" for chipsets from Intel's Silvermont architecture (e.g. Bay Trail),\n"
"\t- \"apollo\" for Intel's Apollo Lake SoC.\n"
"\t- \"gemini\" for Intel's Gemini Lake SoC.\n"
+"\t- \"meteor\" for Intel's Meteor Lake SoC.\n"
"\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n"
"\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n"
"\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n"
@@ -243,6 +244,8 @@
cs = CHIPSET_GEMINI_LAKE;
else if (strcmp(csn, "elkhart") == 0)
cs = CHIPSET_ELKHART_LAKE;
+ else if (strcmp(csn, "meteor") == 0)
+ cs = CHIPSET_METEOR_LAKE;
}
ret = read_ich_descriptors_from_dump(buf, len, &cs, &desc);
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Hello build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/63193
to look at the new patch set (#2).
Change subject: tests: assert pathname and flags when calling open()
......................................................................
tests: assert pathname and flags when calling open()
With this change the wrappers for mock and friends are able to take an
optional io_mock_open_state struct to assert expected pathnames and
flags whenever an open operation is called.
Based partially on https://review.coreboot.org/c/flashrom/+/62319/5
BUG=b:227404721,b:217629892,b:215255210
TEST=./test_build.sh; FEATURES=test emerge-amd64-generic flashrom
BRANCH=none
Signed-off-by: Daniel Campello <campello(a)chromium.org>
Change-Id: Ib6bac051852aea2465665a6fd669b7f5e3772985
---
M tests/include/test.h
M tests/io_mock.h
M tests/lifecycle.c
M tests/tests.c
4 files changed, 41 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/93/63193/2
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Daniel Campello has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62318 )
Change subject: tests/linux_mtd: Allow for checking open() calls
......................................................................
Patch Set 4:
(1 comment)
File tests/lifecycle.c:
https://review.coreboot.org/c/flashrom/+/62318/comment/c52289a1_4e31d7ff
PS4, Line 267: NULL
I gather from this that open is actually not called here?
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Change subject: tests/linux_spi: Validate param file path
......................................................................
Patch Set 5:
(1 comment)
File tests/wraps.c:
https://review.coreboot.org/c/flashrom/+/62319/comment/0dff6c74_fc09ee98
PS5, Line 26: assert_int_equal(flags & io_state->flags, io_state->flags);
flags may be different for each path
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63135 )
Change subject: linux_mtd: Allow to open parition by name
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File linux_mtd.c:
https://review.coreboot.org/c/flashrom/+/63135/comment/93542ace_f737251c
PS1, Line 376: sysfs_path[32], device_name[32]
> Copied from above function.
I see, it looks rather arbitrary.
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Change subject: linux_mtd: Allow to open parition by name
......................................................................
Patch Set 1:
(1 comment)
File linux_mtd.c:
https://review.coreboot.org/c/flashrom/+/63135/comment/7f435f45_d1cc2482
PS1, Line 376: sysfs_path[32], device_name[32]
> Where do the sizes come from?
Copied from above function.
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Change subject: ich_descriptors.c: Ensure unsigned types >=0 on to prevent underflow
......................................................................
Patch Set 16:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/62764/comment/91ad3254_81af10e0
PS14, Line 501: for (j = 0; j < (size_t)min(num_regions, 12); j++)
> Not sure why you don't believe it is the max bounds in this case?
Because the second loop (the one which is modified in the patch) starts with 12, and runs until num_regions. So 12 is a starting point of the loop, not the maximum. We can't use "max" in the name.
I want to understand what exactly this 12 means.
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62318 )
Change subject: tests/linux_mtd: Allow for checking open() calls
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
> I suppose the intention here was to use the new fallback_open method here
I could however linux_mtd was a little different in subtle ways so I special cased it.
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