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Change subject: dmi.c: Hide has_dmi_support global behind method
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Patchset:
PS2:
I'm a little bit consent about the new naming. It sounds like a check if a dmi has support for something. what about dmi_(is_)supported or dmi_available?
+1 for the encapsulation of the global variable
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Change subject: pcidev.c: Simplify by consolidating common logic
......................................................................
Patch Set 5:
(4 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/59281/comment/d845c6f7_79082e8a
PS5, Line 9: As observed by Angel Pos, It looks like `pci_filter_init()`
typo: Pons
https://review.coreboot.org/c/flashrom/+/59281/comment/ee63a873_ceeff5e1
PS5, Line 10: initialises the device ID to -1
What is resulting action from this fact?
File pcidev.c:
https://review.coreboot.org/c/flashrom/+/59281/comment/bb6e80b4_5ae14b3a
PS5, Line 166: struct pci_dev *pcidev_find_vendorclass(uint16_t vendor, uint16_t devclass)
The new implementation tests only the first pci device from a vendor on it's class. The old implementation loops through all devices from a vendor.
https://review.coreboot.org/c/flashrom/+/59281/comment/5eb1d281_c9e35a88
PS5, Line 168: struct pci_dev *temp = pcidev_find(vendor, -1);
Please comment here why to use -1 and it's special meaning. When reading the code later its easier to understand it without digging into the git log or libpci implementation. Maybe:
/* libpci uses -1 as uninitialized filter value. Initializing only the vendor will give us... */
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Change subject: pcidev: Move pci_dev_find() from internal to canonical place
......................................................................
Patch Set 6: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/59280/comment/b4521518_8ec375ac
PS6, Line 9: Squash in,
Nit, align text with previous commit in chain. They do the same thing, only for different functions.
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Change subject: pcidev: Move pci_card_find() from internal to canonical place
......................................................................
Patch Set 7: Code-Review+2
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Change subject: tests: Remove mock struct pci_dev, use real pci symbols in tests
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
Nit: For the future: can we have standalone mock headers for usb, pci, hwaccess, ...? That we could build and test a not CONFIG_EVERYTHING version of flashrom? (Just an idea, I'm not familiar with cmocka)
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Change subject: libflashrom,linux_mtd: add linux_mtd writeprotect support
......................................................................
Patch Set 33: Code-Review+1
(1 comment)
File libflashrom.c:
https://review.coreboot.org/c/flashrom/+/61897/comment/3281d25c_26a02f03
PS33, Line 720: if (flash->mst->buses_supported & BUS_PROG) {
: if (flash->mst->opaque.wp_write_cfg)
Is there a reason why this is not in one combined conditional and then the body can be without braces?
Same question for two more below.
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Change subject: spi25_statusreg: inline spi_write_register_flag()
......................................................................
Patch Set 63:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/59528/comment/8f1d9245_361f2593
PS62, Line 19: flashrom -{r,w,E}
> I have one question: to run the code changed by this patch, is any chip fine for that, or should it […]
Thanks, that's a good point. I tested it byt running commands that read and wrote both SR1 and SR2.
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/62643
to look at the new patch set (#6).
Change subject: writeprotect.c: refactor and fix wp_mode functions
......................................................................
writeprotect.c: refactor and fix wp_mode functions
Use a lookup table in get_wp_mode() and drop the srp_bit_present check,
since a chip without SRP is just FLASHROM_WP_MODE_DISABLED.
Add a srp_bit_present check to set_wp_mode() if the mode requires it.
BUG=b:182223106
BRANCH=none
TEST=flashrom --wp-{enable,disable,status} on AMD dut
Change-Id: Ib6c347453f9216e5816e4ed35bf9783fd3c720e0
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M writeprotect.c
1 file changed, 13 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/43/62643/6
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