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Change subject: ichspi: Introduce FCYCLE_MASK(n) macro
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/62891/comment/a388f925_07d30b2e
PS3, Line 12: Also, drops unused macros (PCH100_HSFC_FCYCLE_OFF and
: PCH100_HSFC_FCYCLE).
> Ack
I am slightly confused, you said Ack but haven't changed anything?
If there is a reason why these two things need to be in the same patch, that fine, but you can just reply and explain why, so that everyone understands why things are done in this way.
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/62891/comment/deffce12_1bc58dbb
PS3, Line 80: /* Changed HSFC Control bits */
> Ack
I am slightly confused, there were two comments in a row, and you removed not the one I was asking about, is that intentional?
It was
/* Changed HSFC Control bits */ <-- I thought this can be removed with the code?
<patch removes two lines from here>
/* New HSFC Control bit */ <-- But you removed this one instead?
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Change subject: ichspi: Unify timeout (30sec) across all SPI operations
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS5:
> > Just curious, what was the reason for using two different timeouts? […]
Oh I was referring to previous code,
ich_hwseq_block_erase had `uint32_t timeout = 5000 * 1000;`
and for example in
ich_hwseq_write had `uint16_t timeout = 100 * 60;`
tow different values.
and now this patch makes the same timeout everywhere. So I was wondering why there were different values before?
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Change subject: libflashrom,linux_mtd: add linux_mtd writeprotect support
......................................................................
Patch Set 34:
(1 comment)
File libflashrom.c:
https://review.coreboot.org/c/flashrom/+/61897/comment/bdbba5fa_7f879219
PS33, Line 720: if (flash->mst->buses_supported & BUS_PROG) {
: if (flash->mst->opaque.wp_write_cfg)
> Is there a reason why this is not in one combined conditional and then the body can be without brace […]
Done
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Change subject: flashchips.c: add writeprotect support for more chips
......................................................................
Patch Set 26:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/62214/comment/a4eb55f7_06ece8aa
PS25, Line 9: others
> What "others" mean in this context, non-physical chips?
The others were the chips I didn't have available for testing. I've rephrased since this wasn't very clear.
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Change subject: spi25_statusreg: delete spi_read_status_register()
......................................................................
Patch Set 65:
(5 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/59529/comment/54f1edbc_a78825ba
PS63, Line 7: read_status_register
> Looking at the code, it is `spi_read_status_register()` function which is deleted :)
Done
https://review.coreboot.org/c/flashrom/+/59529/comment/3a9b3d02_935cf04a
PS63, Line 7: spi25_statusreg: delete read_status_register()
> Apart from deleting a function, this patch does one more good thing: it propagates error codes (whic […]
Done
https://review.coreboot.org/c/flashrom/+/59529/comment/5eb7c0d1_adf1b075
PS63, Line 8:
> Also, it is worth adding one sentence explaining why the function is deleted, something like "The fu […]
Done
https://review.coreboot.org/c/flashrom/+/59529/comment/63a8a3db_36e791fb
PS63, Line 11: flashrom -{r,w,E}
> Same as for previous patch: maybe a bit more info about chips / or environment where this was tested […]
Done
File spi25.c:
https://review.coreboot.org/c/flashrom/+/59529/comment/d80acd46_7d48025c
PS63, Line 307: 500
> Maybe I forgot and it was discussed before, but where 500 comes from ? Don't know, but maybe it is w […]
Actually now that I look at it again the number of iterations needs to take into account the poll_delay and how long the operation is allowed to take. If we just do 500 iterations it will definitely be enough, but it may wait for too long.
It should probably be another parameter to the function instead.
I've converted it back to an infinite loop with a FIXME since it's beyond the scope of this change.
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#26).
Change subject: flashchips.c: add writeprotect support for more chips
......................................................................
flashchips.c: add writeprotect support for more chips
Chips I had available for testing were tested with all writeprotect
commands and an FT232H adapter. Chips I wasn't able to test were just
checked against the datasheets.
Flashrom Chip name | Chip(s) tested
---------------------------------+----------------------------
AT25SL128A |
EN25QH128 |
GD25LQ128C/GD25LQ128D/GD25LQ128E | GD25LQ128DSIG
GD25LQ64(B) | GD25LQ64CWIG
GD25Q127C/GD25Q128C | GD25Q127CSIG, GD25Q128ESIG
GD25Q256D | GD25Q256DYIG
GD25Q64(B) | GD25Q64CSIG
W25Q128.JW.DTR |
W25Q128.V..M |
W25Q128.W |
W25Q256JV_M |
W25Q256.V |
W25Q64.W |
XM25QH128C |
XM25QH256C |
BUG=b:182223106
BRANCH=none
TEST=flashrom --wp-{enable,disable,range,list,status}
Change-Id: I7f3d4c4148056098a845b5c64308b0333ebda395
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flashchips.c
1 file changed, 138 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/14/62214/26
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59529
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Change subject: spi25_statusreg: delete spi_read_status_register()
......................................................................
spi25_statusreg: delete spi_read_status_register()
Delete the spi_read_status_register() function because the generic
spi_read_register() function can be used instead.
This patch also converts all call sites over to spi_read_register().
A side effect is that error codes are now properly propagated and
checked.
BUG=b:195381327,b:153800563
BRANCH=none
TEST=flashrom -{r,w,E}
TEST=Tested with a W25Q128.W flash on a kasumi (AMD) dut.
Read SR1/SR2 with --wp-status and activated various WP ranges
that toggled bits in both SR1 and SR2.
Change-Id: I146b4b5439872e66c5d33e156451a729d248c7da
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M chipdrivers.h
M it87spi.c
M s25f.c
M spi25.c
M spi25_statusreg.c
5 files changed, 141 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/59529/65
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62948 )
Change subject: tests: Remove mock struct pci_dev, use real pci symbols in tests
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Nit: For the future: can we have standalone mock headers for usb, pci, hwaccess, ... […]
Yes! It came up in the conversations earlier, this is definitely option. And it always remains an option that we can decide and implement at any time. Technically "at any time", practically "at any time when someone has time" :)
Out of the headers you listed, hwaccess is already mocked for tests:
tests/hwaccess_x86_io_unittest.h
which is included in flashrom_test_dep (line number at the time of writing this)
meson.build#L522
So we know it is definitely a working solution, to have mock header for tests.
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