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Change subject: libflashrom: Define macro to detect v1.3 header
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I talked to aklm about unblocking the release. […]
I'm not against doing it this way, but I'm wondering how this gets used. Do we keep this macro forever? or drop it at v1.4 and add a v1.4 macro?
It seems like I as a library user might want to know something like; version is at least 1.4, or version is between 1.5 and 1.6. That sounds complicated with a symbolic macro like this.
`__STDC_VERSION__` is a case study, it is defined to a number (date), so I can test
`#if __STDC_VERSION__ > 202201`
Maybe we could do `#define LIBFLASHROM_VERSION` $MAJOR$MINOR?
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Change subject: libflashrom: Define macro to detect v1.3 header
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> :O it's assigned to me! […]
I talked to aklm about unblocking the release. This is minimal viable to allow for user code to know which API rev it is at least # including.
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Hello build bot (Jenkins), Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/70030
to look at the new patch set (#2).
Change subject: tree/: Make probe_opcode() flashctx argument const
......................................................................
tree/: Make probe_opcode() flashctx argument const
Probing an opcode generally shouldn't involve mutating the flashctx
state and currently no probe_opcode functions do that.
Make the flashctx arg const so that call sites don't need to have a
non-const pointer.
BUG=b:253715389,b:253713774
BRANCH=none
TEST=ninja test
Change-Id: I19e98be50d682de2d2715417f8b7b8c62b871617
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M dummyflasher.c
M ichspi.c
M include/programmer.h
M spi.c
4 files changed, 26 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/70030/2
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Change subject: tree/: Make probe_opcode() flashctx argument const
......................................................................
Patch Set 1:
This change is ready for review.
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Change subject: writeprotect,ichspi,spi25: handle register access constraints
......................................................................
Patch Set 6:
(1 comment)
This change is ready for review.
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/69129/comment/0342556a_3b83e048
PS5, Line 110: (struct flashctx *)
> Isn't this casting away `const` from the data pointed by `flash`?
Indeed, this was a hack to get it working in the cros fork that I forgot about.
I've created a patch to make probe_opcode take a const pointer so we can drop the case here.
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Change subject: internal.c: laptop_ok global state can become stale
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/70026/comment/ec8b2da8_1d2535c0
PS1, Line 30: BUG=b:260518132,b:260518132
> These are both the same.
Done
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Hello Sam McNally, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/70026
to look at the new patch set (#2).
Change subject: internal.c: laptop_ok global state can become stale
......................................................................
internal.c: laptop_ok global state can become stale
Craask and similar DUT's are erroneously probing random second chips.
```
Found chipset "Intel Alder Lake-N".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x003a0000-0x00ffffff) is read-write.
FREG2: Management Engine region (0x00001000-0x0039ffff) is read-write.
OK.
Found Winbond flash chip "W25Q128.V..M" (16384 kB, Programmer-specific) on host.
Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
Found MoselVitelic flash chip "V29C51000T" (64 kB, Parallel) mapped at physical address 0x00000000ffff0000.
```
This seems to be due to `laptop_ok` becoming a stale global state
after the first operation leading to probing on unrelated buses.
Therefore unconditionally reset the global state upon entry into
the internal driver.
BUG=b:260518132,b:260151917
TEST=Craask reportly no longer finds duplicate chip.
Change-Id: I2c00c351904307eeb1488c5dfaffc91d6468ee25
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M internal.c
1 file changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/26/70026/2
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Change subject: ichspi.c: Read chip ID and use it to populate `flash->chip`
......................................................................
Patch Set 3:
(12 comments)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/flashrom/+/69195/comment/6a35c849_e0cabe29
PS2, Line 7: ichspi.c: Read chip ID and use it to identify chip
> Knowing the chip shouldn't matter for hwseq, as we're not sending direct commands anyway. […]
Two flash chips is an interesting case, I think it will always read the ID of the first chip but I don't have any hardware to test with.
https://review.coreboot.org/c/flashrom/+/69195/comment/d353879c_5a095212
PS2, Line 9: BUG=b:253715389,b:253713774
> Ah, so downstream has some extra functionality, probably to control WP on platforms where only hwseq […]
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/e1f58459_2e107666
PS2, Line 11: TEST=builds
> I think you can include this was actually tested here across the DUT pool?
Done
Commit Message:
https://review.coreboot.org/c/flashrom/+/69195/comment/471a1d1c_65f04e34
PS3, Line 21: FIX: w,E
Something about this change causes erase to fail:
```
Found Winbond flash chip "W25Q128.V..M" (16384 kB, Programmer-specific) on internal.
Erasing and writing flash chip... Transaction error between offset 0x00000000 and 0x00000000 (= 0x00000000 + 0)!
Looking for another erase function.
Looking for another erase function.
Looking for another erase function.
Looking for another erase function.
Looking for another erase function.
Looking for another erase function.
Looking for another erase function.
No usable erase functions left.
FAILED!
```
Looks like it's trying to do SPI erase instead of hwseq now. We don't have this issue in cros flashrom so there's probably some additional logic that makes it work, maybe action_descriptor since it mutates erasers a bit. I'll keep debugging.
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/69195/comment/b9ad68a8_da0a28ee
PS2, Line 1472: entry == NULL
> `!entry`
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/bb65953b_71300045
PS2, Line 1475: return 0;
> `return -1;`
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/6efbaad6_c65cce11
PS2, Line 1476: } else {
> no need for a `else` as you have a early return in the `if` branch.
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/ed6ebbd5_6161eede
PS2, Line 1486: flash->chip->tested = entry->tested;
> drop line, it is overwritten in the eulogy of `ich_hwseq_probe()`, the call site of this function.
Wouldn't it be better to keep this and delete the line that overwrites it?
That's what I've done in the latest patchset but let me know if I'm missing something.
https://review.coreboot.org/c/flashrom/+/69195/comment/e36e1217_fa5f9d57
PS2, Line 1492: return 1;
> `return 0;`
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/36f44c0c_0c4b8fcc
PS2, Line 1502: != 1
> `< 0`
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/09d8b060_d1e3cda4
PS2, Line 1503: msg_perr("Unable to read flash chip ID\n");
> drop as you already have a `msg_perr()` call in the func.
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/4df269a8_f21d7b0e
PS2, Line 1552: TEST_OK_PREW;
> https://review.coreboot.org/c/flashrom/+/69518 […]
Done
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