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Change subject: Revert "Add support for Intel Emmitsburg PCH"
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I'm not going to discuss that patch to fix a regression. It was obviously
> merged without proper review.
Ibex Peak is still used as the default when other chipsets aren't found. That's how it worked before the EBG patch.
If you're worried about Ibex Peak, then we should figure out what ISL value to compare with so it's positively identified.
> Forcing people to work for your cause by breaking things and then blocking
> the project is really the worst shitshow.
No need for this. Let's just figure out how to properly detect Ibex Peak, fix this logic, and move on.
BTW, since this logic was broken on EBG (prior to CB:54965) it was probably also broken on LBG and other recent chipsets.
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Change subject: Revert "Add support for Intel Emmitsburg PCH"
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Patch Set 1:
(1 comment)
Patchset:
PS1:
> See comments in CB:54965
I'm not going to discuss that patch to fix a regression. It was obviously
merged without proper review.
Forcing people to work for your cause by breaking things and then blocking
the project is really the worst shitshow. I guess I'll have to move/fork
flashrom away from coreboot.org if this continues.
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Change subject: Revert "Add support for Intel Emmitsburg PCH"
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Patch Set 1:
(1 comment)
Patchset:
PS1:
> Ibex Peak isn't "detected", it's the default when `content->ISL != 16`. […]
See comments in CB:54965
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Change subject: Add support for Intel Emmitsburg PCH
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Patch Set 3:
(2 comments)
Patchset:
PS1:
> I'm not talking about the detection. I mean if anybody checked that
> all the code activated by this patch matches the hardware and descriptor.
> IOW if all the paths chosen for CHIPSET_C620_SERIES_LEWISBURG are
> suitable or just work by chance for rudimentary flashing.
LBG and EBG are generally very similar, if not identical. For our purposes with this patch FLMAP registers are the same layout and have the same default values listed in the SPI PG (document numbers 559021 and 619386).
However, the documentation says PSL should be 0x8B, but Intel's own reference images use 0x80. Some of the older chipsets don't show a default value at all, like the ICH8 and ICH9 (document numbers 547138 and 355845). So unfortunately we can't rely on documentation alone to determine what value to compare against here. The values in this detection logic appear to be guesses based on what shows up in the field. As you suggest, it seems works by chance for rudimentary flashing on all these chipsets.
> Now that I looked at the merged change, it seems obvious that it breaks
> Ibex Peak detection. Its SPI guide is 403598. I'm not sure if Intel still
> keeps these files.
Hmm, I don't see 403598 on developer.intel.com. Not sure if I need to request that doc specifically or if it's just no longer available as you suggest.
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/54965/comment/b2da173d_a525ad43
PS3, Line 943: return CHIPSET_C620_SERIES_LEWISBURG;
> Was this reviewed at all? It assumes that CHIPSET_5_SERIES_IBEX_PEAK […]
OK, so how about if we start using '==' operators?
if (content->ISL == 16)
return CHIPSET_5_SERIES_IBEX_PEAK;
if (content->ISL == 80)
return CHIPSET_C620_SERIES_LEWISBURG;
return CHIPSET_ICH_UNKNOWN;
That will at least get us past the current dilemma.
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Change subject: Revert "Add support for Intel Emmitsburg PCH"
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Patch Set 1: Code-Review-2
(1 comment)
Patchset:
PS1:
Ibex Peak isn't "detected", it's the default when `content->ISL != 16`. The way that if-statement works also assumes no FD will have content->ISL > 16, unless `FLMAP2 == 0` (which isn't true in all cases).
We need to fix Ibex Peak detection or come up with a better handle these ISLs, not prevent other platforms from getting added.
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Change subject: board_enable.c: Add ME unlock function for TUXEDO laptops
......................................................................
Patch Set 8:
(1 comment)
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/56023/comment/3ef037e9_77d92d11
PS2, Line 2339: return 0;
> > if it's always flashrom in single steps […]
s/reboot/poweroff/
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Change subject: board_enable.c: Add ME unlock function for TUXEDO laptops
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Patch Set 8:
(1 comment)
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/56023/comment/3dfd2e63_3eb4296a
PS2, Line 2339: return 0;
> Summary: when you want to flash the IFD/ME region internally. Workflow is: […]
The actual process and requirements seem clear to me. What I don't understand
is the imagined user perspective; what commands the user is supposed to run
and if it's always flashrom in single steps why it has to be like this.
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Change subject: board_enable.c: Add ME unlock function for TUXEDO laptops
......................................................................
Patch Set 8:
(2 comments)
Patchset:
PS7:
> I'm still confused why this is done deep in flashrom on the programmer path […]
Nico: can we keep *that* discussion, where it started, please? :-)
https://review.coreboot.org/c/flashrom/+/56023/2..8/board_enable.c#b2339
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/56023/comment/044615d5_77df3bd2
PS2, Line 2339: return 0;
> Sorry, I thought one had to apply a command (-r -w -v), too, but that's not the case. […]
Summary: when you want to flash the IFD/ME region internally. Workflow is:
- set EC unlock bit and reboot
- EC asserts ifd strap (ME_WE/HDA_SDO)
- user can flash IFD/ME/BIOS
- reboot
- EC deasserts ifd strap
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