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Change subject: ich_descriptors: Explicitly check for Ibex Peak ISL value
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Hi Nico, as per https://doc.coreboot.org/getting_started/gerrit_guidelines. […]
Please mention all changes (and affected paths) in the commit message and argue why they are necessary.
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Change subject: ich_descriptors: Add check for ISL == 139 for LBG
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> I think this patch alone is enough to fix Ibex Peak detection, because of the changed check (the `<= […]
Correct - Since this checks for the exact ISL values we expect for EBG/LBG it should work on those chipsets only. The "default" behavior, which assumes Ibex Peak compatibility, will not be impacted.
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Change subject: ich_descriptors: Explicitly check for Ibex Peak ISL value
......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1:
> This changes more paths than mentioned in the commit message. […]
Hi Nico, as per https://doc.coreboot.org/getting_started/gerrit_guidelines.html, please provide a concrete recommendation here. What exactly would you like to see that will fix this logic for all chipsets? If you don't have time to make a recommendation, please remove your -2 so others can move things along.
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/57580/comment/fffef5c2_77fdf173
PS1, Line 936: == 16
> Maybe I am recognising a false pattern here but are the cases of [11, 15] also IBEX_PEAK? ifdtool. […]
Nico verified that 16 is the correct value for Ibex Peak (the comment is somewhere in CB:54965). I can change this to `<=` if desired.
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Change subject: Revert "Add support for Intel Emmitsburg PCH"
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> BTW, the commit message of the patch being reverted doesn't match what the code does. Specifically: […]
Yeah, `<=` was used to match the pattern in the rest of that code. For example:
if (content->ISL <= 2)
return CHIPSET_ICH9;
if (content->ISL <= 10)
return CHIPSET_ICH10;
This assumes ISL between 3 and 10 maps to ICH10. That is suspicious on its own, but since this is how the logic was written I didn't see a reason to do things differently for newer chips. As I mentioned in the CB:54965 I think we should start using `==` instead for these comparisons.
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Change subject: board_enable.c: Add ME unlock function for Clevo laptops
......................................................................
Patch Set 9:
(1 comment)
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/56023/comment/052639ee_dee0825a
PS2, Line 2339: return 0;
> As a final result I would like to use this functionality to be executed via libflashrom and fwupd. So I can add it as an unlock option, but then we have to add another table of functions, e.g. board_unlock_me.
I would just start with this API. When that is done, a small standalone
tool could be written in 10min I guess. It should be possible to use the
board_status infrastructure without going through the programmer/flash
API. Not sure how much work it would be to separate that, though.
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Hello build bot (Jenkins), Selma Bensaid, Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/57560
to look at the new patch set (#7).
Change subject: chipset_enable.c: Add Ids for recent Intel chipsets
......................................................................
chipset_enable.c: Add Ids for recent Intel chipsets
- Lewisburg, Cannon Lake, Ice Lake, Jasper Lake,
Tiger Lake and Alder Lake
BRANCH=none
TEST=flashrom --programmer internal --flash-name
on ADL-M RVP, returns "Found chipset "Intel Alderlake-P / M"
Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com>
Change-Id: Iff387076567e639485ac15c25c1bcc8c37a07037
---
M chipset_enable.c
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/57560/7
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Change subject: chipset_enable.c: Add Ids for recent Intel chipsets
......................................................................
Patch Set 6:
(5 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/57560/comment/f90acefe_cb60aeba
PS3, Line 9: Geminilake, Cannonlake, Icelake, Jasperlake,
> Also spelled with a space, I believe.
Ack
https://review.coreboot.org/c/flashrom/+/57560/comment/4539d046_24c2c2f0
PS3, Line 10: Alderlake
> Alder Lake
Ack
https://review.coreboot.org/c/flashrom/+/57560/comment/13196951_82fa68e8
PS3, Line 10: Tigerlake
> Tiger Lake
Ack
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/57560/comment/c95baa46_252728a1
PS3, Line 2018: {0x8086, 0x9d24, B_FS, OK, "Intel", "Skylake", enable_flash_pch100}
> This entry will cause a duplicate chipset warning - see https://crrev.com/c/3157025.
Done
https://review.coreboot.org/c/flashrom/+/57560/comment/d08cb06c_950729db
PS3, Line 2020: {0x8086, 0x31f0, B_FS, OK, "Intel", "Geminilake", enable_flash_apl},
> This entry will cause a duplicate chipset warning - see https://crrev.com/c/3157024.
Done
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Hello build bot (Jenkins), Selma Bensaid, Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: chipset_enable.c: Add Ids for recent Intel chipsets
......................................................................
chipset_enable.c: Add Ids for recent Intel chipsets
- Lewisburg, Cannon Lake, Ice Lake, Jasper Lake,
Tiger Lake and Alder Lake
BRANCH=none
TEST= flashrom --programmer internal --flash-name
on ADL-M RVP, returns "Found chipset "Intel Alderlake-P / M"
Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com>
Change-Id: Iff387076567e639485ac15c25c1bcc8c37a07037
---
M chipset_enable.c
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/57560/5
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Change subject: board_enable.c: Add ME unlock function for Clevo laptops
......................................................................
Patch Set 9:
(1 comment)
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/56023/comment/e13ea387_f0716709
PS2, Line 2339: return 0;
> Well, the utility would be part of the flashrom repo, and would be installed alongside flashrom. […]
Ahh! My fault, I somehow thought you meant coreboot/util ;-) Well, in that case I tend to agree :-)
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Change subject: board_enable.c: Add ME unlock function for Clevo laptops
......................................................................
Patch Set 9:
(1 comment)
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/56023/comment/3f8a0a93_7775838e
PS2, Line 2339: return 0;
> Not all people use fwupd, see my previous comment :)
Well, the utility would be part of the flashrom repo, and would be installed alongside flashrom. Am I missing something?
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