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Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
Patch Set 18:
(1 comment)
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/a6ded218_3fa2bf80
PS17, Line 208: 0
> Gladly. Just supply me with the values then please.
0: XDATA (XRAM/registers) with address as FDAT:FBUF
1: eFlash with address as FBF2:FDAT:FBUF
2: CODE (only common bank and bank 0 / 0x0000-0xffff) with address as FDAT:FBUF
4: IRAM/RAM with address as FDAT
not sure if we want them all in flashrom, though, since we only use 0
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Change subject: ich_descriptors: Add check for ISL == 139 for LBG
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
Patchset:
PS3:
I think this patch alone is enough to fix Ibex Peak detection, because of the changed check (the `<= 80` is now `== 80`).
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Change subject: it87spi.c: Enable probing of IT8620
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Patch Set 11: Code-Review+1
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Change subject: Revert "Add support for Intel Emmitsburg PCH"
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Patch to explicitly check for Ibex Peak (using the value of 16 which you've verified), and note that […]
BTW, the commit message of the patch being reverted doesn't match what the code does. Specifically:
Based on ICH descriptor content, choose CHIPSET_C620_SERIES_LEWISBURG
if ISL/PSL is 80.
However, the actual check in the code is `<= 80`, which breaks things.
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Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
Patch Set 18:
(3 comments)
File ite_ec.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/e54b71af_23019d7e
PS11, Line 735: if (!ec_write_reg(0xf9, 0x20, EC_MAX_STATUS_CHECKS) ||
: !ec_write_reg(0xfa, 0x02, EC_MAX_STATUS_CHECKS) ||
: !ec_write_reg(0xfb, 0x00, EC_MAX_STATUS_CHECKS) ||
: !ec_write_reg(0xf8, 0xb1, EC_MAX_STATUS_CHECKS)) {
: msg_perr("Unable to initialize controller.\n");
: return 1;
: }
:
> Added a separate function for this purpose. […]
Done
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/761bdfef_4830bf78
PS14, Line 324: 0xaa
> What zero means in this field then?
zero means `size of 0`, which is "disable", too but only valid when the mirror bit set. When the mirror bit is 0, only 0xaa is valid here, according to the datasheet
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/ae98e5e2_1fb09eff
PS17, Line 142: shutdown
> Shutdown of the programmer not the EC. and Yes, it is wdg reset command that is sent to EC.
Ack
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Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
Patch Set 18:
(1 comment)
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/6a885223_e2aecc46
PS14, Line 90: wait_for_ext_crystal
> When the bit is 0, then it DOESN'T wait for external crystal.
No, it's exactly the other way round. Comment and var name are in conflict.
From the ITE source: "When this bit is set, the internal clock would act as a temporary clock to enable EC to configure some GPIO."
1 == "use internal clock until external crystal is ready" == "do NOT wait for the external crystal but temporarily use the internal UNTIL the external is ready"
in pseudocode:
```
clock = int
while true:
....
if ext_crystal_ready:
clock = int
break
....
```
and
0 == "wait_for_ext_crystal" == "wait for the external crystal to be ready" iow. the chip does sth like this:
```
while !ext_crystal_ready:
nop
...
```
That means the name `wait_for_ext_crystal` must be inverted to
> `no_wait_for_ext_crystal` or `int_osc_until_crystal_ready`
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Change subject: ich_descriptors: Explicitly check for Ibex Peak ISL value
......................................................................
Patch Set 1: Code-Review-2
(1 comment)
Patchset:
PS1:
This changes more paths than mentioned in the commit message.
Please just take a deep breath and read the code, sleep over
it and read it again.
Also, there is a conflicting revert going on. We should get
that in first. Reasoning, patching and reviewing with a sane
base is much easier.
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