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Change subject: ich_descriptors: Add check for ISL == 139 for LBG
......................................................................
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Change subject: ich_descriptors: Explicitly check for Ibex Peak ISL value
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/57437 )
Change subject: tests: Revise mock chip definition and usage
......................................................................
Patch Set 4:
(5 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/57437/comment/4a98c823_50bdcd8d
PS3, Line 7: tests: Make chip definitions static global
> The summary line should somehow cover all the changes. If you […]
Done, I also upgraded commit message to mention everything that is going on here
File tests/chip.c:
https://review.coreboot.org/c/flashrom/+/57437/comment/d78479c2_7112e9c8
PS3, Line 24: #define CHIP_TOTAL_SIZE 8388608
> Please make use of the KiB/MiB macros. This should be `(8*MiB)` (usually […]
Wow useful macros. I didn't know of them, probably because I was looking into flashchips.c which doesn't use those macros.
One thing I wanted to ask: I didn't use macros for chip_W25Q128_V, I wanted it to look closer to flashchips.c definition, am I right?
https://review.coreboot.org/c/flashrom/+/57437/comment/406feaff_0ef53cf2
PS3, Line 24: CHIP_TOTAL_SIZE
> There's another chip below with a different size. Should we name it […]
Done, I only made it a little bit shorter, MOCK_CHIP_SIZE.
https://review.coreboot.org/c/flashrom/+/57437/comment/e0a8b26d_0a6aa52f
PS3, Line 128: static struct flashchip chip_8MiB = {
> Should we make them `const` and then work on a copy on the stack? […]
I followed your advice exactly (made them const, and fresh copy for every test), but please tell me if this implementation is what you had in mind.
For example, it is not a deep copy.
https://review.coreboot.org/c/flashrom/+/57437/comment/9d8d982d_e130299a
PS3, Line 130: .total_size = 8 * 1024,
> CHIP_TOTAL_SIZE / KiB
Done
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/57326 )
Change subject: tests: Add tests to read from chip
......................................................................
Patch Set 4:
(2 comments)
File tests/tests.c:
https://review.coreboot.org/c/flashrom/+/57326/comment/ad5068e5_ded42cc4
PS3, Line 185: len
> This is `nmemb` (according to manpage). `len` is easy to confuse with […]
Done
https://review.coreboot.org/c/flashrom/+/57326/comment/b8d17273_fe4e306a
PS3, Line 188: size * len
> This should return just `len` (actually `nmemb`). It only works because […]
Thank you! I would probably discover this at some point later for some other future test, and it would take much longer time to debug/understand where the mistake is.
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/57326
to look at the new patch set (#4).
Change subject: tests: Add tests to read from chip
......................................................................
tests: Add tests to read from chip
Two tests cover the code which performs do_read operation.
First one works with fake chip and dummy programmer. Fake chip has all
operations defined, and a buffer to emulate chip memory.
Second one uses the chip which is closer to the real one, because
read/write/unlock/erase operations are real. The tests takes the
advantage of dummyflasher's capability of emulating a W25Q128.V chip.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: Ia57781ebc670c7bd6197e56fe8a20651a425c756
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
---
M tests/chip.c
M tests/io_mock.h
M tests/meson.build
M tests/tests.c
M tests/tests.h
5 files changed, 146 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/26/57326/4
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/57437
to look at the new patch set (#4).
Change subject: tests: Revise mock chip definition and usage
......................................................................
tests: Revise mock chip definition and usage
This patch is doing few things:
1) Makes chip definitions static global so that they can be
reused between test functions.
2) Promotes existing mock chip from 8KiB to 8MiB and eraseblocks
are expanded accordingly. Old value of 8KiB was very small and it
was confusing. Mock chip looks more realistic now.
3) Uses KiB and MiB macros from flash.h for mock chip definition
4) Renames CHIP_TOTAL_SIZE to MOCK_CHIP_SIZE to avoid confusion
(there is also a W25Q128.V chip in the tests)
5) Makes chip definitions const so that every test can work on a
fresh copy on the stack.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: Ia9b5fc71e30610684e68e9aca9fb1970da8f840a
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
---
M tests/chip.c
1 file changed, 60 insertions(+), 117 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/57437/4
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: ich_descriptors: Explicitly check for Ibex Peak ISL value
......................................................................
ich_descriptors: Explicitly check for Ibex Peak ISL value
This patch does the following:
- Checks for Ibex Peak more explicitly, as ifdtool currently does.
- Unconditionally print the "peculiar flash descriptor" warning if none
of the chipsets are detected explicitly, since checking `!= 16` is
redundant with the above checks.
Change-Id: I2b6301c6cd08f6822340d61a3454b31fddc3be52
Signed-off-by: David Hendricks <ddaveh(a)amazon.com>
---
M ich_descriptors.c
1 file changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/57633/2
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Hello Jonathan Zhang,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/flashrom/+/57635
to review the following change.
Change subject: Add support for Intel Emmitsburg PCH
......................................................................
Add support for Intel Emmitsburg PCH
This patch does the following:
- Add PCIe ID for Intel Emmitsburg PCH
- Based on ICH descriptor content, choose
CHIPSET_C620_SERIES_LEWISBURG. Although EBG only uses 80 for its PSL
value, LBG on Purley and Whitley use 139. So to cover both cases the
latter is used.
TESTED=tried on a server with Intel Emmitsburg PCH, flash update
was successful. This server, however, does not have flash chip
installed, it instead has em100 emulator connected.
Change-Id: I1edae9163b910c3831adc82c90840fa965479451
Signed-off-by: Jonathan Zhang <jonzhang(a)fb.com>
Signed-off-by: David Hendricks <ddaveh(a)amazon.com>
---
M chipset_enable.c
M ich_descriptors.c
2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/35/57635/1
diff --git a/chipset_enable.c b/chipset_enable.c
index 638c05f..cb0fbf1 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2073,6 +2073,7 @@
{0x8086, 0xa247, B_S, NT, "Intel", "C620 Series Chipset Supersku", enable_flash_c620},
{0x8086, 0xa248, B_S, NT, "Intel", "C620 Series Chipset Supersku", enable_flash_c620},
{0x8086, 0xa249, B_S, NT, "Intel", "C620 Series Chipset Supersku", enable_flash_c620},
+ {0x8086, 0x1bca, B_S, NT, "Intel", "Emmitsburg Chipset SKU", enable_flash_c620},
{0x8086, 0xa2c4, B_S, NT, "Intel", "H270", enable_flash_pch100},
{0x8086, 0xa2c5, B_S, NT, "Intel", "Z270", enable_flash_pch100},
{0x8086, 0xa2c6, B_S, NT, "Intel", "Q270", enable_flash_pch100},
diff --git a/ich_descriptors.c b/ich_descriptors.c
index c3b30a7..652e6e3 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -941,6 +941,9 @@
warn_peculiar_desc(content->ISL != 23, "Gemini Lake");
return CHIPSET_GEMINI_LAKE;
}
+ /* Emmitsburg has 80, Lewisburg on Purley and Whitley has 139 */
+ if (content->ISL <= 139)
+ return CHIPSET_C620_SERIES_LEWISBURG;
/*
* Ibex Peak is historically used as the default when other
* chipsets are not identified.
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David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/57589 )
Change subject: Revert "Add support for Intel Emmitsburg PCH"
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> I think there is a bit of cross talking here.
Indeed, thanks for cutting through it :-)
> Let's just let the revert go though please, please remember commits are just hashes and are free we don't need to fight over this and we can re-land this once you addressed all the comments in a follow up patch that fixes the concerns.
Sure, I've created a follow-up that should address the concerns, incorporating various feedback from this and other patches. LMK what you think.
> Sorry all for the double post, one thing that I forgot to mention. Is there room here to perhaps write a unit-test as well as `guess_ich_chipset()` seems to be a pure function without side-effects?
Seems tedious but doable. AFAICT we'll basically give it one set of constants (ISLs, etc) and expect corresponding constants (CHIPSET_*) as outputs. Is that really valuable, or am I thinking of it incorrectly? Do we have an example that tests a similar function?
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