Attention is currently required from: Nico Huber, Thomas Walker.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52310 )
Change subject: flashchips: Add Spansion/Cypress S25FL256L
......................................................................
Patch Set 4: Code-Review+1
(3 comments)
File spi.h:
https://review.coreboot.org/c/flashrom/+/52310/comment/9d1acb92_35211bdf
PS4, Line 93:
Block Erase 0x53 is only supported by Spansion/Cypress S25FL-L chips. I don't think it's a JEDEC standard, so I wouldn't add these macros.
File spi25.c:
https://review.coreboot.org/c/flashrom/+/52310/comment/569069f9_c3374b21
PS4, Line 491: /* This usually takes 100-4000ms, so wait in 100ms steps. */
Datasheet for S25FL064L says typical is 300 ms, and maximum is 600 ms.
Datasheet for S25FL256L says typical is 190 ms, and maximum is 363 ms.
Without checking any other datasheets, I'd say the 4000 ms in the comment could be lowered to 1000 ms.
https://review.coreboot.org/c/flashrom/+/52310/comment/0aa668bc_2ec59718
PS4, Line 621: return &spi_block_erase_52;
Add an entry here too?
--
To view, visit https://review.coreboot.org/c/flashrom/+/52310
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I4e8cba554d0590c94dac92aa91e9ab400efca281
Gerrit-Change-Number: 52310
Gerrit-PatchSet: 4
Gerrit-Owner: Thomas Walker <thh.walker(a)gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Nico Huber <nico.h(a)gmx.de>
Gerrit-Attention: Thomas Walker <thh.walker(a)gmail.com>
Gerrit-Comment-Date: Fri, 16 Apr 2021 09:44:18 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Victor Ding, Anastasia Klimchuk.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52406 )
Change subject: ene_lpc.c: Moving register_shutdown at the end of initialisation
......................................................................
Patch Set 1: Code-Review+2
--
To view, visit https://review.coreboot.org/c/flashrom/+/52406
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: If89a758c91c77486adbac2779449bcd71ab8fc78
Gerrit-Change-Number: 52406
Gerrit-PatchSet: 1
Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Victor Ding <victording(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-CC: Nico Huber <nico.h(a)gmx.de>
Gerrit-CC: Sam McNally <sammc(a)google.com>
Gerrit-Attention: Victor Ding <victording(a)google.com>
Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Comment-Date: Fri, 16 Apr 2021 09:20:41 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Edward O'Callaghan, Anastasia Klimchuk.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52308 )
Change subject: jlink_spi.c: Separate shutdown from failed init cleanup
......................................................................
Patch Set 4:
(1 comment)
File jlink_spi.c:
https://review.coreboot.org/c/flashrom/+/52308/comment/f33f75ca_c3af7d6f
PS4, Line 263: return 1;
Note: We do not change this return on purpose. If `jaylink_init` failed, `jaylink_ctx` may not be initialised properly, so we skip calling `jaylink_exit`.
(No action required here)
--
To view, visit https://review.coreboot.org/c/flashrom/+/52308
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I71f64ed38154af670d4d28b8c7914d87fbc75679
Gerrit-Change-Number: 52308
Gerrit-PatchSet: 4
Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Nico Huber <nico.h(a)gmx.de>
Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com>
Gerrit-CC: Sam McNally <sammc(a)google.com>
Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Comment-Date: Fri, 16 Apr 2021 08:51:30 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/52406 )
Change subject: ene_lpc.c: Moving register_shutdown at the end of initialisation
......................................................................
ene_lpc.c: Moving register_shutdown at the end of initialisation
A bit more details: since register_shutdown has moved a few lines
below, now ene_enter_flash_mode is called before the shutdown function
is registered. ene_enter_flash_mode can fail (at least in theory,
it has some return 1s), but its return value is not analyzed, so even if
it returns non-0, execution goes further and register_shutdown will
happen anyway.
It is a separate question whether the return value of
ene_enter_flash_mode needs to be analyzed or is it ok to ignore it,
but in this patch I plan to keep the same behaviour, and probably I
will get back to error handling later.
This unlocks API change which plans to move register_shutdown inside
register master API, see https://review.coreboot.org/c/flashrom/+/51761
TEST=builds
BUG=b:185191942
Change-Id: If89a758c91c77486adbac2779449bcd71ab8fc78
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
---
M ene_lpc.c
1 file changed, 4 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/06/52406/1
diff --git a/ene_lpc.c b/ene_lpc.c
index 56d6580..61f27b4 100644
--- a/ene_lpc.c
+++ b/ene_lpc.c
@@ -573,16 +573,15 @@
* Compal - ec_command(0x41, 0xa1) returns 43 4f 4d 50 41 4c 9c
*/
+ ene_enter_flash_mode(ctx_data);
+
+ internal_buses_supported |= BUS_LPC;
+ spi_master_ene.data = ctx_data;
if (register_shutdown(ene_leave_flash_mode, ctx_data)) {
ret = 1;
goto ene_probe_spi_flash_exit;
}
-
- ene_enter_flash_mode(ctx_data);
-
- internal_buses_supported |= BUS_LPC;
- spi_master_ene.data = ctx_data;
register_spi_master(&spi_master_ene);
msg_pdbg("%s: successfully initialized ene\n", __func__);
--
To view, visit https://review.coreboot.org/c/flashrom/+/52406
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: If89a758c91c77486adbac2779449bcd71ab8fc78
Gerrit-Change-Number: 52406
Gerrit-PatchSet: 1
Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-MessageType: newchange
Attention is currently required from: Peter Marheine.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/52405
to look at the new patch set (#4).
Change subject: realtek_mst: add support for a devpath option
......................................................................
realtek_mst: add support for a devpath option
As with the lspcon_i2c_spi programmer, it may be more convenient for
callers to specify the I2C bus by device path rather than number. Add
support for a 'devpath' option that is mutually exclusive with the 'bus'
option and specifies how to communicate with the target.
TEST=-p realtek_mst_i2c_spi:devpath=/dev/i2c-8 --flash-size works, bus=8
continues to work. If both or neither are given, fails gracefully.
Signed-off-by: Peter Marheine <pmarheine(a)chromium.org>
Change-Id: Ieea57b2445f3aca16c87d8f839dff131009531a0
---
M realtek_mst_i2c_spi.c
1 file changed, 49 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/52405/4
--
To view, visit https://review.coreboot.org/c/flashrom/+/52405
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ieea57b2445f3aca16c87d8f839dff131009531a0
Gerrit-Change-Number: 52405
Gerrit-PatchSet: 4
Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-MessageType: newpatchset
Attention is currently required from: Peter Marheine.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/52405
to look at the new patch set (#3).
Change subject: realtek_mst: add support for a devpath option
......................................................................
realtek_mst: add support for a devpath option
As with the lspcon_i2c_spi programmer, it may be more convenient for
callers to specify the I2C bus by device path rather than number. Add
support for a 'devpath' option that is mutually exclusive with the 'bus'
option and specifies how to communicate with the target.
TEST=-p realtek_mst_i2c_spi:devpath=/dev/i2c-8 --flash-size works, bus=8
continues to work. If both or neither are given, fails gracefully.
Change-Id: Ieea57b2445f3aca16c87d8f839dff131009531a0
---
M realtek_mst_i2c_spi.c
1 file changed, 49 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/52405/3
--
To view, visit https://review.coreboot.org/c/flashrom/+/52405
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ieea57b2445f3aca16c87d8f839dff131009531a0
Gerrit-Change-Number: 52405
Gerrit-PatchSet: 3
Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-MessageType: newpatchset