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Change subject: spi25_statusreg: delete read_status_register()
......................................................................
Patch Set 9:
(2 comments)
File spi25.c:
https://review.coreboot.org/c/flashrom/+/59529/comment/46fe9ea4_6720d70e
PS9, Line 312: return 0;
Conditional body should be on new line.
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/59529/comment/05514ca9_55942c6a
PS9, Line 217: return 1;
Sorry I know there are so many lines like this in the file, can we propagate error code in all of those cases?
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Change subject: cli_classic: add writeprotect CLI
......................................................................
Patch Set 17:
(4 comments)
Patchset:
PS17:
It would be really great if other people have a look, re: API discussion started in CB:58482 thank you!
File cli_classic.c:
https://review.coreboot.org/c/flashrom/+/58738/comment/1b1090d8_31cd10d6
PS15, Line 66: " --wp-range=<start>,<len> set write protect range\n"
: " --wp-region <region> set write protect region\n"
I am just wondering, there are commands to set wp range/region, but how to unset? Or is it --wp-disable command to unset everything that has been set previously?
File cli_classic.c:
https://review.coreboot.org/c/flashrom/+/58738/comment/1c7ad4a9_eefcca04
PS17, Line 220: ret = flashrom_wp_set_range(flash, &cfg, &range);
: if (ret) {
: msg_gerr("The chip does not support the requested range.\n");
: return ret;
: }
:
: /* Write range before other operations (i.e. enabling HW protection) */
: ret = write_wp_config(flash, &cfg);
: if (ret)
: return ret;
Continuing the conversation about libflashrom vs cli. If we have a a command "set wp range", from this code it looks like it needs two operations, flashrom_wp_set_range and write_wp_config , to be performed in order? Does it mean libflashrom users would have to remember to perform two operations, in order? What happens if you do flashrom_wp_set_range but forget to do write_wp_config? range won't be set properly I assume?
I think flashrom_wp_set_range should include write_wp_config, so that just calling flashrom_wp_set_range is sufficient to perform a command.
I understand we need to print extra messages here. To achieve that, flashrom_wp_set_range need to return error codes, can be 1,2,3 etc. Here, we can print messages depending on error code.
https://review.coreboot.org/c/flashrom/+/58738/comment/b8d345d0_fce2b5b5
PS17, Line 236: ret = flashrom_wp_set_mode(&cfg, mode);
: if (ret) {
: msg_gerr("The chip does not support the requested mode.\n");
: return ret;
: }
:
: /* Write mode before other operations */
: ret = write_wp_config(flash, &cfg);
: if (ret)
: return ret;
Same comment, seems like an operation consists of two steps.
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#15).
Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
spi25_statusreg,flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 59 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/15
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#16).
Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
flashchips: add writeprotect bit layout map to chips
This patch adds a register bit map `struct flashchip`, with fields for
storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
2 files changed, 71 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/16
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Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Nikolai Artemiev, Sergii Dmytruk.
Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#14).
Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
spi25_statusreg,flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 60 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/14
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