November 2021 - flashrom-gerrit

Change in flashrom[master]: tests: Rename run_lifecycle into run_basic_lifecycle
by Anastasia Klimchuk (Code Review) 30 Nov '21

30 Nov '21

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/59740 ) Change subject: tests: Rename run_lifecycle into run_basic_lifecycle ...................................................................... tests: Rename run_lifecycle into run_basic_lifecycle Lifecycle tests are getting an upgrade in this chain, with new type of tests: lifecycle with probing. Existing lifecycle, being the simplest possible one becomes "basic lifecycle". With time, most of existing tests will be upgraded to probing lifecycle, however not necessarily all of them. Basic lifecycle will likely to stay as an option. This can be convenient, for a developer who wishes to add a test for a programmer, to have a choice of basic and extended option. BUG=b:181803212 TEST=ninja test Change-Id: I2771921ae2bd37f4b3f49342e03d9abb5ee36ea0 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M tests/lifecycle.c M tests/tests.c M tests/tests.h 3 files changed, 29 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/40/59740/1 diff --git a/tests/lifecycle.c b/tests/lifecycle.c index 2a8d6f5..8cb604b 100644 --- a/tests/lifecycle.c +++ b/tests/lifecycle.c @@ -19,7 +19,7 @@ #include "io_mock.h" #include "programmer.h" -static void run_lifecycle(void **state, const struct programmer_entry *prog, const char *param) +static void run_basic_lifecycle(void **state, const struct programmer_entry *prog, const char *param) { (void) state; /* unused */ @@ -36,19 +36,19 @@ free(param_dup); } -void dummy_init_and_shutdown_test_success(void **state) +void dummy_basic_lifecycle_test_success(void **state) { #if CONFIG_DUMMY == 1 - run_lifecycle(state, &programmer_dummy, "bus=parallel+lpc+fwh+spi"); + run_basic_lifecycle(state, &programmer_dummy, "bus=parallel+lpc+fwh+spi"); #else skip(); #endif } -void nicrealtek_init_and_shutdown_test_success(void **state) +void nicrealtek_basic_lifecycle_test_success(void **state) { #if CONFIG_NICREALTEK == 1 - run_lifecycle(state, &programmer_nicrealtek, ""); + run_basic_lifecycle(state, &programmer_nicrealtek, ""); #else skip(); #endif @@ -122,7 +122,7 @@ free(config); } -void raiden_debug_init_and_shutdown_test_success(void **state) +void raiden_debug_basic_lifecycle_test_success(void **state) { #if CONFIG_RAIDEN_DEBUG_SPI == 1 const struct io_mock raiden_debug_io = { @@ -142,7 +142,7 @@ io_mock_register(&raiden_debug_io); - run_lifecycle(state, &programmer_raiden_debug_spi, raiden_debug_param); + run_basic_lifecycle(state, &programmer_raiden_debug_spi, raiden_debug_param); io_mock_register(NULL); #else @@ -173,7 +173,7 @@ return wLength; } -void dediprog_init_and_shutdown_test_success(void **state) +void dediprog_basic_lifecycle_test_success(void **state) { #if CONFIG_DEDIPROG == 1 const struct io_mock dediprog_io = { @@ -183,7 +183,7 @@ io_mock_register(&dediprog_io); - run_lifecycle(state, &programmer_dediprog, "voltage=3.5V"); + run_basic_lifecycle(state, &programmer_dediprog, "voltage=3.5V"); io_mock_register(NULL); #else @@ -247,7 +247,7 @@ return 0; } -void linux_mtd_init_and_shutdown_test_success(void **state) +void linux_mtd_basic_lifecycle_test_success(void **state) { #if CONFIG_LINUX_MTD == 1 struct linux_mtd_io_state linux_mtd_io_state = { NULL }; @@ -260,7 +260,7 @@ io_mock_register(&linux_mtd_io); - run_lifecycle(state, &programmer_linux_mtd, ""); + run_basic_lifecycle(state, &programmer_linux_mtd, ""); io_mock_register(NULL); #else @@ -276,7 +276,7 @@ return memcpy(buf, max_buf_size, min(len, strlen(max_buf_size) + 1)); } -void linux_spi_init_and_shutdown_test_success(void **state) +void linux_spi_basic_lifecycle_test_success(void **state) { /* * Current implementation tests a particular path of the init procedure. @@ -289,7 +289,7 @@ io_mock_register(&linux_spi_io); - run_lifecycle(state, &programmer_linux_spi, "dev=/dev/null"); + run_basic_lifecycle(state, &programmer_linux_spi, "dev=/dev/null"); io_mock_register(NULL); #else @@ -332,7 +332,7 @@ return sz; } -void realtek_mst_init_and_shutdown_test_success(void **state) +void realtek_mst_basic_lifecycle_test_success(void **state) { #if CONFIG_REALTEK_MST_I2C_SPI == 1 const struct io_mock realtek_mst_io = { @@ -343,7 +343,7 @@ }; io_mock_register(&realtek_mst_io); - run_lifecycle(state, &programmer_realtek_mst_i2c_spi, "bus=254,enter-isp=0"); + run_basic_lifecycle(state, &programmer_realtek_mst_i2c_spi, "bus=254,enter-isp=0"); io_mock_register(NULL); #else diff --git a/tests/tests.c b/tests/tests.c index 9f839a0..a9faa58 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -349,13 +349,13 @@ ret |= cmocka_run_group_tests_name("spi25.c tests", spi25_tests, NULL, NULL); const struct CMUnitTest lifecycle_tests[] = { - cmocka_unit_test(dummy_init_and_shutdown_test_success), - cmocka_unit_test(nicrealtek_init_and_shutdown_test_success), - cmocka_unit_test(raiden_debug_init_and_shutdown_test_success), - cmocka_unit_test(dediprog_init_and_shutdown_test_success), - cmocka_unit_test(linux_mtd_init_and_shutdown_test_success), - cmocka_unit_test(linux_spi_init_and_shutdown_test_success), - cmocka_unit_test(realtek_mst_init_and_shutdown_test_success), + cmocka_unit_test(dummy_basic_lifecycle_test_success), + cmocka_unit_test(nicrealtek_basic_lifecycle_test_success), + cmocka_unit_test(raiden_debug_basic_lifecycle_test_success), + cmocka_unit_test(dediprog_basic_lifecycle_test_success), + cmocka_unit_test(linux_mtd_basic_lifecycle_test_success), + cmocka_unit_test(linux_spi_basic_lifecycle_test_success), + cmocka_unit_test(realtek_mst_basic_lifecycle_test_success), }; ret |= cmocka_run_group_tests_name("lifecycle.c tests", lifecycle_tests, NULL, NULL); diff --git a/tests/tests.h b/tests/tests.h index 41d09a9..8a3de44 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -41,13 +41,13 @@ void probe_spi_st95_test_success(void **state); /* spi95.c */ /* lifecycle.c */ -void dummy_init_and_shutdown_test_success(void **state); -void nicrealtek_init_and_shutdown_test_success(void **state); -void raiden_debug_init_and_shutdown_test_success(void **state); -void dediprog_init_and_shutdown_test_success(void **state); -void linux_mtd_init_and_shutdown_test_success(void **state); -void linux_spi_init_and_shutdown_test_success(void **state); -void realtek_mst_init_and_shutdown_test_success(void **state); +void dummy_basic_lifecycle_test_success(void **state); +void nicrealtek_basic_lifecycle_test_success(void **state); +void raiden_debug_basic_lifecycle_test_success(void **state); +void dediprog_basic_lifecycle_test_success(void **state); +void linux_mtd_basic_lifecycle_test_success(void **state); +void linux_spi_basic_lifecycle_test_success(void **state); +void realtek_mst_basic_lifecycle_test_success(void **state); /* layout.c */ void included_regions_dont_overlap_test_success(void **state); -- To view, visit https://review.coreboot.org/c/flashrom/+/59740 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2771921ae2bd37f4b3f49342e03d9abb5ee36ea0 Gerrit-Change-Number: 59740 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: tests: Rename init_shutdown.c into lifecycle.c
by Anastasia Klimchuk (Code Review) 30 Nov '21

30 Nov '21

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/59739 ) Change subject: tests: Rename init_shutdown.c into lifecycle.c ...................................................................... tests: Rename init_shutdown.c into lifecycle.c Lifecycle tests are getting an upgrade later in this chain, which means lifecycle becomes more than just init and shutdown. Rename into lifecycle.c to reflect the upgrade. BUG=b:181803212 TEST=ninja test Change-Id: I8d734c43cc15c7ec1055d3fb5bdcdca8c90d0987 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> --- R tests/lifecycle.c M tests/meson.build M tests/tests.c M tests/tests.h 4 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/39/59739/1 diff --git a/tests/init_shutdown.c b/tests/lifecycle.c similarity index 100% rename from tests/init_shutdown.c rename to tests/lifecycle.c diff --git a/tests/meson.build b/tests/meson.build index 5bb6ac9..e8e65db 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -20,7 +20,7 @@ 'helpers.c', 'flashrom.c', 'spi25.c', - 'init_shutdown.c', + 'lifecycle.c', 'layout.c', 'chip.c', ] diff --git a/tests/tests.c b/tests/tests.c index a4a312e..9f839a0 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -348,7 +348,7 @@ }; ret |= cmocka_run_group_tests_name("spi25.c tests", spi25_tests, NULL, NULL); - const struct CMUnitTest init_shutdown_tests[] = { + const struct CMUnitTest lifecycle_tests[] = { cmocka_unit_test(dummy_init_and_shutdown_test_success), cmocka_unit_test(nicrealtek_init_and_shutdown_test_success), cmocka_unit_test(raiden_debug_init_and_shutdown_test_success), @@ -357,7 +357,7 @@ cmocka_unit_test(linux_spi_init_and_shutdown_test_success), cmocka_unit_test(realtek_mst_init_and_shutdown_test_success), }; - ret |= cmocka_run_group_tests_name("init_shutdown.c tests", init_shutdown_tests, NULL, NULL); + ret |= cmocka_run_group_tests_name("lifecycle.c tests", lifecycle_tests, NULL, NULL); const struct CMUnitTest layout_tests[] = { cmocka_unit_test(included_regions_dont_overlap_test_success), diff --git a/tests/tests.h b/tests/tests.h index 16974af..41d09a9 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -40,7 +40,7 @@ void probe_spi_at25f_test_success(void **state); void probe_spi_st95_test_success(void **state); /* spi95.c */ -/* init_shutdown.c */ +/* lifecycle.c */ void dummy_init_and_shutdown_test_success(void **state); void nicrealtek_init_and_shutdown_test_success(void **state); void raiden_debug_init_and_shutdown_test_success(void **state); -- To view, visit https://review.coreboot.org/c/flashrom/+/59739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8d734c43cc15c7ec1055d3fb5bdcdca8c90d0987 Gerrit-Change-Number: 59739 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips,writeprotect_ranges: add range decoding function
by Edward O'Callaghan (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58480 ) Change subject: flashchips,writeprotect_ranges: add range decoding function ...................................................................... Patch Set 20: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/58480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203 Gerrit-Change-Number: 58480 Gerrit-PatchSet: 20 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 30 Nov 2021 01:38:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: cli_classic: add writeprotect CLI
by Nikolai Artemiev (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Paul Menzel, Edward O'Callaghan, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Hello build bot (Jenkins), Nico Huber, Paul Menzel, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58738 to look at the new patch set (#18). Change subject: cli_classic: add writeprotect CLI ...................................................................... cli_classic: add writeprotect CLI Tested with: GD25LQ128, GD25Q32, GD25Q64, GD25Q256, MX25L2006E, and W25X40. BUG=b:195381327,b:153800563 TEST=flashrom --wp-{enable,disable,range,list,status} BRANCH=none Change-Id: I499f521781ee8999921996517802c0c0c641d869 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M cli_classic.c 1 file changed, 241 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/38/58738/18 -- To view, visit https://review.coreboot.org/c/flashrom/+/58738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I499f521781ee8999921996517802c0c0c641d869 Gerrit-Change-Number: 58738 Gerrit-PatchSet: 18 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: flashchips: add writeprotect bit layout map to chips
by Nikolai Artemiev (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58477 to look at the new patch set (#18). Change subject: flashchips: add writeprotect bit layout map to chips ...................................................................... flashchips: add writeprotect bit layout map to chips This patch adds a register bit map `struct reg_bit_info`, with fields for storing the register, bit index, and writability of each bit that affects the chip's write protection. This allows writeprotect code to be independent of the register layout of any specific chip. The new fields have been filled out for example chips. The representation is centered around describing how bits can be accessed and modified, rather than the layout of registers. This is generally easier to work with in code that needs to access specific bits and typically requires specifying the locations of fewer bits overall. BUG=b:195381327,b:153800563 TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series BRANCH=none Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M flash.h M flashchips.c 2 files changed, 71 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/18 -- To view, visit https://review.coreboot.org/c/flashrom/+/58477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284 Gerrit-Change-Number: 58477 Gerrit-PatchSet: 18 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: spi25_statusreg,flashchips: add SR2 read/write support
by Nikolai Artemiev (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58570 to look at the new patch set (#16). Change subject: spi25_statusreg,flashchips: add SR2 read/write support ...................................................................... spi25_statusreg,flashchips: add SR2 read/write support This patch adds support for reading and writing the second status register and enables it on a limited set of flash chips. Chip support for RDSR2/WRSR2/extended WRSR is represented using feature flags to be consistent with how other SPI capabilities are represented. BUG=b:195381327,b:153800563 TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series TEST=logged SR2 read/write values during wp commands BRANCH=none Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M flash.h M flashchips.c M spi.h M spi25_statusreg.c 4 files changed, 58 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/16 -- To view, visit https://review.coreboot.org/c/flashrom/+/58570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db Gerrit-Change-Number: 58570 Gerrit-PatchSet: 16 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: libflashrom,writeprotect: add flashrom_wp_{read,write}_chip_config()
by Edward O'Callaghan (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58479 ) Change subject: libflashrom,writeprotect: add flashrom_wp_{read,write}_chip_config() ...................................................................... Patch Set 18: Code-Review+2 (2 comments) File writeprotect.c: https://review.coreboot.org/c/flashrom/+/58479/comment/43e120dd_63582bd1 PS18, Line 159: int unsigned ? https://review.coreboot.org/c/flashrom/+/58479/comment/4760bce1_656fa7af PS18, Line 171: int ditto -- To view, visit https://review.coreboot.org/c/flashrom/+/58479 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad Gerrit-Change-Number: 58479 Gerrit-PatchSet: 18 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 30 Nov 2021 01:28:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: flash: add structure to represent chip wp configuration
by Edward O'Callaghan (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58478 ) Change subject: flash: add structure to represent chip wp configuration ...................................................................... Patch Set 18: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/58478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I17dee630248ce7b51e624a6e46d7097d5d0de809 Gerrit-Change-Number: 58478 Gerrit-PatchSet: 18 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 30 Nov 2021 01:06:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: flashchips: add writeprotect bit layout map to chips
by Edward O'Callaghan (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58477 ) Change subject: flashchips: add writeprotect bit layout map to chips ...................................................................... Patch Set 17: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/58477/comment/739d58e1_e0d30a31 PS17, Line 9: struct flashchip struct reg_bit_info -- To view, visit https://review.coreboot.org/c/flashrom/+/58477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284 Gerrit-Change-Number: 58477 Gerrit-PatchSet: 17 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 30 Nov 2021 01:04:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: spi25_statusreg,flashchips: add SR2 read/write support
by Edward O'Callaghan (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58570 ) Change subject: spi25_statusreg,flashchips: add SR2 read/write support ...................................................................... Patch Set 15: Code-Review+2 (1 comment) File spi25_statusreg.c: https://review.coreboot.org/c/flashrom/+/58570/comment/b08728b3_21f4f04b PS15, Line 157: spurious -- To view, visit https://review.coreboot.org/c/flashrom/+/58570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db Gerrit-Change-Number: 58570 Gerrit-PatchSet: 15 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 30 Nov 2021 01:02:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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