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Change subject: [RFC][WPTST] tests: test write protection
......................................................................
Patch Set 7:
(2 comments)
Patchset:
PS7:
Looks better, thanks for your work! I will have another look later, sorry for delays!
File tests/chip_wp.c:
https://review.coreboot.org/c/flashrom/+/59075/comment/dd7edba5_91ef6a90
PS7, Line 177: /* Check initial mode. */
: assert_int_equal(0, flashrom_wp_get_mode(&cfg, &mode));
: assert_int_equal(WP_MODE_DISABLED, mode);
:
: /* Switch modes in dummyflasher. */
: assert_int_equal(0, flashrom_wp_set_mode(&cfg, WP_MODE_PERMANENT));
: assert_int_equal(0, flashrom_wp_write_chip_config(&flash, &cfg));
: assert_int_equal(0, flashrom_wp_set_mode(&cfg, WP_MODE_POWER_CYCLE));
: assert_int_equal(0, flashrom_wp_write_chip_config(&flash, &cfg));
:
: /* Final mode should be "permanent". */
: assert_int_equal(0, flashrom_wp_read_chip_config(&flash, &cfg));
: assert_int_equal(0, flashrom_wp_get_mode(&cfg, &mode));
: assert_int_equal(WP_MODE_PERMANENT, mode);
What I was trying to understand last time:
1) Does this sequence of operations (lines 175 to 190 in current patchset) represent an atomic test scenario, so that all these operations has to be performed, and exactly in this order?
2) Or, is this test method covering more than one test scenario?
For example, test sets PERMANENT mode, and then immediately, without checking current mode, sets POWER_CYCLE. Why do you need to switch so many times?
If 1: then it's better to add a comment describing the scenario
If 2: then you need to split into separate tests
I don't know whether it is 1 or 2, please help me understand. Maybe the goal of the test is to switch modes 10 times? but then you would need to check mode after every switch?
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Change subject: libflashrom,writeprotect: add flashrom_wp_{read,write}_chip_config()
......................................................................
Patch Set 13: Code-Review+1
(1 comment)
File libflashrom.h:
https://review.coreboot.org/c/flashrom/+/58479/comment/f08704fd_88529460
PS11, Line 4: 2010
> The `enum flashrom_wp_mode` definition and comments came from the 2010 file. […]
I saw in other places a list of years, so maybe "2010,2021" is a solution here.
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Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
Patch Set 10: Code-Review+1
(1 comment)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58570/comment/7448d5c3_7f8de84a
PS10, Line 99: }
: else if
One little bit left: `} else if {` should be on one line
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Change subject: spi25_statusreg: make register read/write functions generic
......................................................................
Patch Set 11:
(2 comments)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58475/comment/61b7e6e8_5ab30c37
PS9, Line 120: msg_cerr("Cannot read register: not supported by chip\n");
> There are multiple ways of writing SR2, so there's a nested if/else chain inside the `if (reg == STA […]
Thank you! Second paragraph explains it.
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58475/comment/3496505f_7db4eb6e
PS11, Line 124: int ret = spi_send_command(
: flash, sizeof(read_cmd), sizeof(readarr), &read_cmd, readarr);
Good! One last thing: to have it all on one line, both function call and all arguments. Looks like it fits 112 chars.
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Change subject: [DONOTMERGE] Buildbot test commit
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Set Ready For Review
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