July 2020 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: Add Gemini Lake support
by Angel Pons (Code Review) 10 Jul '20

10 Jul '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/43349 ) Change subject: Add Gemini Lake support ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/flashrom/+/43349 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I926a44176558115a2c833ef0954956eeb75061ff Gerrit-Change-Number: 43349 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 10 Jul 2020 15:19:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: chipset_enable: add PCI ID for APL-I (Broxton)
by Jan Samek (Code Review) 10 Jul '20

10 Jul '20

Jan Samek has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42805 ) Change subject: chipset_enable: add PCI ID for APL-I (Broxton) ...................................................................... chipset_enable: add PCI ID for APL-I (Broxton) Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324 Signed-off-by: Jan Samek <jan.samek(a)siemens.com> Signed-off-by: Henning Schild <henning.schild(a)siemens.com> --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/42805/1 diff --git a/chipset_enable.c b/chipset_enable.c index 632679c..d56a547 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2052,6 +2052,7 @@ {0x8086, 0xa2c9, B_S, NT, "Intel", "Z370", enable_flash_pch100}, {0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100}, {0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, + {0x8086, 0x5af0, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, {0x8086, 0xa303, B_S, NT, "Intel", "H310", enable_flash_pch300}, {0x8086, 0xa304, B_S, NT, "Intel", "H370", enable_flash_pch300}, {0x8086, 0xa305, B_S, NT, "Intel", "Z390", enable_flash_pch300}, -- To view, visit https://review.coreboot.org/c/flashrom/+/42805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324 Gerrit-Change-Number: 42805 Gerrit-PatchSet: 1 Gerrit-Owner: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: [WIP] Add uncrustify config
by David Hendricks (Code Review) 08 Jul '20

08 Jul '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42556 ) Change subject: [WIP] Add uncrustify config ...................................................................... [WIP] Add uncrustify config Similar to CB:38673, this attempts to add a config file for uncrustify as an alternative to clang-format, which has some limitations as mentioned in the other patch. This adds a config file which is a copy of the linux.cfg file. Newer versions of this patch will tweak the config file as needed for flashrom. Change-Id: Ib6bd3ab49e841768f07c2705f71be66e9308bbca Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M 82802ab.c M amd_imc.c M at45db.c M atahpt.c M atapromise.c M atavia.c M bitbang_spi.c M board_enable.c M buspirate_spi.c M cbtable.c M ch341a_spi.c M chipdrivers.h M chipset_enable.c M cli_classic.c M cli_common.c M cli_output.c M coreboot_tables.h M custom_baud.c M custom_baud.h M dediprog.c M developerbox_spi.c M digilent_spi.c M dmi.c M drkaiser.c M dummyflasher.c M edi.c M edi.h M en29lv640b.c M ene.h M flash.h M flashchips.c M flashchips.h M flashrom.c M fmap.c M fmap.h M ft2232_spi.c M gfxnvidia.c M helpers.c M hwaccess.c M hwaccess.h M i2c_helper.h M i2c_helper_linux.c M ich_descriptors.c M ich_descriptors.h M ichspi.c M internal.c M it8212.c M it85spi.c M it87spi.c M jedec.c M jlink_spi.c M layout.c M layout.h M libflashrom.c M libflashrom.h M linux_mtd.c M linux_spi.c M lspcon_i2c_spi.c M mcp6x_spi.c M mstarddc_spi.c M ni845x_spi.c M nic3com.c M nicintel.c M nicintel_eeprom.c M nicintel_spi.c M nicnatsemi.c M nicrealtek.c M ogp_spi.c M os.h M pcidev.c M physmap.c M pickit2_spi.c M platform.h M pony_spi.c M print.c M print_wiki.c M processor_enable.c M programmer.c M programmer.h M raiden_debug_spi.c M rayer_spi.c M realtek_mst_i2c_spi.c M satamv.c M satasii.c M sb600spi.c M serial.c M serprog.c M serprog.h M sfdp.c M spi.c M spi.h M spi25.c M spi25_statusreg.c M spi95.c M sst28sf040.c M sst_fwhub.c M stlinkv3_spi.c M udelay.c A uncrustify.cfg M usb_device.c M usb_device.h M usbblaster_spi.c M usbdev.c M w39.c M wbsio_spi.c 105 files changed, 17,980 insertions(+), 17,840 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/56/42556/1 -- To view, visit https://review.coreboot.org/c/flashrom/+/42556 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib6bd3ab49e841768f07c2705f71be66e9308bbca Gerrit-Change-Number: 42556 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: [WIP] Add uncrustify on/off markers where appropriate
by David Hendricks (Code Review) 08 Jul '20

08 Jul '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42555 ) Change subject: [WIP] Add uncrustify on/off markers where appropriate ...................................................................... [WIP] Add uncrustify on/off markers where appropriate Change-Id: I146a32e921d1c828a7d05ebb88373abe22e89053 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M board_enable.c M chipset_enable.c M print.c 3 files changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/42555/1 diff --git a/board_enable.c b/board_enable.c index 9cf0103..e95fcff 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2349,6 +2349,7 @@ */ /* Please keep this list alphabetically ordered by vendor/board name. */ +/* *INDENT-OFF* */ const struct board_match board_matches[] = { /* first pci-id set [4], second pci-id set [4], dmi identifier, coreboot id [2], phase, vendor name, board name max_rom_... OK? flash enable */ @@ -2530,6 +2531,7 @@ #endif { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ }; +/* *INDENT-ON* */ int selfcheck_board_enables(void) { diff --git a/chipset_enable.c b/chipset_enable.c index 632679c..49f4f2e 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1690,6 +1690,7 @@ #define B_S (BUS_SPI) /* Please keep this list numerically sorted by vendor/device ID. */ +/* *INDENT-OFF* */ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, B_PFL, OK, "ATI", "SB400", enable_flash_sb400}, @@ -2066,6 +2067,7 @@ #endif {0}, }; +/* *INDENT-ON* */ int chipset_flash_enable(void) { diff --git a/print.c b/print.c index feca45e..06561ec 100644 --- a/print.c +++ b/print.c @@ -515,6 +515,7 @@ #endif /* Please keep this list alphabetically ordered by vendor/board. */ +/* *INDENT-OFF* */ const struct board_info boards_known[] = { #if defined(__i386__) || defined(__x86_64__) B("A-Trend", "ATC-6220", OK, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL), @@ -1142,8 +1143,10 @@ {0}, }; +/* *INDENT-ON* */ /* Please keep this list alphabetically ordered by vendor/board. */ +/* *INDENT-OFF* */ const struct board_info laptops_known[] = { #if defined(__i386__) || defined(__x86_64__) B("Acer", "Aspire 1520", OK, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspir…", NULL), @@ -1176,4 +1179,5 @@ {0}, }; +/* *INDENT-ON* */ #endif -- To view, visit https://review.coreboot.org/c/flashrom/+/42555 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I146a32e921d1c828a7d05ebb88373abe22e89053 Gerrit-Change-Number: 42555 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call
by Simon Buhrow (Code Review) 08 Jul '20

08 Jul '20

Simon Buhrow has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/40477 ) Change subject: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call ...................................................................... Patch Set 14: Needs Patch 43282 ! If not data will be lost. -- To view, visit https://review.coreboot.org/c/flashrom/+/40477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Gerrit-Change-Number: 40477 Gerrit-PatchSet: 14 Gerrit-Owner: Simon Buhrow Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 08 Jul 2020 07:24:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call
by Simon Buhrow (Code Review) 08 Jul '20

08 Jul '20

Simon Buhrow has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/40477 ) Change subject: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call ...................................................................... Patch Set 14: (1 comment) https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c File ft2232_spi.c: https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c@403 PS11, Line 403: if (ftdi_write_data_set_chunksize(ftdic, 280)) { : /* : * 280 bytes = : * + 9 B (CMD) : * + 1 B (WREN) : * + 9 B (CMD) : * + 1 B (op) : * + 4 B (addr) : * + 256 B (page data) : * : * With op: PageProgram or Erase; CMD: FTDI-Chip commands : */ > I don't recall suggesting that (my memory is terrible). […] I don´t get your "suggesting that". But this might be because of my very bad english, I´m sorry! Nevertheless I removed it from this commit it as you suggested. -- To view, visit https://review.coreboot.org/c/flashrom/+/40477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Gerrit-Change-Number: 40477 Gerrit-PatchSet: 14 Gerrit-Owner: Simon Buhrow Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 08 Jul 2020 07:18:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Simon Buhrow Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call
by Simon Buhrow (Code Review) 08 Jul '20

08 Jul '20

Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/40477 to look at the new patch set (#14). Change subject: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call ...................................................................... ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call Every ftdi_write_data() call is quite time consuming as the ftdi-chips seems to take always 2-3ms to respond. This leads to what the comment already says: Minimize USB transfers by packing as many commands as possible together. So I packed the WREN command together with the following operation which can be program or erase operation. This saves about 1 minute when programming a 128MBit Flash with my config! I´m using ftdi-2232H chip. That´s why I put it at this place. If anyone has a good overview about all programmers: This could be implemented in spi_write_cmd() in case that it is compatible to all programmers or this principle could be transfered to other programmers which act in a similar way. Signed-off-by: Simon Buhrow <simon.buhrow(a)posteo.de> Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a --- M ft2232_spi.c 1 file changed, 24 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/40477/14 -- To view, visit https://review.coreboot.org/c/flashrom/+/40477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Gerrit-Change-Number: 40477 Gerrit-PatchSet: 14 Gerrit-Owner: Simon Buhrow Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: serial: Fix file read/write error handling for Windows
by David Hendricks (Code Review) 07 Jul '20

07 Jul '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/43051 ) Change subject: serial: Fix file read/write error handling for Windows ...................................................................... serial: Fix file read/write error handling for Windows File read/write semantics are different between POSIX and Windows. In particular Windows file read/write functions return a boolean type to indicate success or failure, while the POSIX equivalents return a signed integer indicating number of bytes read if successful or -1 if not. This attempts to correct some error handling paths for Windows and avoid invalid comparisons that were causing compilation issues. Reported on https://github.com/flashrom/flashrom/issues/149 Change-Id: Ib179d51ede2dbd38f54f3641bfe90340a6a87e31 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M serial.c 1 file changed, 22 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/51/43051/1 diff --git a/serial.c b/serial.c index 3a99dbf..8fd202a 100644 --- a/serial.c +++ b/serial.c @@ -391,14 +391,17 @@ while (writecnt > 0) { #if IS_WINDOWS - WriteFile(sp_fd, buf, writecnt, &tmp, NULL); + if (WriteFile(sp_fd, buf, writecnt, &tmp, NULL) != true) { + msg_perr("Serial port write error!\n"); + return 1; + } #else tmp = write(sp_fd, buf, writecnt); -#endif if (tmp == -1) { msg_perr("Serial port write error!\n"); return 1; } +#endif if (!tmp) { msg_pdbg2("Empty write\n"); empty_writes--; @@ -425,14 +428,17 @@ while (readcnt > 0) { #if IS_WINDOWS - ReadFile(sp_fd, buf, readcnt, &tmp, NULL); + if (ReadFile(sp_fd, buf, readcnt, &tmp, NULL) != true) { + msg_perr("Serial port read error!\n"); + return 1; + } #else tmp = read(sp_fd, buf, readcnt); -#endif if (tmp == -1) { msg_perr("Serial port read error!\n"); return 1; } +#endif if (!tmp) msg_pdbg2("Empty read\n"); readcnt -= tmp; @@ -485,17 +491,21 @@ for (i = 0; i < timeout; i++) { msg_pspew("readcnt %u rd_bytes %u\n", readcnt, rd_bytes); #if IS_WINDOWS - ReadFile(sp_fd, c + rd_bytes, readcnt - rd_bytes, &rv, NULL); + if (ReadFile(sp_fd, c + rd_bytes, readcnt - rd_bytes, &rv, NULL) != true) { + msg_perr_strerror("Serial port read error: "); + ret = -1; + break; + } msg_pspew("read %lu bytes\n", rv); #else rv = read(sp_fd, c + rd_bytes, readcnt - rd_bytes); msg_pspew("read %zd bytes\n", rv); -#endif if ((rv == -1) && (errno != EAGAIN)) { msg_perr_strerror("Serial port read error: "); ret = -1; break; } +#endif if (rv > 0) rd_bytes += rv; if (rd_bytes == readcnt) { @@ -565,17 +575,21 @@ for (i = 0; i < timeout; i++) { msg_pspew("writecnt %u wr_bytes %u\n", writecnt, wr_bytes); #if IS_WINDOWS - WriteFile(sp_fd, buf + wr_bytes, writecnt - wr_bytes, &rv, NULL); + if (WriteFile(sp_fd, buf + wr_bytes, writecnt - wr_bytes, &rv, NULL) != true) { + msg_perr_strerror("Serial port write error: "); + ret = -1; + break; + } msg_pspew("wrote %lu bytes\n", rv); #else rv = write(sp_fd, buf + wr_bytes, writecnt - wr_bytes); msg_pspew("wrote %zd bytes\n", rv); -#endif if ((rv == -1) && (errno != EAGAIN)) { msg_perr_strerror("Serial port write error: "); ret = -1; break; } +#endif if (rv > 0) { wr_bytes += rv; if (wr_bytes == writecnt) { -- To view, visit https://review.coreboot.org/c/flashrom/+/43051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib179d51ede2dbd38f54f3641bfe90340a6a87e31 Gerrit-Change-Number: 43051 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call
by Angel Pons (Code Review) 07 Jul '20

07 Jul '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/40477 ) Change subject: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call ...................................................................... Patch Set 13: (1 comment) https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c File ft2232_spi.c: https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c@403 PS11, Line 403: if (ftdi_write_data_set_chunksize(ftdic, 280)) { : /* : * 280 bytes = : * + 9 B (CMD) : * + 1 B (WREN) : * + 9 B (CMD) : * + 1 B (op) : * + 4 B (addr) : * + 256 B (page data) : * : * With op: PageProgram or Erase; CMD: FTDI-Chip commands : */ > This goes with the time saving changes in ft2232_spi_send_command() below. […] I don't recall suggesting that (my memory is terrible). In any case, the 1st commit would be much easier to +2 and submit than the 3rd commit (I still need to understand and test it) -- To view, visit https://review.coreboot.org/c/flashrom/+/40477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Gerrit-Change-Number: 40477 Gerrit-PatchSet: 13 Gerrit-Owner: Simon Buhrow Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 07 Jul 2020 13:30:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Simon Buhrow Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call
by Simon Buhrow (Code Review) 07 Jul '20

07 Jul '20

Simon Buhrow has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/40477 ) Change subject: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call ...................................................................... Patch Set 13: (4 comments) Thanks for your ideas! https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c File ft2232_spi.c: https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c@403 PS11, Line 403: if (ftdi_write_data_set_chunksize(ftdic, 280)) { : /* : * 280 bytes = : * + 9 B (CMD) : * + 1 B (WREN) : * + 9 B (CMD) : * + 1 B (op) : * + 4 B (addr) : * + 256 B (page data) : * : * With op: PageProgram or Erase; CMD: FTDI-Chip commands : */ > Increasing the chunksize can be the 1st commit This goes with the time saving changes in ft2232_spi_send_command() below. That´s why I think your proposed 1st and 3rd commit go together. https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c@481 PS11, Line 481: static unsigned char buf[FTDI_HW_BUFFER_SIZE]; > Using a fixed-size buffer can be the 2nd commit Done. OK, I see that this does not necessarily go with the time saving changes! Thanks! https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c@483 PS11, Line 483: static int i = 0; > This line is part of the 3rd commit Done https://review.coreboot.org/c/flashrom/+/40477/11/ft2232_spi.c@541 PS11, Line 541: if (writearr[0] == JEDEC_WREN) { : /* Return to get second op (Program or Erase) without resetting buf nor i*/ : return 0; : } else { : ret = send_buf(ftdic, buf, i); : i = 0; : } > This is the rest of the 3rd commit Done. This is the main part of time saving change. -- To view, visit https://review.coreboot.org/c/flashrom/+/40477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Gerrit-Change-Number: 40477 Gerrit-PatchSet: 13 Gerrit-Owner: Simon Buhrow Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 07 Jul 2020 13:11:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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