August 2019 - flashrom-gerrit - mail.coreboot.org

Change in ...flashrom[master]: manibuilder: Add list of tags used for the 1.1.x branch
by Nico Huber (Code Review) 16 Mar '21

16 Mar '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33340 Change subject: manibuilder: Add list of tags used for the 1.1.x branch ...................................................................... manibuilder: Add list of tags used for the 1.1.x branch Change-Id: I243aa11f4a017a4209efcc227cec56eb12020e28 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/manibuilder/Makefile.targets 1 file changed, 48 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/40/33340/1 diff --git a/util/manibuilder/Makefile.targets b/util/manibuilder/Makefile.targets index 044b0a4..079c181 100644 --- a/util/manibuilder/Makefile.targets +++ b/util/manibuilder/Makefile.targets @@ -112,6 +112,46 @@ # can only run what is still maintained 10X_TAGS := $(filter $(10X_TAGS),$(ALL_TAGS)) +# original 1.1.x tags +11X_TAGS := \ + anita\:amd64 \ + djgpp\:6.1.0 \ + fedora\:25-x86_64 \ + fedora\:25-ppc64le \ + fedora\:25-aarch64 \ + fedora\:24-x86_64 \ + centos\:7.3-aarch64-clean \ + centos\:7.3-amd64-clean \ + centos\:7.2-amd64-clean \ + debian-debootstrap\:ppc64el-stretch \ + debian-debootstrap\:armhf-stretch \ + debian-debootstrap\:mips-stretch \ + debian-debootstrap\:mipsel-stretch \ + debian-debootstrap\:amd64-stretch \ + debian-debootstrap\:i386-stretch \ + debian-debootstrap\:amd64-sid \ + ubuntu-debootstrap\:arm64-xenial \ + ubuntu-debootstrap\:amd64-xenial \ + ubuntu-debootstrap\:powerpc-xenial \ + ubuntu-debootstrap\:amd64-bionic \ + alpine\:amd64-v3.7 \ + alpine\:amd64-v3.8 \ + alpine\:amd64-v3.6 \ + alpine\:armhf-v3.8 \ + alpine\:i386-v3.6 \ + alpine\:i386-v3.7 \ + alpine\:i386-v3.8 \ + debian-debootstrap\:amd64-buster \ + debian-debootstrap\:i386-buster \ + debian-debootstrap\:i386-sid \ + ubuntu-debootstrap\:armhf-xenial \ + ubuntu-debootstrap\:i386-bionic \ + ubuntu-debootstrap\:i386-xenial \ + ubuntu-debootstrap\:ppc64el-xenial \ + +# can only run what is still maintained +11X_TAGS := $(filter $(11X_TAGS),$(ALL_TAGS)) + default: $(DEFAULT_TAGS) native: $(NATIVE_TAGS) @@ -121,6 +161,9 @@ 1.0.x: export TEST_REVISION=refs/heads/1.0.x 1.0.x: $(10X_TAGS) +1.1.x: export TEST_REVISION=refs/heads/1.1.x +1.1.x: $(11X_TAGS) + show-default: @printf "%s\n" $(DEFAULT_TAGS) @@ -133,6 +176,9 @@ show-1.0.x: @printf "%s\n" $(10X_TAGS) -.PHONY: default native all 1.0.x -.PHONY: show-default show-native show-all show-1.0.x +show-1.1.x: + @printf "%s\n" $(11X_TAGS) + +.PHONY: default native all 1.0.x 1.1.x +.PHONY: show-default show-native show-all show-1.0.x show-1.1.x .PHONY: $(ALL_TAGS) -- To view, visit https://review.coreboot.org/c/flashrom/+/33340 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I243aa11f4a017a4209efcc227cec56eb12020e28 Gerrit-Change-Number: 33340 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: manibuilder: Add newer targets for Alpine, CentOS, Fedora
by Nico Huber (Code Review) 16 Mar '21

16 Mar '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33342 Change subject: manibuilder: Add newer targets for Alpine, CentOS, Fedora ...................................................................... manibuilder: Add newer targets for Alpine, CentOS, Fedora Change-Id: I6c9939601abd3bd67424b8fa9a5ec800e50e3a51 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/manibuilder/Makefile.targets 1 file changed, 8 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/42/33342/1 diff --git a/util/manibuilder/Makefile.targets b/util/manibuilder/Makefile.targets index 044b0a4..f5a142c 100644 --- a/util/manibuilder/Makefile.targets +++ b/util/manibuilder/Makefile.targets @@ -1,8 +1,12 @@ ANITA_TAGS := anita\:amd64 anita\:i386 MULTIARCH_TAGS := \ + centos\:7.6-armhfp-clean centos\:7.6-amd64-clean \ centos\:7.3-aarch64-clean centos\:7.3-amd64-clean \ centos\:7.2-amd64-clean \ + $(foreach a,x86_64 s390x aarch64, fedora\:30-$(a)) \ + $(foreach a,x86_64 s390x ppc64le aarch64, fedora\:29-$(a)) \ + fedora\:28-armhfp \ $(foreach a,x86_64 ppc64le aarch64, \ $(foreach v,25 24, \ fedora\:$(v)-$(a))) \ @@ -14,7 +18,7 @@ ubuntu-debootstrap\:$(a)-$(v))) \ ubuntu-debootstrap\:powerpc-xenial \ $(foreach a,aarch64 armhf amd64 i386, \ - $(foreach v,v3.8 v3.7 v3.6, \ + $(foreach v,v3.9 v3.8 v3.7 v3.6, \ alpine\:$(a)-$(v))) \ OTHER_TAGS := djgpp\:6.1.0 @@ -41,6 +45,7 @@ DEFAULT_TAGS := \ anita\:amd64 \ djgpp\:6.1.0 \ + fedora\:30-aarch64 \ fedora\:25-x86_64 \ fedora\:25-ppc64le \ fedora\:25-aarch64 \ @@ -59,8 +64,9 @@ ubuntu-debootstrap\:amd64-xenial \ ubuntu-debootstrap\:powerpc-xenial \ ubuntu-debootstrap\:amd64-bionic \ - alpine\:amd64-v3.7 \ + alpine\:aarch64-v3.9 \ alpine\:amd64-v3.8 \ + alpine\:amd64-v3.7 \ # also run all native tests by default DEFAULT_TAGS += $(filter-out $(DEFAULT_TAGS),$(NATIVE_TAGS)) -- To view, visit https://review.coreboot.org/c/flashrom/+/33342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6c9939601abd3bd67424b8fa9a5ec800e50e3a51 Gerrit-Change-Number: 33342 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: manibuilder: Allow warnings in NetBSD and CentOS builds
by Nico Huber (Code Review) 16 Mar '21

16 Mar '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33339 Change subject: manibuilder: Allow warnings in NetBSD and CentOS builds ...................................................................... manibuilder: Allow warnings in NetBSD and CentOS builds Their old compilers stumble because of `-Wmissing-braces`. Change-Id: Ia9ee17fd1f0c8b191091f89ffbf44329c6521d7d Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/manibuilder/Makefile 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/39/33339/1 diff --git a/util/manibuilder/Makefile b/util/manibuilder/Makefile index d93abec..7f76c33 100644 --- a/util/manibuilder/Makefile +++ b/util/manibuilder/Makefile @@ -53,9 +53,10 @@ djgpp\:6.1.0: LIBS_BASE=../ djgpp\:6.1.0: MAKEARGS+=strip CONFIG_JLINK_SPI=no $(ANITA_TAGS): MAKECMD=gmake -$(ANITA_TAGS): MAKEARGS+=CONFIG_JLINK_SPI=no +$(ANITA_TAGS): MAKEARGS+=CONFIG_JLINK_SPI=no WARNERROR=no $(filter alpine% centos%,$(MULTIARCH_TAGS)): MAKEARGS+=CONFIG_JLINK_SPI=no $(filter %-xenial %-stretch,$(MULTIARCH_TAGS)): MAKEARGS+=CONFIG_JLINK_SPI=no +$(filter centos%,$(MULTIARCH_TAGS)): MAKEARGS+=WARNERROR=no $(ALL_TAGS): export QUIET_SETUP=$(QUIET_TEST) $(ALL_TAGS): %: %-check-build $(QUIET_TEST)docker rm -f mani_$(call ident,$*) >/dev/null 2>&1 || true -- To view, visit https://review.coreboot.org/c/flashrom/+/33339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia9ee17fd1f0c8b191091f89ffbf44329c6521d7d Gerrit-Change-Number: 33339 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: manibuilder: Add libjaylink where possible, disable where not
by Nico Huber (Code Review) 16 Mar '21

16 Mar '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33338 Change subject: manibuilder: Add libjaylink where possible, disable where not ...................................................................... manibuilder: Add libjaylink where possible, disable where not Change-Id: I2f7aebe602ebdb0a4748640e281b9a92146f0ca8 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/manibuilder/Dockerfile.debian-debootstrap M util/manibuilder/Dockerfile.fedora M util/manibuilder/Dockerfile.ubuntu-debootstrap M util/manibuilder/Makefile 4 files changed, 10 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/38/33338/1 diff --git a/util/manibuilder/Dockerfile.debian-debootstrap b/util/manibuilder/Dockerfile.debian-debootstrap index c6648e8..ce201f8 100644 --- a/util/manibuilder/Dockerfile.debian-debootstrap +++ b/util/manibuilder/Dockerfile.debian-debootstrap @@ -5,8 +5,9 @@ apt-get -qq update && \ apt-get -qq upgrade && \ apt-get -qq dist-upgrade && \ - apt-get -qqy install gcc make git doxygen ccache \ + apt-get -qqy install gcc make git doxygen ccache pkg-config \ libpci-dev libusb-dev libftdi-dev libusb-1.0-0-dev && \ + { apt-get -qqy install libjaylink-dev || true; } && \ apt-get clean USER mani diff --git a/util/manibuilder/Dockerfile.fedora b/util/manibuilder/Dockerfile.fedora index 927e487..319039b 100644 --- a/util/manibuilder/Dockerfile.fedora +++ b/util/manibuilder/Dockerfile.fedora @@ -3,7 +3,8 @@ RUN \ useradd -p locked -m mani && \ dnf install -q -y git gcc ccache make \ - pciutils-devel libusb-devel libusbx-devel libftdi-devel && \ + pciutils-devel libusb-devel libusbx-devel libftdi-devel \ + libjaylink-devel && \ dnf clean -q -y all USER mani diff --git a/util/manibuilder/Dockerfile.ubuntu-debootstrap b/util/manibuilder/Dockerfile.ubuntu-debootstrap index f50047c..fe3ad1e 100644 --- a/util/manibuilder/Dockerfile.ubuntu-debootstrap +++ b/util/manibuilder/Dockerfile.ubuntu-debootstrap @@ -18,8 +18,9 @@ apt-get -qq update && \ apt-get -qq upgrade && \ apt-get -qq dist-upgrade && \ - apt-get -qqy install gcc make git doxygen ccache \ + apt-get -qqy install gcc make git doxygen ccache pkg-config \ libpci-dev libusb-dev libftdi-dev libusb-1.0-0-dev && \ + { apt-get -qqy install libjaylink-dev || true; } && \ apt-get clean USER mani diff --git a/util/manibuilder/Makefile b/util/manibuilder/Makefile index 9b87f45..d93abec 100644 --- a/util/manibuilder/Makefile +++ b/util/manibuilder/Makefile @@ -51,8 +51,11 @@ djgpp\:6.1.0: CC=ccache i586-pc-msdosdjgpp-gcc djgpp\:6.1.0: STRIP=i586-pc-msdosdjgpp-strip djgpp\:6.1.0: LIBS_BASE=../ -djgpp\:6.1.0: MAKEARGS+=strip +djgpp\:6.1.0: MAKEARGS+=strip CONFIG_JLINK_SPI=no $(ANITA_TAGS): MAKECMD=gmake +$(ANITA_TAGS): MAKEARGS+=CONFIG_JLINK_SPI=no +$(filter alpine% centos%,$(MULTIARCH_TAGS)): MAKEARGS+=CONFIG_JLINK_SPI=no +$(filter %-xenial %-stretch,$(MULTIARCH_TAGS)): MAKEARGS+=CONFIG_JLINK_SPI=no $(ALL_TAGS): export QUIET_SETUP=$(QUIET_TEST) $(ALL_TAGS): %: %-check-build $(QUIET_TEST)docker rm -f mani_$(call ident,$*) >/dev/null 2>&1 || true -- To view, visit https://review.coreboot.org/c/flashrom/+/33338 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2f7aebe602ebdb0a4748640e281b9a92146f0ca8 Gerrit-Change-Number: 33338 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: manibuilder: Enable CONFIG_EVERYTHING=yes
by Nico Huber (Code Review) 16 Mar '21

16 Mar '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33337 Change subject: manibuilder: Enable CONFIG_EVERYTHING=yes ...................................................................... manibuilder: Enable CONFIG_EVERYTHING=yes Change-Id: I4651b55744d730956aa8fda8fdfccbbd68cdda19 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/manibuilder/Makefile 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/33337/1 diff --git a/util/manibuilder/Makefile b/util/manibuilder/Makefile index b1e161c..9b87f45 100644 --- a/util/manibuilder/Makefile +++ b/util/manibuilder/Makefile @@ -4,6 +4,7 @@ CC := ccache cc MAKECMD := make +MAKEARGS := CONFIG_EVERYTHING=yes spc := spc += @@ -50,7 +51,7 @@ djgpp\:6.1.0: CC=ccache i586-pc-msdosdjgpp-gcc djgpp\:6.1.0: STRIP=i586-pc-msdosdjgpp-strip djgpp\:6.1.0: LIBS_BASE=../ -djgpp\:6.1.0: TARGET=strip +djgpp\:6.1.0: MAKEARGS+=strip $(ANITA_TAGS): MAKECMD=gmake $(ALL_TAGS): export QUIET_SETUP=$(QUIET_TEST) $(ALL_TAGS): %: %-check-build @@ -65,7 +66,7 @@ $(MAKECMD) clean && $(MAKECMD) -j$${CPUS:-1} CC='$(CC)' \ $(if $(STRIP),STRIP='$(STRIP)') \ $(if $(LIBS_BASE),LIBS_BASE='$(LIBS_BASE)') \ - $(TARGET)" \ + $(MAKEARGS)" \ $(if $(QUIET_TEST),>/dev/null 2>&1) || echo $*: $$? $(addsuffix -shell,$(ALL_TAGS)): %-shell: %-check-build -- To view, visit https://review.coreboot.org/c/flashrom/+/33337 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4651b55744d730956aa8fda8fdfccbbd68cdda19 Gerrit-Change-Number: 33337 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: libflashrom: add querying functions with meson integration
by Michał Żygowski (Code Review) 13 Mar '21

13 Mar '21

Hello ?ukasz Dmitrowski, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/34363 to review the following change. Change subject: libflashrom: add querying functions with meson integration ...................................................................... libflashrom: add querying functions with meson integration Work based on lukasz.dmitrowski(a)gmail.com code Change-Id: I49041b8fa5700dabe59fef0d2337339d34cd6c6f Signed-off-by: Artur Raglis <artur.raglis(a)3mdeb.com> Signed-off-by: Lukasz Dmitrowski <lukasz.dmitrowski(a)gmail.com> --- M libflashrom.c M libflashrom.h M libflashrom.map M meson.build 4 files changed, 187 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/63/34363/1 diff --git a/libflashrom.c b/libflashrom.c index f90a22c..cc26835 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -103,7 +103,142 @@ * @{ */ -/* TBD */ +/** + * @brief Returns flashrom version + * @return Flashrom version + */ +const char *flashrom_version_info(void) +{ + return flashrom_version; +} + +/** + * @brief Returns list of supported programmers + * @return List of supported programmers + */ +const char **flashrom_supported_programmers(void) +{ + enum programmer p = 0; + const char **supported_programmers = NULL; + supported_programmers = malloc((PROGRAMMER_INVALID + 1) * sizeof(char*)); + + if (supported_programmers != NULL) { + for (; p < PROGRAMMER_INVALID; ++p) { + supported_programmers[p] = programmer_table[p].name; + } + } else { + msg_gerr("Memory allocation error!\n"); + } + + return supported_programmers; +} + +/** + * @brief Returns list of supported flash chips + * @return List of supported flash chips + */ +flashrom_flashchip_info *flashrom_supported_flash_chips(void) +{ + int i = 0; + flashrom_flashchip_info *supported_flashchips = malloc(flashchips_size * sizeof(flashrom_flashchip_info)); + + if (supported_flashchips != NULL) { + for (; i < flashchips_size; ++i) { + supported_flashchips[i].vendor = flashchips[i].vendor; + supported_flashchips[i].name = flashchips[i].name; + supported_flashchips[i].tested.erase = (flashrom_test_state) flashchips[i].tested.erase; + supported_flashchips[i].tested.probe = (flashrom_test_state) flashchips[i].tested.probe; + supported_flashchips[i].tested.read = (flashrom_test_state) flashchips[i].tested.read; + supported_flashchips[i].tested.write = (flashrom_test_state) flashchips[i].tested.write; + supported_flashchips[i].total_size = flashchips[i].total_size; + } + } else { + msg_gerr("Memory allocation error!\n"); + } + + return supported_flashchips; +} + +/** + * @brief Returns list of supported mainboards + * @return List of supported mainboards + */ +flashrom_board_info *flashrom_supported_boards(void) +{ + int boards_known_size = 0; + int i = 0; + const struct board_info *binfo = boards_known; + + while ((binfo++)->vendor) + ++boards_known_size; + binfo = boards_known; + /* add place for {0} */ + ++boards_known_size; + + flashrom_board_info *supported_boards = malloc(boards_known_size * sizeof(flashrom_board_info)); + + if (supported_boards != NULL) { + for (; i < boards_known_size; ++i) { + supported_boards[i].vendor = binfo[i].vendor; + supported_boards[i].name = binfo[i].name; + supported_boards[i].working = binfo[i].working; + } + } else { + msg_gerr("Memory allocation error!\n"); + } + + return supported_boards; +} + +/** + * @brief Returns list of supported chipsets + * @return List of supported chipsets + */ +flashrom_chipset_info *flashrom_supported_chipsets(void) +{ + int chipset_enables_size = 0; + int i = 0; + const struct penable *chipset = chipset_enables; + + while ((chipset++)->vendor_name) + ++chipset_enables_size; + chipset = chipset_enables; + /* add place for {0}*/ + ++chipset_enables_size; + + flashrom_chipset_info *supported_chipsets = malloc(chipset_enables_size * sizeof(flashrom_chipset_info)); + + if (supported_chipsets != NULL) { + for (; i < chipset_enables_size; ++i) { + supported_chipsets[i].vendor = chipset[i].vendor_name; + supported_chipsets[i].chipset = chipset[i].device_name; + supported_chipsets[i].vendor_id = chipset[i].vendor_id; + supported_chipsets[i].chipset_id = chipset[i].device_id; + supported_chipsets[i].status = chipset[i].status; + } + } else { + msg_gerr("Memory allocation error!\n"); + } + + return supported_chipsets; +} + +/** + * @brief Frees memory allocated by libflashrom API + * @param Pointer to block of memory which should be freed + * @return 0 on success + * 1 on null pointer error + */ +int flashrom_data_free(void *const p) +{ + if (!p) { + msg_gerr("flashrom_data_free - Null pointer!\n"); + return 1; + } else { + free(p); + return 0; + } +} /** @} */ /* end flashrom-query */ diff --git a/libflashrom.h b/libflashrom.h index 38c95d2..ebba16b 100644 --- a/libflashrom.h +++ b/libflashrom.h @@ -37,6 +37,50 @@ typedef int(flashrom_log_callback)(enum flashrom_log_level, const char *format, va_list); void flashrom_set_log_callback(flashrom_log_callback *); +/** @ingroup flashrom-query */ +typedef enum { + FLASHROM_TESTED_OK = 0, + FLASHROM_TESTED_NT = 1, + FLASHROM_TESTED_BAD = 2, + FLASHROM_TESTED_DEP = 3, + FLASHROM_TESTED_NA = 4, +} flashrom_test_state; + +typedef struct flashrom_flashchip_info { + const char *vendor; + const char *name; + unsigned int total_size; + struct flashrom_tested { + flashrom_test_state probe; + flashrom_test_state read; + flashrom_test_state erase; + flashrom_test_state write; + } tested; +} flashrom_flashchip_info; + +typedef struct flashrom_board_info { + const char *vendor; + const char *name; + flashrom_test_state working; +} flashrom_board_info; + +typedef struct flashrom_chipset_info { + const char *vendor; + const char *chipset; + uint16_t vendor_id; + uint16_t chipset_id; + flashrom_test_state status; +} flashrom_chipset_info; + +const char *flashrom_version_info(void); +void flashrom_system_info(void); +const char **flashrom_supported_programmers(void); +flashrom_flashchip_info *flashrom_supported_flash_chips(void); +flashrom_board_info *flashrom_supported_boards(void); +flashrom_chipset_info *flashrom_supported_chipsets(void); +int flashrom_data_free(void *const p); + +/** @ingroup flashrom-prog */ struct flashrom_programmer; int flashrom_programmer_init(struct flashrom_programmer **, const char *prog_name, const char *prog_params); int flashrom_programmer_shutdown(struct flashrom_programmer *); diff --git a/libflashrom.map b/libflashrom.map index 3c287ff..d6dd24d 100644 --- a/libflashrom.map +++ b/libflashrom.map @@ -1,7 +1,11 @@ LIBFLASHROM_1.0 { global: + flashrom_board_info; + flashrom_chipset_info; + flashrom_data_free; flashrom_flag_get; flashrom_flag_set; + flashrom_flashchip_info; flashrom_flash_erase; flashrom_flash_getsize; flashrom_flash_probe; @@ -20,5 +24,8 @@ flashrom_programmer_shutdown; flashrom_set_log_callback; flashrom_shutdown; + flashrom_supported_programmers; + flashrom_system_info; + flashrom_version_info; local: *; }; diff --git a/meson.build b/meson.build index 1923fdf..00f4a2f 100644 --- a/meson.build +++ b/meson.build @@ -68,8 +68,6 @@ srcs = [] need_libusb0 = false -need_raw_access = false -need_serial = false # check for required symbols if cc.has_function('clock_gettime') -- To view, visit https://review.coreboot.org/c/flashrom/+/34363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I49041b8fa5700dabe59fef0d2337339d34cd6c6f Gerrit-Change-Number: 34363 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: ?ukasz Dmitrowski <lukasz.dmitrowski(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: dediprog: Use 4BA page program without 0x12
by David Hendricks (Code Review) 25 Aug '20

25 Aug '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/30521 Change subject: dediprog: Use 4BA page program without 0x12 ...................................................................... dediprog: Use 4BA page program without 0x12 It's not clear exactly what the difference is between WRITE_MODE_4B_ADDR_256B_PAGE_PGM with and without _0x12 from the SF600 command spec, but the former seems to work more reliably. Tested using an SF600 (FW v7.2.21), IS25LP256D, W25Q256JV, and MX25L25735. Change-Id: I3cb37ec8838f5bb02948ed52b4a2906fa033cf83 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M dediprog.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/30521/1 diff --git a/dediprog.c b/dediprog.c index 2a190d2..303f1d5 100644 --- a/dediprog.c +++ b/dediprog.c @@ -398,7 +398,8 @@ } } else if (dedi_spi_cmd == WRITE_MODE_PAGE_PGM) { if (flash->chip->feature_bits & FEATURE_4BA_WRITE) { - data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM_0x12; +// data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM_0x12; + data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM; data_packet[4] = JEDEC_BYTE_PROGRAM_4BA; use_4ba = true; } else if (flash->in_4ba_mode) { -- To view, visit https://review.coreboot.org/c/flashrom/+/30521 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3cb37ec8838f5bb02948ed52b4a2906fa033cf83 Gerrit-Change-Number: 30521 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

1 1

Change in flashrom[master]: flashchips: add W25M512JV
by Joel Stanley (Code Review) 08 Apr '20

08 Apr '20

Joel Stanley has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34595 ) Change subject: flashchips: add W25M512JV ...................................................................... flashchips: add W25M512JV https://www.winbond.com/resource-files/w25m512jv%20revd%2009052017.pdf Change-Id: I8d16f0918785795cc49500435a03641b87d706e9 Signed-off-by: Joel Stanley <joel(a)jms.id.au> --- M flashchips.c M flashchips.h 2 files changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/95/34595/1 diff --git a/flashchips.c b/flashchips.c index 166af6a..304ebe7 100644 --- a/flashchips.c +++ b/flashchips.c @@ -15902,6 +15902,25 @@ { .vendor = "Winbond", + .name = "W25Q512JV", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q512JV, + .total_size = 64 * 1024, + .page_size = 1024, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .printlock = spi_prettyprint_status_register_plain, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", .name = "W25Q256JV_M", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, diff --git a/flashchips.h b/flashchips.h index 006b95e..c606161 100644 --- a/flashchips.h +++ b/flashchips.h @@ -921,6 +921,7 @@ #define WINBOND_NEX_W25Q64_V 0x4017 /* W25Q64BV, W25Q64CV; W25Q64FV in SPI mode (default) */ #define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV; W25Q128FV in SPI mode (default) */ #define WINBOND_NEX_W25Q256_V 0x4019 /* W25Q256FV or W25Q256JV_Q (QE=1) */ +#define WINBOND_NEX_W25Q512JV 0x4020 /* W25Q512JV */ #define WINBOND_NEX_W25Q20_W 0x5012 /* W25Q20BW */ #define WINBOND_NEX_W25Q40BW 0x5013 /* W25Q40BW */ #define WINBOND_NEX_W25Q80BW 0x5014 /* W25Q80BW */ -- To view, visit https://review.coreboot.org/c/flashrom/+/34595 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8d16f0918785795cc49500435a03641b87d706e9 Gerrit-Change-Number: 34595 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Stanley Gerrit-MessageType: newchange

4 10

Change in flashrom[master]: Add support for STLINK V3 debugger/programmer via it's SPI bridge
by Miklós Márton (Code Review) 31 Dec '19

31 Dec '19

Miklós Márton has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34661 ) Change subject: Add support for STLINK V3 debugger/programmer via it's SPI bridge ...................................................................... Add support for STLINK V3 debugger/programmer via it's SPI bridge Change-Id: Icffab87ac8f2c570187ed753ec70f054541873a4 Signed-off-by: Miklós Márton <martonmiklosqdev(a)gmail.com> --- M Makefile M flashrom.8.tmpl M flashrom.c M meson.build M programmer.h A stlinkv3_spi.c 6 files changed, 670 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/61/34661/1 diff --git a/Makefile b/Makefile index 545e84a..58dc86a 100644 --- a/Makefile +++ b/Makefile @@ -190,6 +190,11 @@ else override CONFIG_CH341A_SPI = no endif +ifeq ($(CONFIG_STLINKV3_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_STLINKV3_SPI=yes +else +override CONFIG_STLINKV3_SPI = no +endif # libjaylink is also not available for DOS ifeq ($(CONFIG_JLINK_SPI), yes) UNSUPPORTED_FEATURES += CONFIG_JLINK_SPI=yes @@ -353,6 +358,11 @@ else override CONFIG_PICKIT2_SPI = no endif +ifeq ($(CONFIG_STLINKV3_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_STLINKV3_SPI=yes +else +override CONFIG_STLINKV3_SPI = no +endif ifeq ($(CONFIG_CH341A_SPI), yes) UNSUPPORTED_FEATURES += CONFIG_CH341A_SPI=yes else @@ -618,6 +628,9 @@ # Always enable PICkit2 SPI dongles for now. CONFIG_PICKIT2_SPI ?= yes +# Always enable STLink V3 +CONFIG_STLINKV3_SPI ?= yes + # Always enable dummy tracing for now. CONFIG_DUMMY ?= yes @@ -696,6 +709,7 @@ override CONFIG_DIGILENT_SPI = no override CONFIG_DEVELOPERBOX_SPI = no override CONFIG_PICKIT2_SPI = no +override CONFIG_STLINKV3_SPI = no endif ifeq ($(CONFIG_ENABLE_LIBPCI_PROGRAMMERS), no) override CONFIG_INTERNAL = no @@ -863,6 +877,12 @@ NEED_LIBUSB1 += CONFIG_PICKIT2_SPI endif +ifeq ($(CONFIG_STLINKV3_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_STLINKV3_SPI=1' +PROGRAMMER_OBJS += stlinkv3_spi.o +NEED_LIBUSB1 += CONFIG_STLINKV3_SPI +endif + ifneq ($(NEED_LIBFTDI), ) FTDILIBS := $(call debug_shell,[ -n "$(PKG_CONFIG_LIBDIR)" ] && export PKG_CONFIG_LIBDIR="$(PKG_CONFIG_LIBDIR)" ; $(PKG_CONFIG) --libs libftdi1 || $(PKG_CONFIG) --libs libftdi || printf "%s" "-lftdi -lusb") FEATURE_CFLAGS += $(call debug_shell,grep -q "FT232H := yes" .features && printf "%s" "-D'HAVE_FT232H=1'") diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index 30dc97d..5f518a4 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -333,6 +333,8 @@ .sp .BR "* jlink_spi" " (for SPI flash ROMs attached to SEGGER J-Link and compatible devices)" .sp +.BR "* stlinkv3_spi" " (for SPI flash ROMs attached to STMicroelectronics STLINK V3 devices)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER-SPECIFIC INFORMATION @@ -1186,6 +1188,31 @@ .sp syntax where \fBfrequency\fP is the SPI clock frequency in kHz. The maximum speed depends on the device in use. +SS +.BR "stlinkv3_spi " programmer +.IP +This module supports SPI flash programming through the STMicroelectronics +STLINK V3 programmer/debugger's SPI bridge interface +.sp +.B " flashrom \-p stlinkv3_spi" +.sp +If there is more than one compatible device connected, you can select which one +should be used by specifying its serial number with the +.sp +.B " flashrom \-p stlinkv3_spi:serial=number" +.sp +syntax where +.B number +is the serial number of the device (which can be found for example in the +output of lsusb -v). +.sp +The SPI speed can be selected by using the +.sp +.B " flashrom \-p stlinkv3_spi:spispeed=frequency" +.sp +syntax where \fBfrequency\fP is the SPI clock frequency in kHz. +If the passed frequency is not supported by the adapter the nearest lower +supported frequency will be used. .SS .SH EXAMPLES diff --git a/flashrom.c b/flashrom.c index cb1dca6..fdb77b6 100644 --- a/flashrom.c +++ b/flashrom.c @@ -449,6 +449,18 @@ }, #endif +#if CONFIG_STLINKV3_SPI == 1 + { + .name = "stlinkv3_spi", + .type = USB, + .devs.dev = devs_stlinkv3_spi, + .init = stlinkv3_spi_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + {0}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; diff --git a/meson.build b/meson.build index e1b6c16..2b5ef2e 100644 --- a/meson.build +++ b/meson.build @@ -62,6 +62,7 @@ config_satasii = get_option('config_satasii') config_serprog = get_option('config_serprog') config_usbblaster_spi = get_option('config_usbblaster_spi') +config_stlinkv3_spi = get_option('config_stlinkv3_spi') cargs = [] deps = [] @@ -272,6 +273,10 @@ srcs += 'usbblaster_spi.c' cargs += '-DCONFIG_USBBLASTER_SPI=1' endif +if config_stlinkv3_spi + srcs += 'stlinkv3_spi.c' + cargs += '-DCONFIG_STLINKV3_SPI=1' +endif # bitbanging SPI infrastructure if config_bitbang_spi diff --git a/programmer.h b/programmer.h index f4e8b46..1843426 100644 --- a/programmer.h +++ b/programmer.h @@ -121,6 +121,9 @@ #if CONFIG_JLINK_SPI == 1 PROGRAMMER_JLINK_SPI, #endif +#if CONFIG_STLINKV3_SPI == 1 + PROGRAMMER_STLINKV3_SPI, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -498,6 +501,12 @@ extern const struct dev_entry devs_pickit2_spi[]; #endif +/* stlinkv3_spi.c */ +#if CONFIG_STLINKV3_SPI == 1 +int stlinkv3_spi_init(void); +extern const struct dev_entry devs_stlinkv3_spi[]; +#endif + /* rayer_spi.c */ #if CONFIG_RAYER_SPI == 1 int rayer_spi_init(void); diff --git a/stlinkv3_spi.c b/stlinkv3_spi.c new file mode 100644 index 0000000..817d28f --- /dev/null +++ b/stlinkv3_spi.c @@ -0,0 +1,597 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2019 Miklós Márton martonmiklosqdev(a)gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +/* + * Driver for programming SPI flash chips using the SPI port + * of the STMicroelectronics's STLINK-V3 programmer/debugger. + * + * The implementation is inspired by the ST's STLINK-V3-BRIDGE C++ API: + * https://www.st.com/en/development-tools/stlink-v3-bridge.html + */ + +#include "flash.h" +#include "programmer.h" +#include "spi.h" + +#include <libusb.h> +#include <limits.h> +#include <stdint.h> +#include <stdlib.h> +#include <string.h> + +typedef enum { + FW_VERSION_OK, + FW_VERSION_OLD, +} fw_version_check_result_t; + +typedef enum { + SPI_BAUDRATEPRESCALER_2 = 0, + SPI_BAUDRATEPRESCALER_4 = 1, + SPI_BAUDRATEPRESCALER_8 = 2, + SPI_BAUDRATEPRESCALER_16 = 3, + SPI_BAUDRATEPRESCALER_32 = 4, + SPI_BAUDRATEPRESCALER_64 = 5, + SPI_BAUDRATEPRESCALER_128 = 6, + SPI_BAUDRATEPRESCALER_256 = 7 +} SPI_prescaler_t; + +typedef enum { + SPI_DIRECTION_2LINES_FULLDUPLEX = 0, + SPI_DIRECTION_2LINES_RXONLY = 1, + SPI_DIRECTION_1LINE_RX = 2, + SPI_DIRECTION_1LINE_TX = 3 +} SPI_dir_t; + +typedef enum { + SPI_MODE_SLAVE = 0, + SPI_MODE_MASTER = 1 +} SPI_mode_t; + +typedef enum { + SPI_DATASIZE_16B = 0, + SPI_DATASIZE_8B = 1 +} SPI_datasize_t; + +typedef enum { + SPI_CPOL_LOW = 0, + SPI_CPOL_HIGH = 1 +} SPI_CPOL_t; + +typedef enum { + SPI_CPHA_1EDGE = 0, + SPI_CPHA_2EDGE = 1 +} SPI_CPHA_t; + +typedef enum { + SPI_FIRSTBIT_LSB = 0, + SPI_FIRSTBIT_MSB = 1 +} SPI_firstbit_t; + +typedef enum { + SPI_NSS_SOFT = 0, + SPI_NSS_HARD = 1 +} SPI_NSS_t; + +typedef enum { + SPI_NSS_LOW = 0, + SPI_NSS_HIGH = 1 +} SPI_NSS_Level_t; + +#define ST_GETVERSION_EXT 0xFB + +#define STLINK_BRIDGE_COMMAND 0xFC +#define STLINK_BRIDGE_CLOSE 0x01 +#define STLINK_BRIDGE_GET_RWCMD_STATUS 0x02 +#define STLINK_BRIDGE_GET_CLOCK 0x03 +#define STLINK_BRIDGE_INIT_SPI 0x20 +#define STLINK_BRIDGE_WRITE_SPI 0x21 +#define STLINK_BRIDGE_READ_SPI 0x22 +#define STLINK_BRIDGE_CS_SPI 0x23 + +#define STLINK_BRIDGE_SPI_ERROR 0x02 + +#define STLINK_SPI_COM 0x02 + +#define STLINK_EP_OUT 0x06 +#define STLINK_EP_IN 0x86 + +#define FIRMWARE_BRIDGE_STLINK_V3_LAST_VERSION 3 + +#define USB_TIMEOUT 5000 + +const struct dev_entry devs_stlinkv3_spi[] = { + {0x0483, 0x374F, OK, "STMicroelectronics", "STLINK-V3"}, + {0} +}; + +static struct libusb_context *usb_ctx; +static libusb_device_handle *stlinkv3_handle; + +/** + * @param[out] bridge_input_clk Current input frequency in kHz of the given com. + */ +static int stlinkv3_get_clk(uint32_t *bridge_input_clk) +{ + uint8_t command[16]; + uint8_t answer[12]; + int actualLength = 0; + int rc = 0; + + if (bridge_input_clk == NULL) + return -1; + + memset(command, 0, sizeof(command)); + memset(answer, 0, sizeof(answer)); + + command[0] = STLINK_BRIDGE_COMMAND; + command[1] = STLINK_BRIDGE_GET_CLOCK; + command[2] = STLINK_SPI_COM; + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(command)) { + msg_perr("Failed to issue the STLINK_BRIDGE_GET_CLOCK command: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_IN, + answer, sizeof(answer), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(answer)) { + msg_perr("Failed to get STLINK_BRIDGE_GET_CLOCK answer: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + *bridge_input_clk = (uint32_t)answer[4] + | (uint32_t)answer[5]<<8 + | (uint32_t)answer[6]<<16 + | (uint32_t)answer[7]<<24; + return 0; + +} + +static int stlinkv3_spi_calc_prescaler(uint16_t reqd_freq_in_kHz, + SPI_prescaler_t *prescaler, + uint16_t *calculated_freq_in_kHz) +{ + uint32_t bridge_clk_in_kHz; + uint32_t calculated_prescaler = 1; + uint16_t prescaler_value; + + if (stlinkv3_get_clk(&bridge_clk_in_kHz)) + return -1; + + calculated_prescaler = bridge_clk_in_kHz/reqd_freq_in_kHz; + // Apply a smaller frequency if not exact + if (calculated_prescaler <= 2) { + *prescaler = SPI_BAUDRATEPRESCALER_2; + prescaler_value = 2; + } else if (calculated_prescaler <= 4) { + *prescaler = SPI_BAUDRATEPRESCALER_4; + prescaler_value = 4; + } else if (calculated_prescaler <= 8) { + *prescaler = SPI_BAUDRATEPRESCALER_8; + prescaler_value = 8; + } else if (calculated_prescaler <= 16) { + *prescaler = SPI_BAUDRATEPRESCALER_16; + prescaler_value = 16; + } else if (calculated_prescaler <= 32) { + *prescaler = SPI_BAUDRATEPRESCALER_32; + prescaler_value = 32; + } else if (calculated_prescaler <= 64) { + *prescaler = SPI_BAUDRATEPRESCALER_64; + prescaler_value = 64; + } else if (calculated_prescaler <= 128) { + *prescaler = SPI_BAUDRATEPRESCALER_128; + prescaler_value = 128; + } else if (calculated_prescaler <= 256) { + *prescaler = SPI_BAUDRATEPRESCALER_256; + prescaler_value = 256; + } else { + // smaller frequency not possible + *prescaler = SPI_BAUDRATEPRESCALER_256; + prescaler_value = 256; + } + + *calculated_freq_in_kHz = bridge_clk_in_kHz / prescaler_value; + + return 0; +} + +static int stlinkv3_check_version(fw_version_check_result_t *result) +{ + uint8_t answer[12]; + uint8_t command[16]; + int actualLength = 0; + int rc = 0; + + memset(command, 0, sizeof(command)); + + command[0] = ST_GETVERSION_EXT; + command[1] = 0x80; + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(command)) { + msg_perr("Failed to issue the ST_GETVERSION_EXT command: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_IN, + answer, sizeof(answer), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(answer)) { + msg_perr("Failed to retrive the ST_GETVERSION_EXT answer: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + msg_pinfo("Connected to STLink V3 with bridge FW version: %d\n", answer[4]); + *result = answer[4] >= FIRMWARE_BRIDGE_STLINK_V3_LAST_VERSION + ? FW_VERSION_OK + : FW_VERSION_OLD; + return 0; +} + +static int stlinkv3_spi_open(uint16_t reqested_freq_in_kHz) +{ + uint8_t command[16]; + uint8_t answer[2]; + uint16_t SCK_freq_in_kHz; + int actualLength = 0; + int rc = 0; + SPI_prescaler_t prescaler; + fw_version_check_result_t fw_check_result; + + if (stlinkv3_check_version(&fw_check_result)) { + msg_perr("Failed to query FW version"); + return -1; + } + + if (fw_check_result != FW_VERSION_OK) { + msg_pinfo("Your STLink V3 has too old version of the bridge interface\n" + "Please update the firmware with the " + "STSW-LINK007 which can be downloaded from here:\n" + "https://www.st.com/en/development-tools/stsw-link007.html"); + return -1; + } + + if (stlinkv3_spi_calc_prescaler(reqested_freq_in_kHz, + &prescaler, + &SCK_freq_in_kHz)) { + msg_perr("Failed to calculate SPI clock prescaler"); + return -1; + } + msg_pinfo("SCK frequency set to %d kHz\n", SCK_freq_in_kHz); + + memset(command, 0, sizeof(command)); + memset(answer, 0, sizeof(answer)); + + command[0] = STLINK_BRIDGE_COMMAND; + command[1] = STLINK_BRIDGE_INIT_SPI; + command[2] = SPI_DIRECTION_2LINES_FULLDUPLEX; + command[3] = (SPI_MODE_MASTER + | (SPI_CPHA_1EDGE << 1) + | (SPI_CPOL_LOW << 2) + | (SPI_FIRSTBIT_MSB << 3)); + command[4] = SPI_DATASIZE_8B; + command[5] = SPI_NSS_SOFT; + command[6] = (uint8_t)prescaler; + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED && actualLength != sizeof(command)) { + msg_perr("Failed to issue the STLINK_BRIDGE_INIT_SPI command: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_IN, + answer, sizeof(answer), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(answer)) { + msg_perr("Failed to retrive the STLINK_BRIDGE_INIT_SPI answer: '%s'\n", + libusb_error_name(rc)); + return -1; + } + return 0; +} + +static int stlinkv3_get_last_readwrite_status(uint32_t *status) +{ + uint8_t command[16]; + uint16_t answer[4]; + int rc = 0; + int actualLength = 0; + + memset(command, 0, sizeof(command)); + memset(answer, 0, sizeof(answer)); + + command[0] = STLINK_BRIDGE_COMMAND; + command[1] = STLINK_BRIDGE_GET_RWCMD_STATUS; + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(command)) { + msg_perr("Failed to issue the STLINK_BRIDGE_GET_RWCMD_STATUS command: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + rc = libusb_bulk_transfer(stlinkv3_handle, + STLINK_EP_IN, + (uint8_t *)answer, + sizeof(answer), + &actualLength, + USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(answer)) { + msg_perr("Failed to retrive the STLINK_BRIDGE_GET_RWCMD_STATUS answer: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + *status = (uint32_t)answer[2] | (uint32_t)answer[3]<<16; + return 0; +} + +static int stlinkv3_spi_set_SPI_NSS(SPI_NSS_Level_t NSS_level) +{ + uint8_t command[16]; + uint8_t answer[2]; + int rc = 0; + int actualLength = 0; + + memset(command, 0, sizeof(command)); + memset(answer, 0, sizeof(answer)); + + command[0] = STLINK_BRIDGE_COMMAND; + command[1] = STLINK_BRIDGE_CS_SPI; + command[2] = (uint8_t) (NSS_level); + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(command)) { + msg_perr("Failed to issue the STLINK_BRIDGE_CS_SPI command: '%s'\n", + libusb_error_name(rc)); + return -1; + } + + rc = libusb_bulk_transfer(stlinkv3_handle, + STLINK_EP_IN, + (uint8_t *)answer, + sizeof(answer), + &actualLength, + USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(answer)) { + msg_perr("Failed to retrive the STLINK_BRIDGE_CS_SPI answer: '%s'\n", + libusb_error_name(rc)); + return -1; + } + return 0; +} + +static int stlinkv3_spi_transmit(struct flashctx *flash, + unsigned int write_cnt, + unsigned int read_cnt, + const unsigned char *write_arr, + unsigned char *read_arr) +{ + uint8_t command[16]; + int rc = 0 ; + int actualLength = 0; + uint32_t rw_status = 0; + + if (stlinkv3_spi_set_SPI_NSS(SPI_NSS_LOW)) { + msg_perr("Failed to set the NSS pin to low\n"); + return -1; + } + + memset(command, 0, sizeof(command)); + + command[0] = STLINK_BRIDGE_COMMAND; + command[1] = STLINK_BRIDGE_WRITE_SPI; + command[2] = (uint8_t)write_cnt; + command[3] = (uint8_t)(write_cnt >> 8); + + for (unsigned int i = 0; (i < 8) && (i < write_cnt); i++) + command[4+i] = write_arr[i]; + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(command)) { + msg_perr("Failed to issue the STLINK_BRIDGE_WRITE_SPI command: '%s'\n", + libusb_error_name(rc)); + goto transmit_err; + } + + if (write_cnt > 8) { + rc = libusb_bulk_transfer(stlinkv3_handle, + STLINK_EP_OUT, + (unsigned char *)&write_arr[8], + (unsigned int)(write_cnt - 8), + &actualLength, + USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != (write_cnt - 8)) { + msg_perr("Failed to send the data after the " + "STLINK_BRIDGE_WRITE_SPI command: '%s'\n", + libusb_error_name(rc)); + goto transmit_err; + } + } + + if (stlinkv3_get_last_readwrite_status(&rw_status)) + return -1; + + if (rw_status != 0) { + msg_perr("SPI read/write failure: %d\n", rw_status); + goto transmit_err; + } + + if (read_cnt) { + command[1] = STLINK_BRIDGE_READ_SPI; + command[2] = (uint8_t)read_cnt; + command[3] = (uint8_t)(read_cnt >> 8); + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), + &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(command)) { + msg_perr("Failed to issue the STLINK_BRIDGE_READ_SPI command: '%s'\n", + libusb_error_name(rc)); + goto transmit_err; + } + + rc = libusb_bulk_transfer(stlinkv3_handle, + STLINK_EP_IN, + (unsigned char *)read_arr, + (int)read_cnt, + &actualLength, + USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != read_cnt) { + msg_perr("Failed to retrive the STLINK_BRIDGE_READ_SPI answer: '%s'\n", + libusb_error_name(rc)); + goto transmit_err; + } + } + + if (stlinkv3_get_last_readwrite_status(&rw_status)) + goto transmit_err; + + if (rw_status != 0) { + msg_perr("SPI read/write failure: %d\n", rw_status); + goto transmit_err; + } + + if (stlinkv3_spi_set_SPI_NSS(SPI_NSS_HIGH)) { + msg_perr("Failed to set the NSS pin to high\n"); + return -1; + } + return 0; + +transmit_err: + if (stlinkv3_spi_set_SPI_NSS(SPI_NSS_HIGH)) + msg_perr("Failed to set the NSS pin to high\n"); + return -1; +} + +static int stlinkv3_spi_shutdown(void *data) +{ + uint8_t command[16]; + uint8_t answer[2]; + int actualLength = 0; + int rc = 0; + + memset(command, 0, sizeof(command)); + memset(answer, 0, sizeof(answer)); + + command[0] = STLINK_BRIDGE_COMMAND; + command[1] = STLINK_BRIDGE_CLOSE; + command[2] = STLINK_SPI_COM; + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, + command, sizeof(command), &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(command)) + msg_perr("Failed to issue the STLINK_BRIDGE_CLOSE command: '%s'\n", + libusb_error_name(rc)); + + rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_IN, + answer, sizeof(answer), &actualLength, USB_TIMEOUT); + if (rc != LIBUSB_TRANSFER_COMPLETED || actualLength != sizeof(answer)) + msg_perr("Failed to retrive the STLINK_BRIDGE_CLOSE answer: '%s'\n", + libusb_error_name(rc)); + + libusb_close(stlinkv3_handle); + libusb_exit(usb_ctx); + + return 0; +} + +static const struct spi_master spi_programmer_stlinkv3 = { + .max_data_read = UINT16_MAX, + .max_data_write = UINT16_MAX, + .command = stlinkv3_spi_transmit, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, +}; + +int stlinkv3_spi_init(void) +{ + uint16_t sck_freq_kHz = 1000; // selecting 1 MHz SCK is a good bet + char *speed_str = NULL; + char *serialno = NULL; + char *endptr = NULL; + + libusb_init(&usb_ctx); + if (!usb_ctx) { + msg_perr("Could not initialize libusb!\n"); + return 1; + } + + serialno = extract_programmer_param("serial"); + if (serialno) + msg_pdbg("Opening STLINK-V3 with serial: %s\n", serialno); + stlinkv3_handle = usb_dev_get_by_vid_pid_serial(usb_ctx, + devs_stlinkv3_spi[0].vendor_id, devs_stlinkv3_spi[0].device_id, serialno); + + if (!stlinkv3_handle) { + if (serialno) + msg_perr("No STLINK-V3 seems to be connected with serial %s\n", serialno); + else + msg_perr("Could not find any connected STLINK-V3\n"); + free(serialno); + goto err_exit; + } + free(serialno); + + speed_str = extract_programmer_param("spispeed"); + if (speed_str) { + sck_freq_kHz = strtoul(speed_str, &endptr, 0); + if (*endptr) { + msg_perr("The spispeed parameter passed with invalid format: %s\n", + speed_str); + msg_perr("Please pass the parameter with a simple number in kHz\n"); + return -1; + } + free(speed_str); + } + + if (stlinkv3_spi_open(sck_freq_kHz)) + goto err_exit; + + if (register_shutdown(stlinkv3_spi_shutdown, NULL)) + goto err_exit; + + if (register_spi_master(&spi_programmer_stlinkv3)) + goto err_exit; + + return 0; + +err_exit: + libusb_exit(usb_ctx); + return 1; +} -- To view, visit https://review.coreboot.org/c/flashrom/+/34661 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Icffab87ac8f2c570187ed753ec70f054541873a4 Gerrit-Change-Number: 34661 Gerrit-PatchSet: 1 Gerrit-Owner: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-MessageType: newchange

4 25

Change in ...flashrom[master]: Add "--dangerous-bruteforce" mode for the unreliable ISP environments
by mikeb mikeb (Code Review) 29 Dec '19

29 Dec '19

Hello Mike Banon, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/31830 to review the following change. Change subject: Add "--dangerous-bruteforce" mode for the unreliable ISP environments ...................................................................... Add "--dangerous-bruteforce" mode for the unreliable ISP environments Some in-system-programming environments are very unreliable, e.g. when you connect a SOIC8 test clip to the flash chip of WR841ND v9 wireless router: because the low power SOC of this router becomes powered and is constantly trying to boot, the router's flash chip is correctly detected only 30% of times, and when it is detected just 30% of the read operations are successful - the rest result in zeroes or garbage data being read from a flash chip. While in this new "--dangerous-bruteforce" mode, flashrom will be constantly probing for a flash chip until it is correctly detected - and then, depending on the operation selected by a user, at the moments of chip availability it will be reading or writing by the small chunks of 256 bytes maximum size, verifying each small chunk and retrying the operation until the success or timeout (~ 60 sec). Constant probing between the small chunk operations is also being done - to avoid a possible situation where we have got two identical blocks of zeroes while reading a chunk and erroneously accepted it. Currently this mode is active only for those SPI25 chips which are ".write = spi_chip_write_256" and ".read = spi_chip_read", but later could be expanded to more functions to become useful for more chips. NOTE: this mode is experimental! Also, some targets like WR841ND v9 could block the ISP chip access completely if there is no bootable firmware inside (e.g. after you've tried to erase the chip contents). In such a situation it could be hard to recover the firmware without desoldering a flash chip and flashing it separately. Please do not erase or write to a flash chip using this mode if you are not sure. Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> Change-Id: If47476793721a0061fd65bc6d1f98d48b03dc6c1 --- M cli_classic.c M flash.h M flashrom.c M libflashrom.c M libflashrom.h M spi25.c 6 files changed, 148 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/31830/1 diff --git a/cli_classic.c b/cli_classic.c index ced08c6..454df2b 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -51,6 +51,7 @@ " -V | --verbose more verbose output\n" " -c | --chip <chipname> probe only for specified flash chip\n" " -f | --force force specific operations (see man page)\n" + " --dangerous-bruteforce verify each small chunk and probe constantly\n" " -n | --noverify don't auto-verify\n" " -N | --noverify-all verify included regions only (cf. -i)\n" " -l | --layout <layoutfile> read ROM layout from <layoutfile>\n" @@ -104,7 +105,7 @@ #if CONFIG_PRINT_WIKI == 1 int list_supported_wiki = 0; #endif - int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; + int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0, bruteforce = 0, timeout = 30000; int dont_verify_it = 0, dont_verify_all = 0, list_supported = 0, operation_specified = 0; struct flashrom_layout *layout = NULL; enum programmer prog = PROGRAMMER_INVALID; @@ -113,6 +114,7 @@ OPTION_FMAP, OPTION_FMAP_FILE, OPTION_FLASH_CONTENTS, + OPTION_BRUTEFORCE, }; int ret = 0; @@ -127,6 +129,7 @@ {"chip", 1, NULL, 'c'}, {"verbose", 0, NULL, 'V'}, {"force", 0, NULL, 'f'}, + {"dangerous-bruteforce", 0, NULL, OPTION_BRUTEFORCE}, {"layout", 1, NULL, 'l'}, {"ifd", 0, NULL, OPTION_IFD}, {"fmap", 0, NULL, OPTION_FMAP}, @@ -228,6 +231,9 @@ case 'f': force = 1; break; + case OPTION_BRUTEFORCE: + bruteforce = 1; + break; case 'l': if (layoutfile) { fprintf(stderr, "Error: --layout specified " @@ -503,16 +509,27 @@ msg_pdbg("The following protocols are supported: %s.\n", tempstr); free(tempstr); - for (j = 0; j < registered_master_count; j++) { - startchip = 0; - while (chipcount < ARRAY_SIZE(flashes)) { - startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0); - if (startchip == -1) - break; - chipcount++; - startchip++; + do { + chipcount = 0; + for (j = 0; j < registered_master_count; j++) { + startchip = 0; + while (chipcount < ARRAY_SIZE(flashes)) { + startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0); + if (startchip == -1) + break; + chipcount++; + startchip++; + } } - } + timeout--; + if (!timeout) { + msg_cerr("Error: Timed out trying to detect a chip.\n"); + ret = 1; + goto out_shutdown; + } + } while (bruteforce && ( !chipcount || // wait for the correct chip detection + ((flashes[0].chip->manufacture_id == GENERIC_MANUF_ID) || + (flashes[0].chip->model_id == GENERIC_DEVICE_ID)) ) ); if (chipcount > 1) { msg_cinfo("Multiple flash chip definitions match the detected chip(s): \"%s\"", @@ -650,6 +667,7 @@ #if CONFIG_INTERNAL == 1 flashrom_flag_set(fill_flash, FLASHROM_FLAG_FORCE_BOARDMISMATCH, !!force_boardmismatch); #endif + flashrom_flag_set(fill_flash, FLASHROM_FLAG_BRUTEFORCE, !!bruteforce); flashrom_flag_set(fill_flash, FLASHROM_FLAG_VERIFY_AFTER_WRITE, !dont_verify_it); flashrom_flag_set(fill_flash, FLASHROM_FLAG_VERIFY_WHOLE_CHIP, !dont_verify_all); diff --git a/flash.h b/flash.h index 911214c..6ba116e 100644 --- a/flash.h +++ b/flash.h @@ -256,6 +256,7 @@ struct { bool force; bool force_boardmismatch; + bool bruteforce; bool verify_after_write; bool verify_whole_chip; } flags; diff --git a/flashrom.c b/flashrom.c index e82c32e..8f2c859 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1641,6 +1641,8 @@ size_t i, j; bool first = true; struct block_eraser *const eraser = &flashctx->chip->block_erasers[erasefunction]; + unsigned int bruteforce = flashrom_flag_get(flashctx, FLASHROM_FLAG_BRUTEFORCE); + int timeout; info->erase_start = 0; for (i = 0; i < NUM_ERASEREGIONS; ++i) { @@ -1662,9 +1664,34 @@ msg_cdbg(", "); msg_cdbg("0x%06x-0x%06x:", info->erase_start, info->erase_end); - ret = per_blockfn(flashctx, info, eraser->block_erase); - if (ret) - return ret; + if (!bruteforce) { + ret = per_blockfn(flashctx, info, eraser->block_erase); + if (ret) + return ret; + } else { + timeout = 30000; + while(1) { + timeout--; + if (!timeout) { + msg_cerr("%s timeout during command execution\n", __func__); + return 2; + } + + /* First probe. */ + if (flashctx->chip->probe(flashctx) != 1) + continue; + + ret = per_blockfn(flashctx, info, eraser->block_erase); + if (ret) + continue; + + /* Second probe. */ + if (flashctx->chip->probe(flashctx) != 1) + continue; + + break; + } + } } if (info->region_end < info->erase_start) break; diff --git a/libflashrom.c b/libflashrom.c index f90a22c..6dd0167 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -250,6 +250,7 @@ switch (flag) { case FLASHROM_FLAG_FORCE: flashctx->flags.force = value; break; case FLASHROM_FLAG_FORCE_BOARDMISMATCH: flashctx->flags.force_boardmismatch = value; break; + case FLASHROM_FLAG_BRUTEFORCE: flashctx->flags.bruteforce = value; break; case FLASHROM_FLAG_VERIFY_AFTER_WRITE: flashctx->flags.verify_after_write = value; break; case FLASHROM_FLAG_VERIFY_WHOLE_CHIP: flashctx->flags.verify_whole_chip = value; break; } @@ -267,6 +268,7 @@ switch (flag) { case FLASHROM_FLAG_FORCE: return flashctx->flags.force; case FLASHROM_FLAG_FORCE_BOARDMISMATCH: return flashctx->flags.force_boardmismatch; + case FLASHROM_FLAG_BRUTEFORCE: return flashctx->flags.bruteforce; case FLASHROM_FLAG_VERIFY_AFTER_WRITE: return flashctx->flags.verify_after_write; case FLASHROM_FLAG_VERIFY_WHOLE_CHIP: return flashctx->flags.verify_whole_chip; default: return false; diff --git a/libflashrom.h b/libflashrom.h index 38c95d2..0f2ead8 100644 --- a/libflashrom.h +++ b/libflashrom.h @@ -51,6 +51,7 @@ enum flashrom_flag { FLASHROM_FLAG_FORCE, FLASHROM_FLAG_FORCE_BOARDMISMATCH, + FLASHROM_FLAG_BRUTEFORCE, FLASHROM_FLAG_VERIFY_AFTER_WRITE, FLASHROM_FLAG_VERIFY_WHOLE_CHIP, }; diff --git a/spi25.c b/spi25.c index 8b6c462..832c836 100644 --- a/spi25.c +++ b/spi25.c @@ -21,6 +21,7 @@ #include <stddef.h> #include <string.h> #include <stdbool.h> +#include <stdlib.h> #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" @@ -655,6 +656,48 @@ return spi_send_command(flash, 1 + addr_len, len, cmd, bytes); } +static int spi_rw_bruteforce(struct flashctx *flash, uint8_t *buf1, uint8_t *buf2, + unsigned int startrw_here, unsigned int torw_len, bool rw_flag) { + int rc = 0; + int timeout = 30000; + while (1) { + timeout--; + if (!timeout) { + msg_cerr("%s timeout during command execution\n", __func__); + return -1; + } + + /* First probe. */ + if (flash->chip->probe(flash) != 1) + continue; + + /* First operation. */ + if (rw_flag == 0) + rc = spi_nbyte_read(flash, startrw_here, buf1, torw_len); + else + rc = spi_nbyte_program(flash, startrw_here, buf1, torw_len); + + if (rc != 0) + break; + + /* Second probe. */ + if (flash->chip->probe(flash) != 1) + continue; + + /* Second operation. */ + rc = spi_nbyte_read(flash, startrw_here, buf2, torw_len); + if (rc != 0) + break; + + /* Compare two buffers. */ + if (memcmp(buf1, buf2, torw_len)) + continue; + + break; + } + return rc; +} + /* * Read a part of the flash chip. * FIXME: Use the chunk code from Michael Karcher instead. @@ -668,6 +711,19 @@ /* Limit for multi-die 4-byte-addressing chips. */ unsigned int area_size = min(flash->chip->total_size * 1024, 16 * 1024 * 1024); + unsigned int bruteforce = flashrom_flag_get(flash, FLASHROM_FLAG_BRUTEFORCE); + uint8_t *const buf1 = bruteforce ? malloc(chunksize) : NULL; + uint8_t *const buf2 = bruteforce ? malloc(chunksize) : NULL; + + if (bruteforce) { + if (!buf1 || !buf2) { + msg_gerr("Out of memory!\n"); + goto _free_ret; + } + msg_cdbg("spi_read_chunked: chunksize %i ---> %i\n", chunksize, min(chunksize, 256)); + chunksize = min(chunksize, 256); + } + /* Warning: This loop has a very unusual condition and body. * The loop needs to go through each area with at least one affected * byte. The lowest area number is (start / area_size) since that @@ -685,7 +741,11 @@ lenhere = min(start + len, (i + 1) * area_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { toread = min(chunksize, lenhere - j); - rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); + if (bruteforce) { + rc = spi_rw_bruteforce(flash, buf1, buf2, starthere + j, toread, 0 /* read */); + memcpy(buf + starthere - start + j, buf1, toread); + } else + rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); if (rc) break; } @@ -693,6 +753,9 @@ break; } +_free_ret: + free(buf1); + free(buf2); return rc; } @@ -712,6 +775,19 @@ */ unsigned int page_size = flash->chip->page_size; + unsigned int bruteforce = flashrom_flag_get(flash, FLASHROM_FLAG_BRUTEFORCE); + uint8_t *const buf1 = bruteforce ? malloc(chunksize) : NULL; + uint8_t *const buf2 = bruteforce ? malloc(chunksize) : NULL; + + if (bruteforce) { + if (!buf1 || !buf2) { + msg_gerr("Out of memory!\n"); + goto _free_ret; + } + msg_cdbg("spi_write_chunked: chunksize %i ---> %i\n", chunksize, min(chunksize, 256)); + chunksize = min(chunksize, 256); + } + /* Warning: This loop has a very unusual condition and body. * The loop needs to go through each page with at least one affected * byte. The lowest page number is (start / page_size) since that @@ -731,12 +807,20 @@ int rc; towrite = min(chunksize, lenhere - j); - rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); + if (bruteforce) { + memcpy(buf1, buf + starthere - start + j, towrite); + rc = spi_rw_bruteforce(flash, buf1, buf2, starthere + j, towrite, 1 /* write */); + } else + rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); + if (rc) return rc; } } +_free_ret: + free(buf1); + free(buf2); return 0; } -- To view, visit https://review.coreboot.org/c/flashrom/+/31830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If47476793721a0061fd65bc6d1f98d48b03dc6c1 Gerrit-Change-Number: 31830 Gerrit-PatchSet: 1 Gerrit-Owner: mikeb mikeb <mikebdp2(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: newchange

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flashrom-gerrit August 2019