Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/23203 )
Change subject: Add support to get layout from fmap (e.g. coreboot rom)
......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/#/c/23203/10/cli_classic.c
File cli_classic.c:
https://review.coreboot.org/#/c/23203/10/cli_classic.c@254
PS10, Line 254: fprintf(stderr, "Error: --fmap and --ifd both specified. Aborting.\n")
> If you want to have these two optione really exclusive you shuld check in the case OPTION_IFD if fma […]
Layouts shouldn't be exclusive IMO, but we should handle it gracefully (checking conflicts for instance).
https://review.coreboot.org/#/c/23203/10/flashrom.8.tmpl
File flashrom.8.tmpl:
https://review.coreboot.org/#/c/23203/10/flashrom.8.tmpl@204
PS10, Line 204:
> Maybe add "on" here?
ok
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Werner Zeh has posted comments on this change. ( https://review.coreboot.org/23203 )
Change subject: Add support to get layout from fmap (e.g. coreboot rom)
......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/#/c/23203/10/cli_classic.c
File cli_classic.c:
https://review.coreboot.org/#/c/23203/10/cli_classic.c@254
PS10, Line 254: fprintf(stderr, "Error: --fmap and --ifd both specified. Aborting.\n")
If you want to have these two optione really exclusive you shuld check in the case OPTION_IFD if fmapfile has been assigned already. This would then cover the possibility of providing both exclusive arguments in a different order.
https://review.coreboot.org/#/c/23203/10/flashrom.8.tmpl
File flashrom.8.tmpl:
https://review.coreboot.org/#/c/23203/10/flashrom.8.tmpl@204
PS10, Line 204:
Maybe add "on" here?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/26946 )
Change subject: bitbang_spi: Add functions to optimize xfers
......................................................................
Patch Set 3:
Don't worry, if I give +2 it can stay as it is ;)
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Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/26949
to look at the new patch set (#3).
Change subject: flashchips: Add Macronix MX25U51245G
......................................................................
flashchips: Add Macronix MX25U51245G
Copy 'n paste support for Macronix MX25U51245G. I don't pretend to know
a whole lot about SPI FLASH so its mostly copied from other MX25U devices
and double checked a few bits and pieces against the datasheet.
I have tested basic probe, read, erase and write using layout files. I
tested both with 4MB@0x0000000 and 64K0@0x3f00000 (the later means I
have tested 4-byte addressing).
Change-Id: I2117fc205006088967f3d97644375d10db1791f1
Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org>
---
M flashchips.c
M flashchips.h
2 files changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/49/26949/3
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Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/26948
to look at the new patch set (#3).
Change subject: programmer: Add Developerbox/CP2104 bit bang driver
......................................................................
programmer: Add Developerbox/CP2104 bit bang driver
The 96Boards Developerbox (a.k.a. Synquacer E-series) provides a CP2102
debug UART with its GPIO pins hooked up to the SPI NOR FLASH. The
circuit is intended to provide emergency recovery functions without
requiring any additional tools (such as a JTAG or SPI programmer). This
was expected to be very slow (and it is) but CP2102 is much cheaper than
a full dual channel USB comms chip.
Read performance is roughly on par with a 2400 baud modem (between 60
and 70 minutes per megabyte if you prefer) and write performance is 50%
slower still. The full recovery process, with backup and verification of
4MB data written takes between 14 and 15 hours. Thus it is only really
practical as an emergency recovery tool, firmware developers will need
to use an alternative programmer.
Change-Id: I2547a96c1a2259ad0d52cd4b6ef42261b37cccf3
Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org>
---
M Makefile
A developerbox_spi.c
M flashrom.c
M programmer.h
4 files changed, 282 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/26948/3
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Hello Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/26947
to look at the new patch set (#3).
Change subject: bitbang_spi: Add half-duplex optimizations
......................................................................
bitbang_spi: Add half-duplex optimizations
Currently, the core of bitbang_spi is a full-duplex SPI loop but in
practice this code is only ever used half-duplex. Spliting this code
into two half duplex loops allows us to optimize performance by reducing
communications and/or CPU pipeline stalls.
The speed up varies depending on how much the overhead of
getting/setting pins dominates execution time. For a USB bit bang driver
running on a 7th generation Core i5, the time to probe drops from ~7.7
seconds to ~6.7 seconds when this patch is applied.
Change-Id: I33b9f363716f651146c09113bda5fffe53b16738
Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org>
---
M bitbang_spi.c
1 file changed, 19 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/47/26947/3
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Daniel Thompson has posted comments on this change. ( https://review.coreboot.org/26946 )
Change subject: bitbang_spi: Add functions to optimize xfers
......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/26946/2/bitbang_spi.c
File bitbang_spi.c:
https://review.coreboot.org/#/c/26946/2/bitbang_spi.c@47
PS2, Line 47: static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi)
> Now that I looked again, the `sck` parameter is not needed, its […]
How strongly do you feel about this? ;-)
I'm about to push a new patchset and I haven't acted on this one. Partly because we get in a mess with verbs[1] and partly because I prefer the code with the explicit set here if only because the mapping onto the unoptimized primitives is super obvious.
So I will change it if you really want it changed but if it
is marginal for you then I'll leave as it is!
[1]
Your comment applies equally to what is currently
called bitbang_spi_set_sck_get_mosi() so "clear" won't
work because it partners with "set" which now has
two meanings... maybe "raise" and "lower" would work.
https://review.coreboot.org/#/c/26946/2/bitbang_spi.c@157
PS2, Line 157: bitbang_spi_set_sck(master, 0);
> "For the first cycle, ..." that is actually redundant with the […]
Reading this back after a break I'm not quite sure whether "nothing to argue about" means I should leave the code as is or if you still want to explore CPOL=1, CPHA=1 further.
Either way to save you having to check the code then the patchset I'm about to push is still CPOL=0, CPHA=0.
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Miklós Márton has uploaded a new patch set (#8) to the change originally created by David Hendricks. ( https://review.coreboot.org/25683 )
Change subject: Add support for National Instruments USB-845x devices
......................................................................
Add support for National Instruments USB-845x devices
Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549
Signed-off-by: Miklós Márton <martonmiklosqdev(a)gmail.com>
---
M Makefile
M flashrom.8.tmpl
M flashrom.c
A ni845x_spi.c
M programmer.h
5 files changed, 640 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/83/25683/8
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