flashrom August 2010

flashrom@flashrom.org

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209 discussions

[commit] r1136 - trunk
by repository service 08 Aug '10

08 Aug '10

Author: mkarcher Date: Sun Aug 8 23:56:52 2010 New Revision: 1136 URL: http://flashrom.org/trac/coreboot/changeset/1136 Log: Add dmidecode quirk workaround dmidecode emits a warning message about unsupported SMBIOS versions to stdout before the information asked for when using "-s". I consider this behaviour broken, but we still need to workaround it as e.g. Fedora currently distributes an dmidecode with this behaviour. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/dmi.c Modified: trunk/dmi.c ============================================================================== --- trunk/dmi.c Sun Aug 8 19:04:21 2010 (r1135) +++ trunk/dmi.c Sun Aug 8 23:56:52 2010 (r1136) @@ -76,15 +76,24 @@ msg_perr("DMI pipe open error\n"); return NULL; } - if (!fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe)) { - if(ferror(dmidecode_pipe)) { - msg_perr("DMI pipe read error\n"); - pclose(dmidecode_pipe); - return NULL; - } else { - answerbuf[0] = 0; /* Hit EOF */ + + /* Kill lines starting with '#', as recent dmidecode versions + have the quirk to emit a "# SMBIOS implementations newer..." + message even on "-s" if the SMBIOS declares a + newer-than-supported version number, while it *should* only print + the requested string. */ + do { + if (!fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe)) { + if(ferror(dmidecode_pipe)) { + msg_perr("DMI pipe read error\n"); + pclose(dmidecode_pipe); + return NULL; + } else { + answerbuf[0] = 0; /* Hit EOF */ + } } - } + } while(answerbuf[0] == '#'); + /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent deadlock on pclose. */ while (!feof(dmidecode_pipe))

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MSI Neo4-F/Neo4/Neo4 Platinum clarification (Re: Scary error message)
by Uwe Hermann 08 Aug '10

08 Aug '10

Hi folks, (I'm deliberately breaking the thread otherwise most people will probably miss this as the original thread is from Nov 2009) On Wed, Dec 23, 2009 at 04:08:10AM +0100, Luc Verhaegen wrote: > On Mon, Nov 09, 2009 at 08:45:45PM -0800, Fraser Hanson wrote: > > Hi, > > > > I flashed my bios with flashrom tonight and got the scary warning > > message saying "erase failed" and "do not reboot". > > > > I haven't rebooted. > > > > As far as I can tell from using flashrom itself, everything is > > actually fine. The erase appears to have failed at physical address 0, > > which I would guess means that nothing actually happened. > > > > I had taken a dump of the original bios before starting, and "flashrom > > -v" now verifies that it is identical. > > > > Furthermore, a new dump of the bios matches the original dump from > > before I tried to write the bios. > > > > My board is an MSI K8N Neo4 Platinum. > > > > Output from my dump attempt and subsequent messing around follows. > > > > Do I have your blessing to reboot my machine? > > > > --Fraser > > -> r816. > > Luc Verhaegen. I'm browsing some old board reports on the mailing list and stumbled upon this one here. What we have right now in svn trunk is this: * Suited for: * - MSI K8N Neo4: NVIDIA CK804 [...] {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, I.e., the comment talks about "MSI K8N Neo4" while the name in the board-enable is "MSI K8N Neo4-F" (note the added -F). However, in http://www.flashrom.org/pipermail/flashrom/2009-November/000889.html the user reported that the board is a "K8N Neo4 Platinum (PCB 1.0)" from http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=165 On the MSI page, searching for "neo4" I can see: K8N Neo4 Platinum (PCB 1.0) K8N Neo4 Platinum (PCB 3.0) K8N Neo4-F (PCB 1.0) K8N Neo4-F (PCB 3.0) K8N Neo4-FI (PCB 1.0) K8N Neo4-FX (PCB 1.0) So there are two Neo4-F versions (probably differing hardware) and two Neo4-F versions (also potentially differing hardware). I cannot spot any pure "Neo4" board without any suffix on the current website. Fraser, could you please use the latest flashrom from svn and send us the following info: * flashrom -V * lspci -nnvvvxxx * superiotool -deV Also, can you confirm that the board you have is indeed "K8N Neo4 Platinum (PCB 1.0)"? It's probably best to check what is actually printed on the board itself, I wouldn't entirely trust dmidecode or similar tools. We should fix the board name in the code in one direction or the other. It would also be nice to get a report of whether the current board-enable for the mainboard works (this requires a write or erase test), I think we never got a report, so we should probably mark the board-enable as untested for now. Thanks, Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r1134 - trunk
by repository service 08 Aug '10

08 Aug '10

Author: uwe Date: Sun Aug 8 19:01:18 2010 New Revision: 1134 URL: http://flashrom.org/trac/coreboot/changeset/1134 Log: Various cosmetic and coding-style fixes (trivial). - Fix incorrect whitespace, indentation, and coding style in some places. - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use it, the comments are useless as we don't have any Doxygen markup in there. - Use consistent vendor name spelling as per current website (NVIDIA, abit, GIGABYTE). - Use consistent / common format for "Suited for:" lines in board_enable.c. - Add some missing 'void's in functions taking no arguments. - Add missing fullstops in sentences, remove them from non-sentences (lists). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/flashrom.8 trunk/flashrom.c trunk/mcp6x_spi.c trunk/print.c trunk/programmer.h Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Aug 8 18:05:23 2010 (r1133) +++ trunk/board_enable.c Sun Aug 8 19:01:18 2010 (r1134) @@ -96,7 +96,7 @@ } #endif -/** +/* * SMSC FDC37B787: Raise GPIO50 */ static int fdc37b787_gpio50_raise(uint16_t port) @@ -127,8 +127,9 @@ return 0; } -/** - * Suited for Nokia IP530: Intel 440BX + PIIX4 + FDC37B787 +/* + * Suited for: + * - Nokia IP530: Intel 440BX + PIIX4 + FDC37B787 */ static int fdc37b787_gpio50_raise_3f0(void) { @@ -226,37 +227,40 @@ {WINBOND_W83627THF_ID, ARRAY_SIZE(w83627thf), w83627thf}, }; -/* Detects which Winbond Super I/O is responding at the given base - address, but takes no effort to make sure the chip is really a - Winbond Super I/O */ - -static const struct winbond_chip * winbond_superio_detect(uint16_t base) +/* + * Detects which Winbond Super I/O is responding at the given base address, + * but takes no effort to make sure the chip is really a Winbond Super I/O. + */ +static const struct winbond_chip *winbond_superio_detect(uint16_t base) { uint8_t chipid; - const struct winbond_chip * chip = NULL; + const struct winbond_chip *chip = NULL; int i; w836xx_ext_enter(base); chipid = sio_read(base, 0x20); - for (i = 0; i < ARRAY_SIZE(winbond_chips); i++) - if (winbond_chips[i].device_id == chipid) - { + + for (i = 0; i < ARRAY_SIZE(winbond_chips); i++) { + if (winbond_chips[i].device_id == chipid) { chip = &winbond_chips[i]; break; } - + } + w836xx_ext_leave(base); return chip; } -/* The chipid parameter goes away as soon as we have Super I/O matching in the - board enable table. The call to winbond_superio_detect goes away as - soon as we have generic Super I/O detection code. */ +/* + * The chipid parameter goes away as soon as we have Super I/O matching in the + * board enable table. The call to winbond_superio_detect() goes away as + * soon as we have generic Super I/O detection code. + */ static int winbond_gpio_set(uint16_t base, enum winbond_id chipid, int pin, int raise) { - const struct winbond_chip * chip = NULL; - const struct winbond_port * gpio; + const struct winbond_chip *chip = NULL; + const struct winbond_port *gpio; int port = pin / 10; int bit = pin % 10; @@ -286,18 +290,18 @@ w836xx_ext_enter(base); - /* Select logical device */ + /* Select logical device. */ sio_write(base, 0x07, gpio->ldn); /* Activate logical device. */ sio_mask(base, 0x30, 1 << gpio->enable_bit, 1 << gpio->enable_bit); - /* Select GPIO function of that pin */ + /* Select GPIO function of that pin. */ if (gpio->mux && gpio->mux[bit].reg) sio_mask(base, gpio->mux[bit].reg, gpio->mux[bit].data, gpio->mux[bit].mask); - sio_mask(base, gpio->base + 0, 0, 1 << bit); /* make pin output */ + sio_mask(base, gpio->base + 0, 0, 1 << bit); /* Make pin output */ sio_mask(base, gpio->base + 2, 0, 1 << bit); /* Clear inversion */ sio_mask(base, gpio->base + 1, raise << bit, 1 << bit); @@ -306,66 +310,65 @@ return 0; } -/** +/* * Winbond W83627HF: Raise GPIO24. * * Suited for: * - Agami Aruma * - IWILL DK8-HTX */ -static int w83627hf_gpio24_raise_2e() +static int w83627hf_gpio24_raise_2e(void) { return winbond_gpio_set(0x2e, WINBOND_W83627HF_ID, 24, 1); } -/** +/* * Winbond W83627HF: Raise GPIO25. * * Suited for: * - MSI MS-6577 */ -static int w83627hf_gpio25_raise_2e() +static int w83627hf_gpio25_raise_2e(void) { return winbond_gpio_set(0x2e, WINBOND_W83627HF_ID, 25, 1); } -/** +/* * Winbond W83627EHF: Raise GPIO24. * * Suited for: - * - ASUS A8N-VM CSM: AMD Socket 939 + GeForce 6150 (C51) + MCP51. + * - ASUS A8N-VM CSM: AMD Socket 939 + GeForce 6150 (C51) + MCP51 */ -static int w83627ehf_gpio24_raise_2e() +static int w83627ehf_gpio24_raise_2e(void) { return winbond_gpio_set(0x2e, WINBOND_W83627EHF_ID, 24, 1); } -/** +/* * Winbond W83627THF: Raise GPIO 44. * * Suited for: * - MSI K8T Neo2-F */ -static int w83627thf_gpio44_raise_2e() +static int w83627thf_gpio44_raise_2e(void) { return winbond_gpio_set(0x2e, WINBOND_W83627THF_ID, 44, 1); } -/** +/* * Winbond W83627THF: Raise GPIO 44. * * Suited for: * - MSI K8N Neo3 */ -static int w83627thf_gpio44_raise_4e() +static int w83627thf_gpio44_raise_4e(void) { return winbond_gpio_set(0x4e, WINBOND_W83627THF_ID, 44, 1); } -/** +/* * Enable MEMW# and set ROM size to max. - * Supported chips: - * W83L517D, W83697HF/F/HG, W83697SF/UF/UG + * Supported chips: W83L517D, W83697HF/F/HG, W83697SF/UF/UG */ static void w836xx_memw_enable(uint16_t port) { @@ -377,13 +380,13 @@ w836xx_ext_leave(port); } -/** +/* * Suited for: - * - EPoX EP-8K5A2: VIA KT333 + VT8235. - * - Albatron PM266A Pro: VIA P4M266A + VT8235. - * - Shuttle AK31 (all versions): VIA KT266 + VT8233. - * - ASUS A7V8X-MX SE and A7V400-MX: AMD K7 + VIA KM400A + VT8235 - * - Tyan S2498 (Tomcat K7M): AMD Geode NX + VIA KM400 + VT8237. + * - EPoX EP-8K5A2: VIA KT333 + VT8235 + * - Albatron PM266A Pro: VIA P4M266A + VT8235 + * - Shuttle AK31 (all versions): VIA KT266 + VT8233 + * - ASUS A7V8X-MX SE and A7V400-MX: AMD K7 + VIA KM400A + VT8235 + * - Tyan S2498 (Tomcat K7M): AMD Geode NX + VIA KM400 + VT8237 */ static int w836xx_memw_enable_2e(void) { @@ -392,9 +395,9 @@ return 0; } -/** +/* * Suited for: - * - Termtek TK-3370 (rev. 2.5b) + * - Termtek TK-3370 (rev. 2.5b) */ static int w836xx_memw_enable_4e(void) { @@ -403,7 +406,7 @@ return 0; } -/** +/* * Suited for all boards with ITE IT8705F. * The SIS950 Super I/O probably requires a similar flash write enable. */ @@ -494,46 +497,46 @@ static int pc87360_gpio_set(uint8_t gpio, int raise) { - static const int bankbase[] = {0, 4, 8, 10, 12}; - int gpio_bank = gpio / 8; - int gpio_pin = gpio % 8; - uint16_t baseport; - uint8_t id, val; - - if (gpio_bank > 4) { - msg_perr("PC87360: Invalid GPIO %d\n", gpio); - return -1; - } + static const int bankbase[] = {0, 4, 8, 10, 12}; + int gpio_bank = gpio / 8; + int gpio_pin = gpio % 8; + uint16_t baseport; + uint8_t id, val; - id = sio_read(0x2E, 0x20); - if (id != 0xE1) { - msg_perr("PC87360: unexpected ID %02x\n", id); - return -1; - } + if (gpio_bank > 4) { + msg_perr("PC87360: Invalid GPIO %d\n", gpio); + return -1; + } - sio_write(0x2E, 0x07, 0x07); /* Select GPIO device */ - baseport = (sio_read(0x2E, 0x60) << 8) | sio_read(0x2E, 0x61); - if ((baseport & 0xFFF0) == 0xFFF0 || baseport == 0) { - msg_perr("PC87360: invalid GPIO base address %04x\n", - baseport); - return -1; - } - sio_mask (0x2E, 0x30, 0x01, 0x01); /* Enable logical device */ - sio_write(0x2E, 0xF0, gpio_bank * 16 + gpio_pin); - sio_mask (0x2E, 0xF1, 0x01, 0x01); /* Make pin output */ - - val = INB(baseport + bankbase[gpio_bank]); - if (raise) - val |= 1 << gpio_pin; - else - val &= ~(1 << gpio_pin); - OUTB(val, baseport + bankbase[gpio_bank]); + id = sio_read(0x2E, 0x20); + if (id != 0xE1) { + msg_perr("PC87360: unexpected ID %02x\n", id); + return -1; + } - return 0; + sio_write(0x2E, 0x07, 0x07); /* Select GPIO device. */ + baseport = (sio_read(0x2E, 0x60) << 8) | sio_read(0x2E, 0x61); + if ((baseport & 0xFFF0) == 0xFFF0 || baseport == 0) { + msg_perr("PC87360: invalid GPIO base address %04x\n", + baseport); + return -1; + } + sio_mask (0x2E, 0x30, 0x01, 0x01); /* Enable logical device. */ + sio_write(0x2E, 0xF0, gpio_bank * 16 + gpio_pin); + sio_mask (0x2E, 0xF1, 0x01, 0x01); /* Make pin output. */ + + val = INB(baseport + bankbase[gpio_bank]); + if (raise) + val |= 1 << gpio_pin; + else + val &= ~(1 << gpio_pin); + OUTB(val, baseport + bankbase[gpio_bank]); + + return 0; } -/** - * VT823x: Set one of the GPIO pins. +/* + * VIA VT823x: Set one of the GPIO pins. */ static int via_vt823x_gpio_set(uint8_t gpio, int raise) { @@ -588,8 +591,9 @@ return 0; } -/** - * Suited for ASUS M2V-MX: VIA K8M890 + VT8237A + IT8716F +/* + * Suited for: + * - ASUS M2V-MX: VIA K8M890 + VT8237A + IT8716F */ static int via_vt823x_gpio5_raise(void) { @@ -597,16 +601,18 @@ return via_vt823x_gpio_set(5, 1); } -/** - * Suited for VIA EPIA EK & N & NL. +/* + * Suited for: + * - VIA EPIA EK & N & NL */ static int via_vt823x_gpio9_raise(void) { return via_vt823x_gpio_set(9, 1); } -/** - * Suited for VIA EPIA M and MII, and maybe other CLE266 based EPIAs. +/* + * Suited for: + * - VIA EPIA M and MII (and maybe other CLE266 based EPIAs) * * We don't need to do this for EPIA M when using coreboot, GPIO15 is never * lowered there. @@ -616,12 +622,12 @@ return via_vt823x_gpio_set(15, 1); } -/** +/* * Winbond W83697HF Super I/O + VIA VT8235 southbridge * * Suited for: - * - MSI KT4V and KT4V-L: AMD K7 + VIA KT400 + VT8235 - * - MSI KT4 Ultra: AMD K7 + VIA KT400 + VT8235 + * - MSI KT4V and KT4V-L: AMD K7 + VIA KT400 + VT8235 + * - MSI KT4 Ultra: AMD K7 + VIA KT400 + VT8235 */ static int board_msi_kt4v(void) { @@ -633,8 +639,9 @@ return ret; } -/** - * Suited for ASUS P5A. +/* + * Suited for: + * - ASUS P5A * * This is rather nasty code, but there's no way to do this cleanly. * We're basically talking to some unknown device on SMBus, my guess @@ -712,7 +719,7 @@ /* * Set GPIO lines in the Broadcom HT-1000 southbridge. * - * It's not a Super I/O but it uses the same index/data port method. + * It's not a Super I/O but it uses the same index/data port method. */ static int board_hp_dl145_g3_enable(void) { @@ -726,7 +733,7 @@ /* * Set GPIO lines in the Broadcom HT-1000 southbridge. * - * It's not a Super I/O but it uses the same index/data port method. + * It's not a Super I/O but it uses the same index/data port method. */ static int board_hp_dl165_g6_enable(void) { @@ -739,14 +746,15 @@ static int board_ibm_x3455(void) { - /* raise gpio13 */ + /* Raise GPIO13. */ sio_mask(0xcd6, 0x45, 0x20, 0x20); return 0; } -/** - * Suited for Shuttle FN25 (SN25P): AMD S939 + NVIDIA CK804 (nForce4). +/* + * Suited for: + * - Shuttle FN25 (SN25P): AMD S939 + NVIDIA CK804 (nForce4) */ static int board_shuttle_fn25(void) { @@ -764,7 +772,7 @@ return 0; } -/** +/* * Very similar to AMD 8111 IO Hub. */ static int nvidia_mcp_gpio_set(int gpio, int raise) @@ -837,110 +845,121 @@ return 0; } -/** - * Suited for ASUS A8N-LA: nVidia MCP51. - * Suited for ASUS M2NBP-VM CSM: NVIDIA MCP51. +/* + * Suited for: + * - ASUS A8N-LA: NVIDIA MCP51 + * - ASUS M2NBP-VM CSM: NVIDIA MCP51 */ static int nvidia_mcp_gpio0_raise(void) { return nvidia_mcp_gpio_set(0x00, 1); } -/** - * Suited for Abit KN8 Ultra: nVidia CK804. +/* + * Suited for: + * - abit KN8 Ultra: NVIDIA CK804 */ static int nvidia_mcp_gpio2_lower(void) { return nvidia_mcp_gpio_set(0x02, 0); } -/** - * Suited for MSI K8N Neo4: NVIDIA CK804. - * Suited for MSI K8N GM2-L: NVIDIA MCP51. +/* + * Suited for: + * - MSI K8N Neo4: NVIDIA CK804 + * - MSI K8N GM2-L: NVIDIA MCP51 */ static int nvidia_mcp_gpio2_raise(void) { return nvidia_mcp_gpio_set(0x02, 1); } - -/** - * Suited for HP xw9400 (Tyan S2915-E OEM): Dual(!) nVidia MCP55. - * Notes: a) There are two MCP55 chips, so also two SMBus bridges on that - * board. We can't tell the SMBus logical devices apart, but we - * can tell the LPC bridge functions apart. - * We need to choose the SMBus bridge next to the LPC bridge with - * ID 0x364 and the "LPC bridge" class. - * b) #TBL is hardwired on that board to a pull-down. It can be - * overridden by connecting the two solder points next to F2. +/* + * Suited for: + * - HP xw9400 (Tyan S2915-E OEM): Dual(!) NVIDIA MCP55 + * + * Notes: a) There are two MCP55 chips, so also two SMBus bridges on that + * board. We can't tell the SMBus logical devices apart, but we + * can tell the LPC bridge functions apart. + * We need to choose the SMBus bridge next to the LPC bridge with + * ID 0x364 and the "LPC bridge" class. + * b) #TBL is hardwired on that board to a pull-down. It can be + * overridden by connecting the two solder points next to F2. */ static int nvidia_mcp_gpio5_raise(void) { return nvidia_mcp_gpio_set(0x05, 1); } -/** - * Suited for Abit NF7-S: NVIDIA CK804. +/* + * Suited for: + * - abit NF7-S: NVIDIA CK804 */ static int nvidia_mcp_gpio8_raise(void) { return nvidia_mcp_gpio_set(0x08, 1); } -/** - * Suited for MSI K8N Neo2 Platinum: Socket 939 + nForce3 Ultra + CK8. +/* + * Suited for: + * - MSI K8N Neo2 Platinum: Socket 939 + nForce3 Ultra + CK8 */ static int nvidia_mcp_gpio0c_raise(void) { return nvidia_mcp_gpio_set(0x0c, 1); } -/** - * Suited for abit NF-M2 nView: Socket AM2 + NVIDIA MCP51. +/* + * Suited for: + * - abit NF-M2 nView: Socket AM2 + NVIDIA MCP51 */ static int nvidia_mcp_gpio4_lower(void) { return nvidia_mcp_gpio_set(0x04, 0); } -/** - * Suited for ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04. +/* + * Suited for: + * - ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04 */ static int nvidia_mcp_gpio10_raise(void) { return nvidia_mcp_gpio_set(0x10, 1); } -/** - * Suited for the Gigabyte GA-K8N-SLI: CK804 southbridge. +/* + * Suited for: + * - GIGABYTE GA-K8N-SLI: AMD socket 939 + NVIDIA CK804 + ITE IT8712F */ static int nvidia_mcp_gpio21_raise(void) { return nvidia_mcp_gpio_set(0x21, 0x01); } -/** - * Suited for EPoX EP-8RDA3+: Socket A + nForce2 Ultra 400 + MCP2. +/* + * Suited for: + * - EPoX EP-8RDA3+: Socket A + nForce2 Ultra 400 + MCP2 */ static int nvidia_mcp_gpio31_raise(void) { return nvidia_mcp_gpio_set(0x31, 0x01); } -/** - * Suited for Artec Group DBE61 and DBE62. +/* + * Suited for: + * - Artec Group DBE61 and DBE62 */ static int board_artecgroup_dbe6x(void) { #define DBE6x_MSR_DIVIL_BALL_OPTS 0x51400015 -#define DBE6x_PRI_BOOT_LOC_SHIFT (2) -#define DBE6x_BOOT_OP_LATCHED_SHIFT (8) -#define DBE6x_SEC_BOOT_LOC_SHIFT (10) +#define DBE6x_PRI_BOOT_LOC_SHIFT 2 +#define DBE6x_BOOT_OP_LATCHED_SHIFT 8 +#define DBE6x_SEC_BOOT_LOC_SHIFT 10 #define DBE6x_PRI_BOOT_LOC (3 << DBE6x_PRI_BOOT_LOC_SHIFT) #define DBE6x_BOOT_OP_LATCHED (3 << DBE6x_BOOT_OP_LATCHED_SHIFT) #define DBE6x_SEC_BOOT_LOC (3 << DBE6x_SEC_BOOT_LOC_SHIFT) -#define DBE6x_BOOT_LOC_FLASH (2) -#define DBE6x_BOOT_LOC_FWHUB (3) +#define DBE6x_BOOT_LOC_FLASH 2 +#define DBE6x_BOOT_LOC_FWHUB 3 msr_t msr; unsigned long boot_loc; @@ -968,7 +987,7 @@ return 0; } -/** +/* * Helper function to raise/drop a given gpo line on Intel PIIX4{,E,M}. */ static int intel_piix4_gpo_set(unsigned int gpo, int raise) @@ -983,20 +1002,20 @@ return -1; } - /* sanity check */ + /* Sanity check. */ if (gpo > 30) { msg_perr("\nERROR: Intel PIIX4 has no GPO%d.\n", gpo); return -1; } - /* these are dual function pins which are most likely in use already */ + /* These are dual function pins which are most likely in use already. */ if (((gpo >= 1) && (gpo <= 7)) || ((gpo >= 9) && (gpo <= 21)) || (gpo == 29)) { msg_perr("\nERROR: Unsupported PIIX4 GPO%d.\n", gpo); return -1; } - /* dual function that need special enable. */ + /* Dual function that need special enable. */ if ((gpo >= 22) && (gpo <= 26)) { tmp = pci_read_long(dev, 0xB0); /* GENCFG */ switch (gpo) { @@ -1040,23 +1059,25 @@ return 0; } -/** - * Suited for EPoX EP-BX3, and maybe some other Intel 440BX based boards. +/* + * Suited for: + * - EPoX EP-BX3 */ static int board_epox_ep_bx3(void) { return intel_piix4_gpo_set(22, 1); } -/** - * Suited for Intel SE440BX-2 +/* + * Suited for: + * - Intel SE440BX-2 */ static int intel_piix4_gpo27_lower(void) { - return intel_piix4_gpo_set(27, 0); + return intel_piix4_gpo_set(27, 0); } -/** +/* * Set a GPIO line on a given Intel ICH LPC controller. */ static int intel_ich_gpio_set(int gpio, int raise) @@ -1129,12 +1150,14 @@ return -1; } - /* According to the datasheets, all Intel ICHs have the GPIO bar 5:1 - strapped to zero. From some mobile ICH9 version on, this becomes - 6:1. The mask below catches all. */ + /* + * According to the datasheets, all Intel ICHs have the GPIO bar 5:1 + * strapped to zero. From some mobile ICH9 version on, this becomes + * 6:1. The mask below catches all. + */ base = pci_read_word(dev, intel_ich_gpio_table[i].base_reg) & 0xFFC0; - /* check whether the line is allowed */ + /* Check whether the line is allowed. */ if (gpio < 32) allowed = (intel_ich_gpio_table[i].bank0 >> gpio) & 0x01; else if (gpio < 64) @@ -1152,7 +1175,7 @@ raise ? "Rais" : "Dropp", gpio); if (gpio < 32) { - /* Set line to GPIO */ + /* Set line to GPIO. */ tmp = INL(base); /* ICH/ICH0 multiplexes 27/28 on the line set. */ if ((gpio == 28) && @@ -1174,12 +1197,12 @@ } } - /* Set GPIO to OUTPUT */ + /* Set GPIO to OUTPUT. */ tmp = INL(base + 0x04); tmp &= ~(1 << gpio); OUTL(tmp, base + 0x04); - /* Raise GPIO line */ + /* Raise GPIO line. */ tmp = INL(base + 0x0C); if (raise) tmp |= 1 << gpio; @@ -1189,7 +1212,7 @@ } else if (gpio < 64) { gpio -= 32; - /* Set line to GPIO */ + /* Set line to GPIO. */ tmp = INL(base + 0x30); tmp |= 1 << gpio; OUTL(tmp, base + 0x30); @@ -1206,12 +1229,12 @@ } } - /* Set GPIO to OUTPUT */ + /* Set GPIO to OUTPUT. */ tmp = INL(base + 0x34); tmp &= ~(1 << gpio); OUTL(tmp, base + 0x34); - /* Raise GPIO line */ + /* Raise GPIO line. */ tmp = INL(base + 0x38); if (raise) tmp |= 1 << gpio; @@ -1221,7 +1244,7 @@ } else { gpio -= 64; - /* Set line to GPIO */ + /* Set line to GPIO. */ tmp = INL(base + 0x40); tmp |= 1 << gpio; OUTL(tmp, base + 0x40); @@ -1233,12 +1256,12 @@ return -1; } - /* Set GPIO to OUTPUT */ + /* Set GPIO to OUTPUT. */ tmp = INL(base + 0x44); tmp &= ~(1 << gpio); OUTL(tmp, base + 0x44); - /* Raise GPIO line */ + /* Raise GPIO line. */ tmp = INL(base + 0x48); if (raise) tmp |= 1 << gpio; @@ -1250,55 +1273,59 @@ return 0; } -/** - * Suited for Abit IP35: Intel P35 + ICH9R. - * Suited for Abit IP35 Pro: Intel P35 + ICH9R. +/* + * Suited for: + * - abit IP35: Intel P35 + ICH9R + * - abit IP35 Pro: Intel P35 + ICH9R */ static int intel_ich_gpio16_raise(void) { return intel_ich_gpio_set(16, 1); } -/** - * Suited for HP Puffer2-UL8E (ASUS PTGD-LA OEM): LGA775 + 915 + ICH6. +/* + * Suited for: + * - HP Puffer2-UL8E (ASUS PTGD-LA OEM): LGA775 + 915 + ICH6 */ static int intel_ich_gpio18_raise(void) { return intel_ich_gpio_set(18, 1); } -/** - * Suited for ASUS A8JM: Intel 945 + ICH7 +/* + * Suited for: + * - ASUS A8JM: Intel 945 + ICH7 */ static int intel_ich_gpio34_raise(void) { return intel_ich_gpio_set(34, 1); } -/** - * Suited for MSI MS-7046: LGA775 + 915P + ICH6. +/* + * Suited for: + * - MSI MS-7046: LGA775 + 915P + ICH6 */ static int intel_ich_gpio19_raise(void) { return intel_ich_gpio_set(19, 1); } -/** +/* * Suited for: - * - ASUS P4B266LM (Sony Vaio PCV-RX650): socket478 + 845D + ICH2. - * - ASUS P4C800-E Deluxe: socket478 + 875P + ICH5. - * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R. - * - ASUS P5PE-VM: Intel LGA775 + 865G + ICH5. - * - Samsung Polaris 32: socket478 + 865P + ICH5. + * - ASUS P4B266LM (Sony Vaio PCV-RX650): socket478 + 845D + ICH2 + * - ASUS P4C800-E Deluxe: socket478 + 875P + ICH5 + * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R + * - ASUS P5PE-VM: Intel LGA775 + 865G + ICH5 + * - Samsung Polaris 32: socket478 + 865P + ICH5 */ static int intel_ich_gpio21_raise(void) { return intel_ich_gpio_set(21, 1); } -/** +/* * Suited for: - * - ASUS P4B266: socket478 + Intel 845D + ICH2. + * - ASUS P4B266: socket478 + Intel 845D + ICH2 * - ASUS P4B533-E: socket478 + 845E + ICH4 * - ASUS P4B-MX variant in HP Vectra VL420 SFF: socket478 + 845D + ICH2 */ @@ -1307,58 +1334,62 @@ return intel_ich_gpio_set(22, 1); } -/** - * Suited for HP Vectra VL400: 815 + ICH + PC87360. +/* + * Suited for: + * - HP Vectra VL400: 815 + ICH + PC87360 */ - static int board_hp_vl400(void) { - int ret; - ret = intel_ich_gpio_set(25, 1); /* Master write enable ? */ - if (!ret) - ret = pc87360_gpio_set(0x09, 1); /* #WP ? */ - if (!ret) - ret = pc87360_gpio_set(0x27, 1); /* #TBL */ - return ret; + int ret; + ret = intel_ich_gpio_set(25, 1); /* Master write enable ? */ + if (!ret) + ret = pc87360_gpio_set(0x09, 1); /* #WP ? */ + if (!ret) + ret = pc87360_gpio_set(0x27, 1); /* #TBL */ + return ret; } -/** - * Suited for: - * - Dell PowerEdge 1850: Intel PPGA604 + E7520 + ICH5R. - * - ASRock P4i65GV: Intel Socket478 + 865GV + ICH5R. - * - ASRock 775i65G: Intel LGA 775 + 865G + ICH5. +/* + * Suited for: + * - Dell PowerEdge 1850: Intel PPGA604 + E7520 + ICH5R + * - ASRock P4i65GV: Intel Socket478 + 865GV + ICH5R + * - ASRock 775i65G: Intel LGA 775 + 865G + ICH5 */ static int intel_ich_gpio23_raise(void) { return intel_ich_gpio_set(23, 1); } -/** - * Suited for GIGABYTE GA-8IRML: Intel Socket478 + i845 + ICH2. +/* + * Suited for: + * - GIGABYTE GA-8IRML: Intel Socket478 + i845 + ICH2 */ static int intel_ich_gpio25_raise(void) { return intel_ich_gpio_set(25, 1); } -/** - * Suited for IBase MB899: i945GM + ICH7. +/* + * Suited for: + * - IBASE MB899: i945GM + ICH7 */ static int intel_ich_gpio26_raise(void) { return intel_ich_gpio_set(26, 1); } -/** - * Suited for P4SD-LA (HP OEM): i865 + ICH5 +/* + * Suited for: + * - P4SD-LA (HP OEM): i865 + ICH5 */ static int intel_ich_gpio32_raise(void) { return intel_ich_gpio_set(32, 1); } -/** - * Suited for Acorp 6A815EPD: socket 370 + intel 815 + ICH2. +/* + * Suited for: + * - Acorp 6A815EPD: socket 370 + intel 815 + ICH2 */ static int board_acorp_6a815epd(void) { @@ -1372,8 +1403,9 @@ return ret; } -/** - * Suited for Kontron 986LCD-M: socket478 + 915GM + ICH7R. +/* + * Suited for: + * - Kontron 986LCD-M: Socket478 + 915GM + ICH7R */ static int board_kontron_986lcd_m(void) { @@ -1386,8 +1418,9 @@ return ret; } -/** - * Suited for Soyo SY-7VCA: Pro133A + VT82C686. +/* + * Suited for: + * - Soyo SY-7VCA: Pro133A + VT82C686 */ static int via_apollo_gpo_set(int gpio, int raise) { @@ -1438,29 +1471,33 @@ return 0; } -/** - * Suited for Abit VT6X4: Pro133x + VT82C686A +/* + * Suited for: + * - abit VT6X4: Pro133x + VT82C686A */ static int via_apollo_gpo4_lower(void) { return via_apollo_gpo_set(4, 0); } -/** - * Suited for Soyo SY-7VCA: Pro133A + VT82C686. +/* + * Suited for: + * - Soyo SY-7VCA: Pro133A + VT82C686 */ static int via_apollo_gpo0_lower(void) { return via_apollo_gpo_set(0, 0); } -/** +/* * Enable some GPIO pin on SiS southbridge. - * Suited for MSI 651M-L: SiS651 / SiS962 + * + * Suited for: + * - MSI 651M-L: SiS651 / SiS962 */ static int board_msi_651ml(void) { - struct pci_dev *dev; + struct pci_dev *dev; uint16_t base, temp; dev = pci_dev_find(0x1039, 0x0962); @@ -1469,7 +1506,7 @@ return 1; } - /* Registers 68 and 64 seem like bitmaps */ + /* Registers 68 and 64 seem like bitmaps. */ base = pci_read_word(dev, 0x74); temp = INW(base + 0x68); temp &= ~(1 << 0); /* Make pin output? */ @@ -1484,7 +1521,7 @@ return 0; } -/** +/* * Find the runtime registers of an SMSC Super I/O, after verifying its * chip ID. * @@ -1518,8 +1555,8 @@ return rt_port; } -/** - * Disable write protection on the Mitac 6513WU. WP# on the FWH is +/* + * Disable write protection on the Mitac 6513WU. WP# on the FWH is * connected to GP30 on the Super I/O, and TBL# is always high. */ static int board_mitac_6513wu(void) @@ -1551,15 +1588,16 @@ return 0; } -/** - * Suited for ASUS A7V8X: VIA KT400 + VT8235 + IT8703F-A +/* + * Suited for: + * - ASUS A7V8X: VIA KT400 + VT8235 + IT8703F */ static int board_asus_a7v8x(void) { uint16_t id, base; uint8_t tmp; - /* find the IT8703F */ + /* Find the IT8703F. */ w836xx_ext_enter(0x2E); id = (sio_read(0x2E, 0x20) << 8) | sio_read(0x2E, 0x21); w836xx_ext_leave(0x2E); @@ -1569,7 +1607,7 @@ return -1; } - /* Get the GP567 IO base */ + /* Get the GP567 I/O base. */ w836xx_ext_enter(0x2E); sio_write(0x2E, 0x07, 0x0C); base = (sio_read(0x2E, 0x60) << 8) | sio_read(0x2E, 0x61); @@ -1606,11 +1644,11 @@ /* Check line */ if ((port > 4) || /* also catches unsigned -1 */ ((port < 4) && (line > 7)) || ((port == 4) && (line > 5))) { - msg_perr("\nERROR: Unsupported IT8712F GPIO Line %02d.\n", line); + msg_perr("\nERROR: Unsupported IT8712F GPIO line %02d.\n", line); return -1; } - /* find the IT8712F */ + /* Find the IT8712F. */ enter_conf_mode_ite(0x2E); id = (sio_read(0x2E, 0x20) << 8) | sio_read(0x2E, 0x21); exit_conf_mode_ite(0x2E); @@ -1643,7 +1681,7 @@ return 0; } -/** +/* * Suited for: * - ASUS A7V600-X: VIA KT600 + VT8237 + IT8712F * - ASUS A7V8X-X: VIA KT400 + VT8235 + IT8712F @@ -1655,7 +1693,7 @@ #endif -/** +/* * Below is the list of boards which need a special "board enable" code in * flashrom before their ROM chip can be accessed/written to. * @@ -1699,14 +1737,14 @@ /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ #if defined(__i386__) || defined(__x86_64__) - {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, "Abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise}, - {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, "Abit", "IC7", 0, NT, intel_ich_gpio23_raise}, - {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, - {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, - {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, - {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, "Abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, - {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0240, 0x10de, 0x0222, NULL, NULL, NULL, "Abit", "NF-M2 nView", 0, NT, nvidia_mcp_gpio4_lower}, - {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, + {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, "abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise}, + {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, "abit", "IC7", 0, NT, intel_ich_gpio23_raise}, + {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "abit", "IP35", 0, OK, intel_ich_gpio16_raise}, + {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, + {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, + {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, "abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, + {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0240, 0x10de, 0x0222, NULL, NULL, NULL, "abit", "NF-M2 nView", 0, NT, nvidia_mcp_gpio4_lower}, + {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A Pro", 0, OK, w836xx_memw_enable_2e}, @@ -1748,7 +1786,7 @@ {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400}, {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise}, {0x10de, 0x0369, 0x103c, 0x12fe, 0x10de, 0x0364, 0x103c, 0x12fe, NULL, NULL, NULL, "HP", "xw9400", 0, OK, nvidia_mcp_gpio5_raise}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27B9, 0, 0, NULL, "ibase", "mb899", "iBASE", "MB899", 0, OK, intel_ich_gpio26_raise}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27B9, 0, 0, NULL, "ibase", "mb899", "IBASE", "MB899", 0, OK, intel_ich_gpio26_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, @@ -1781,7 +1819,7 @@ { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, 0, NT, NULL}, /* end marker */ }; -/** +/* * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ @@ -1834,7 +1872,7 @@ return NULL; } -/** +/* * Match boards on PCI IDs and subsystem IDs. * Second set of IDs can be main only or missing completely. */ @@ -1895,19 +1933,19 @@ if (!board) board = board_match_pci_card_ids(); - if (board && board->status == NT) { - if (!force_boardenable) { - msg_pinfo("WARNING: Your mainboard is %s %s, but the mainboard-specific\n" - "code has not been tested, and thus will not not be executed by default.\n" - "Depending on your hardware environment, erasing, writing or even probing\n" - "can fail without running the board specific code.\n\n" - "Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n" - "\"internal programmer\") for details.\n", - board->vendor_name, board->board_name); - board = NULL; - } else { - msg_pinfo("NOTE: Running an untested board enable procedure.\n" - "Please report success/failure to flashrom(a)flashrom.org.\n"); + if (board && board->status == NT) { + if (!force_boardenable) { + msg_pinfo("WARNING: Your mainboard is %s %s, but the mainboard-specific\n" + "code has not been tested, and thus will not not be executed by default.\n" + "Depending on your hardware environment, erasing, writing or even probing\n" + "can fail without running the board specific code.\n\n" + "Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n" + "\"internal programmer\") for details.\n", + board->vendor_name, board->board_name); + board = NULL; + } else { + msg_pinfo("NOTE: Running an untested board enable procedure.\n" + "Please report success/failure to flashrom(a)flashrom.org.\n"); } } @@ -1918,8 +1956,8 @@ if (board->enable != NULL) { msg_pinfo("Disabling flash write protection for " - "board \"%s %s\"... ", board->vendor_name, - board->board_name); + "board \"%s %s\"... ", board->vendor_name, + board->board_name); ret = board->enable(); if (ret) Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sun Aug 8 18:05:23 2010 (r1133) +++ trunk/chipset_enable.c Sun Aug 8 19:01:18 2010 (r1134) @@ -609,7 +609,7 @@ return 0; } -/** +/* * Geode systems write protect the BIOS via RCONFs (cache settings similar * to MTRRs). To unlock, change MSR 0x1808 top byte to 0x22. * @@ -868,7 +868,7 @@ return 0; } -/** +/* * The MCP6x/MCP7x code is based on cleanroom reverse engineering. * It is assumed that LPC chips need the MCP55 code and SPI chips need the * code provided in enable_flash_mcp6x_7x_common. @@ -945,7 +945,7 @@ return 0; } -/** +/* * Usually on the x86 architectures (and on other PC-like platforms like some * Alphas or Itanium) the system flash is mapped right below 4G. On the AMD * Elan SC520 only a small piece of the system flash is mapped there, but the Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Sun Aug 8 18:05:23 2010 (r1133) +++ trunk/flashrom.8 Sun Aug 8 19:01:18 2010 (r1134) @@ -351,7 +351,7 @@ syntax where .B model can be any of -.BR 2232H ", "JTAGkey ", or " 4232H +.BR 2232H ", " JTAGkey ", or " 4232H and .B interface can be any of Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Aug 8 18:05:23 2010 (r1133) +++ trunk/flashrom.c Sun Aug 8 19:01:18 2010 (r1134) @@ -98,7 +98,7 @@ /* Supported buses for the current programmer. */ enum chipbustype buses_supported; -/** +/* * Programmers supporting multiple buses can have differing size limits on * each bus. Store the limits for each bus in a common struct. */ @@ -685,7 +685,7 @@ return ret; } -/** +/* * @cmpbuf buffer to compare against, cmpbuf[0] is expected to match the flash content at location start * @start offset to the base address of the flash chip @@ -765,7 +765,7 @@ return ret; } -/** +/* * Check if the buffer @have can be programmed to the content of @want without * erasing. This is only possible if all chunks of size @gran are either kept * as-is or changed from an all-ones state to any other state. Modified: trunk/mcp6x_spi.c ============================================================================== --- trunk/mcp6x_spi.c Sun Aug 8 18:05:23 2010 (r1133) +++ trunk/mcp6x_spi.c Sun Aug 8 19:01:18 2010 (r1134) @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* Driver for the Nvidia MCP6x/MCP7x MCP6X_SPI controller. +/* Driver for the NVIDIA MCP6x/MCP7x MCP6X_SPI controller. * Based on clean room reverse engineered docs from * http://www.flashrom.org/pipermail/flashrom/2009-December/001180.html * created by Michael Karcher. @@ -165,7 +165,7 @@ return 0; } /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ - mcp6x_spibar = physmap("Nvidia MCP6x SPI", mcp6x_spibaraddr, 0x544); + mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); #if 0 /* FIXME: Run the physunmap in a shutdown function. */ Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Aug 8 18:05:23 2010 (r1133) +++ trunk/print.c Sun Aug 8 19:01:18 2010 (r1134) @@ -257,13 +257,13 @@ #endif #if CONFIG_FT2232_SPI+CONFIG_DEDIPROG >= 1 - printf("\nSupported USB devices flashrom can use " - "as programmer:\n\n"); + printf("\nSupported USB devices flashrom can use " + "as programmer:\n\n"); #endif #if CONFIG_FT2232_SPI == 1 print_supported_usbdevs(devs_ft2232spi); -#endif +#endif } #if CONFIG_INTERNAL == 1 @@ -278,15 +278,15 @@ const struct board_info boards_known[] = { #if defined(__i386__) || defined(__x86_64__) B("A-Trend", "ATC-6220", 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL), - B("Abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), - B("Abit", "Fatal1ty F-I90HD", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), - B("Abit", "IC7", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), - B("Abit", "IP35", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LG…", NULL), - B("Abit", "IP35 Pro", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?fMTYPE=LG…", NULL), - B("Abit", "IS-10", 0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), - B("Abit", "NF-M2 nView", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=So…", NULL), - B("Abit", "NF7-S", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=So…", NULL), - B("Abit", "VT6X4", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Sl…", NULL), + B("abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), + B("abit", "Fatal1ty F-I90HD", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), + B("abit", "IC7", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), + B("abit", "IP35", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LG…", NULL), + B("abit", "IP35 Pro", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?fMTYPE=LG…", NULL), + B("abit", "IS-10", 0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), + B("abit", "NF-M2 nView", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=So…", NULL), + B("abit", "NF7-S", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=So…", NULL), + B("abit", "VT6X4", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Sl…", NULL), B("Acorp", "6A815EPD", 1, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.…", NULL), B("Advantech", "PCM-5820", 1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL), B("agami", "Aruma", 1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-600…", NULL), Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun Aug 8 18:05:23 2010 (r1133) +++ trunk/programmer.h Sun Aug 8 19:01:18 2010 (r1134) @@ -399,11 +399,11 @@ /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 struct usbdev_status { -uint16_t vendor_id; - uint16_t device_id; - int status; - const char *vendor_name; - const char *device_name; + uint16_t vendor_id; + uint16_t device_id; + int status; + const char *vendor_name; + const char *device_name; }; int ft2232_spi_init(void); int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);

3 2

Re: [flashrom] [PATCH] Add dmidecode quirk workaround
by Sean Nelson 08 Aug '10

08 Aug '10

On 08/08/2010 02:24 AM, Michael Karcher wrote: > dmidecode emits a warning message about unsupported SMBIOS versions > to stdout before the information asked for when using "-s". I consider > this behaviour broken, but we still need to workaround it as e.g. Fedora > currently distributes an dmidecode with this behaviour. > > Signed-off-by: Michael Karcher<flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > dmi.c | 24 ++++++++++++++++-------- > 1 files changed, 16 insertions(+), 8 deletions(-) > > diff --git a/dmi.c b/dmi.c > index cf459ec..98d595c 100644 > --- a/dmi.c > +++ b/dmi.c > @@ -76,15 +76,23 @@ static char *get_dmi_string(const char *string_name) > msg_perr("DMI pipe open error\n"); > return NULL; > } > - if (!fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe)) { > - if(ferror(dmidecode_pipe)) { > - msg_perr("DMI pipe read error\n"); > - pclose(dmidecode_pipe); > - return NULL; > - } else { > - answerbuf[0] = 0; /* Hit EOF */ > + > + /* Kill lines starting with '#', as recent dmidecode versions > + have the quirk to emit a "# SMBIOS implementations newer..." > + message even on "-s", when it *should* only print the > + requested string. */ > + do { > + if (!fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe)) { > + if(ferror(dmidecode_pipe)) { > + msg_perr("DMI pipe read error\n"); > + pclose(dmidecode_pipe); > + return NULL; > + } else { > + answerbuf[0] = 0; /* Hit EOF */ > + } > } > - } > + } while(answerbuf[0] == '#'); > + > /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent > deadlock on pclose. */ > while (!feof(dmidecode_pipe)) Upcoming Fedora 14 doesn't have this problem, but the patch doesn't hurt either. So, this is Acked-by: Sean Nelson <audiohacked(a)gmail.com>

1 0

New supported board: 939A785GMH/128M
by Lennart Sauerbeck 08 Aug '10

08 Aug '10

Hi all, I just tried flashrom 0.9.2 with my mainboard [1] and everything I tested worked fine. Since it is not listed as supported mainboard in the wiki here's what I did: - Reading my current BIOS. - Writing my current BIOS to the chip. - Verifying the content of the chip against the read binary. Attached are the outputs of "flashrom -V" (flashrom_V) and of "lspci -vvvnnxxx" (lspci). I checked back with the IRC channel, but if you still need the output of "superiotool -deV" or any other information let me know. Regards, Lennart Sauerbeck [1] http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M&s=939

3 4

[PATCH] nicnatsemi.c: Typo. s/are apparently don't/apparently don't/
by Paul Menzel 08 Aug '10

08 Aug '10

Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- nicnatsemi.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/nicnatsemi.c b/nicnatsemi.c index 1878f51..5f44677 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -60,7 +60,7 @@ void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr) /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. - * Bit 8-31 of this register are apparently don't care, and if this + * Bit 8-31 of this register apparently don't care, and if this * register is I/O port mapped 8 bit accesses to the lowest byte of the * register seem to work fine. Due to that, we ignore the advice in the * data sheet. @@ -74,7 +74,7 @@ uint8_t nicnatsemi_chip_readb(const chipaddr addr) /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. - * Bit 8-31 of this register are apparently don't care, and if this + * Bit 8-31 of this register apparently don't care, and if this * register is I/O port mapped 8 bit accesses to the lowest byte of the * register seem to work fine. Due to that, we ignore the advice in the * data sheet. -- 1.7.1

5 4

[commit] r1135 - trunk
by repository service 08 Aug '10

08 Aug '10

Author: uwe Date: Sun Aug 8 19:04:21 2010 New Revision: 1135 URL: http://flashrom.org/trac/coreboot/changeset/1135 Log: Fix typo (s/Bit/Bits/) to clarify code comment. Signed-off-by: David Borg <borg.db(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/nicnatsemi.c Modified: trunk/nicnatsemi.c ============================================================================== --- trunk/nicnatsemi.c Sun Aug 8 19:01:18 2010 (r1134) +++ trunk/nicnatsemi.c Sun Aug 8 19:04:21 2010 (r1135) @@ -68,8 +68,8 @@ /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. - * Bit 8-31 of this register are apparently don't care, and if this - * register is I/O port mapped 8 bit accesses to the lowest byte of the + * Bits 8-31 of this register are apparently don't care, and if this + * register is I/O port mapped, 8 bit accesses to the lowest byte of the * register seem to work fine. Due to that, we ignore the advice in the * data sheet. */ @@ -82,8 +82,8 @@ /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. - * Bit 8-31 of this register are apparently don't care, and if this - * register is I/O port mapped 8 bit accesses to the lowest byte of the + * Bits 8-31 of this register are apparently don't care, and if this + * register is I/O port mapped, 8 bit accesses to the lowest byte of the * register seem to work fine. Due to that, we ignore the advice in the * data sheet. */

1 0

Flashing of Epox 8RDA3+ Phoenix BIOS failed - ERASE FAILED
by Johannes Schüth 08 Aug '10

08 Aug '10

Hi, i just tried to flash my Epox 8RDA3+ Motherboard Phoenix BIOS using flashrom 0.9.2-r1130 (from trunk) but i got some 'ERASE FAILED' errors and afterwards the verifcation of the flashed image failed to match the new image and the backup image as well. I attached as much information i could find. If you need any more information please let me know. I hope there is a way to flash my bios. Greetings Jotschi Bios File: ftp://epoxsupport:epoxsupport@ftp.epox.com/driver/BIOS/8RDA3+34729.bin Orion:~/tmp/flashrom# ldd flashrom linux-gate.so.1 => (0xb7f38000) libpci.so.3 => /usr/lib/libpci.so.3 (0xb7f27000) libc.so.6 => /lib/i686/cmov/libc.so.6 (0xb7dcc000) libz.so.1 => /usr/lib/libz.so.1 (0xb7db7000) libresolv.so.2 => /lib/i686/cmov/libresolv.so.2 (0xb7da3000) /lib/ld-linux.so.2 (0xb7f39000) I did after i created a backup using the -r option. Flashing: (./flashrom -V -w /root/bios/8rd34729.bin) flashrom v0.9.2-r1130 on Linux 2.6.26-1-686 (i686), built with libpci 3.0.0, GCC 4.3.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 751M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 10005 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: " " DMI string baseboard-product-name: "nVidia-nForce" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" *Found chipset "NVIDIA NForce2", enabling flash write... chipset PCI ID is 10de:0060, OK.* This chipset supports the following protocols: Non-SPI. Probing for AMD Am29F010A/B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A25L05PT, 64 KB: skipped. Probing for AMIC A25L05PU, 64 KB: skipped. Probing for AMIC A25L10PT, 128 KB: skipped. Probing for AMIC A25L10PU, 128 KB: skipped. Probing for AMIC A25L20PT, 256 KB: skipped. Probing for AMIC A25L20PU, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: skipped. Probing for AMIC A25L40PU, 512 KB: skipped. Probing for AMIC A25L80P, 1024 KB: skipped. Probing for AMIC A25L16PT, 2048 KB: skipped. Probing for AMIC A25L16PU, 2048 KB: skipped. Probing for AMIC A25L512, 64 KB: skipped. Probing for AMIC A25L010, 128 KB: skipped. Probing for AMIC A25L020, 256 KB: skipped. Probing for AMIC A25L040, 512 KB: skipped. Probing for AMIC A25L080, 1024 KB: skipped. Probing for AMIC A25L016, 2048 KB: skipped. Probing for AMIC A25L032, 4096 KB: skipped. Probing for AMIC A25LQ032, 4096 KB: skipped. Probing for AMIC A29002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT25DF021, 256 KB: skipped. Probing for Atmel AT25DF041A, 512 KB: skipped. Probing for Atmel AT25DF081, 1024 KB: skipped. Probing for Atmel AT25DF081A, 1024 KB: skipped. Probing for Atmel AT25DF161, 2048 KB: skipped. Probing for Atmel AT25DF321, 4096 KB: skipped. Probing for Atmel AT25DF321A, 4096 KB: skipped. Probing for Atmel AT25DF641, 8192 KB: skipped. Probing for Atmel AT25DQ161, 2048 KB: skipped. Probing for Atmel AT25F512B, 64 KB: skipped. Probing for Atmel AT25FS010, 128 KB: skipped. Probing for Atmel AT25FS040, 512 KB: skipped. Probing for Atmel AT26DF041, 512 KB: skipped. Probing for Atmel AT26DF081A, 1024 KB: skipped. Probing for Atmel AT26DF161, 2048 KB: skipped. Probing for Atmel AT26DF161A, 2048 KB: skipped. Probing for Atmel AT26F004, 512 KB: skipped. Probing for Atmel AT29C512, 64 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT29C010A, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT29C020, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT29C040A, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT45CS1282, 16896 KB: skipped. Probing for Atmel AT45DB011D, 128 KB: skipped. Probing for Atmel AT45DB021D, 256 KB: skipped. Probing for Atmel AT45DB041D, 512 KB: skipped. Probing for Atmel AT45DB081D, 1024 KB: skipped. Probing for Atmel AT45DB161D, 2048 KB: skipped. Probing for Atmel AT45DB321C, 4224 KB: skipped. Probing for Atmel AT45DB321D, 4096 KB: skipped. Probing for Atmel AT45DB642D, 8192 KB: skipped. Probing for Atmel AT49BV512, 64 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT49F020, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT49F002(N), 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for EMST F49B002UA, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for EMST F25L008A, 1024 KB: skipped. Probing for Eon EN25B05, 64 KB: skipped. Probing for Eon EN25B05T, 64 KB: skipped. Probing for Eon EN25B10, 128 KB: skipped. Probing for Eon EN25B10T, 128 KB: skipped. Probing for Eon EN25B20, 256 KB: skipped. Probing for Eon EN25B20T, 256 KB: skipped. Probing for Eon EN25B40, 512 KB: skipped. Probing for Eon EN25B40T, 512 KB: skipped. Probing for Eon EN25B80, 1024 KB: skipped. Probing for Eon EN25B80T, 1024 KB: skipped. Probing for Eon EN25B16, 2048 KB: skipped. Probing for Eon EN25B16T, 2048 KB: skipped. Probing for Eon EN25B32, 4096 KB: skipped. Probing for Eon EN25B32T, 4096 KB: skipped. Probing for Eon EN25B64, 8192 KB: skipped. Probing for Eon EN25B64T, 8192 KB: skipped. Probing for Eon EN25D16, 2048 KB: skipped. Probing for Eon EN25F05, 64 KB: skipped. Probing for Eon EN25F10, 128 KB: skipped. Probing for Eon EN25F20, 256 KB: skipped. Probing for Eon EN25F40, 512 KB: skipped. Probing for Eon EN25F80, 1024 KB: skipped. Probing for Eon EN25F16, 2048 KB: skipped. Probing for Eon EN25F32, 4096 KB: skipped. Probing for Eon EN29F010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)B, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0x49, id2 0x44 Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0x49, id2 0x44 Probing for Hyundai HY29F002T, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Hyundai HY29F002B, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Intel 28F001BX-B, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Intel 28F001BX-T, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Intel 28F002BC-T, 256 KB: probe_82802ab: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004S5, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004BV/BE-B, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004BV/BE-T, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/CV/CE-B, 512 KB: probe_82802ab: id1 0x49, id2 0x44, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/CV/CE-T, 512 KB: probe_82802ab: id1 0x49, id2 0x44, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 KB: skipped. Probing for Macronix MX25L1005, 128 KB: skipped. Probing for Macronix MX25L2005, 256 KB: skipped. Probing for Macronix MX25L4005, 512 KB: skipped. Probing for Macronix MX25L8005, 1024 KB: skipped. Probing for Macronix MX25L1605, 2048 KB: skipped. Probing for Macronix MX25L1635D, 2048 KB: skipped. Probing for Macronix MX25L3205, 4096 KB: skipped. Probing for Macronix MX25L3235D, 4096 KB: skipped. Probing for Macronix MX25L6405, 8192 KB: skipped. Probing for Macronix MX25L12805, 16384 KB: skipped. Probing for Macronix MX29F001B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for MoselVitelic V29C51000T, 64 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for MoselVitelic V29C51400B, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for MoselVitelic V29C51400T, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for MoselVitelic V29LC51000, 64 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for MoselVitelic V29LC51001, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for MoselVitelic V29LC51002, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Numonyx M25PE10, 128 KB: skipped. Probing for Numonyx M25PE20, 256 KB: skipped. Probing for Numonyx M25PE40, 512 KB: skipped. Probing for Numonyx M25PE80, 1024 KB: skipped. Probing for Numonyx M25PE16, 2048 KB: skipped. Probing for PMC Pm25LV010, 128 KB: skipped. Probing for PMC Pm25LV016B, 2048 KB: skipped. Probing for PMC Pm25LV020, 256 KB: skipped. Probing for PMC Pm25LV040, 512 KB: skipped. Probing for PMC Pm25LV080B, 1024 KB: skipped.flashrom -V Probing for PMC Pm25LV512, 64 KB: skipped. Probing for PMC Pm29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e *Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000.* Probing for Sanyo LF25FW203A, 2048 KB: skipped. Probing for Sharp LHF00L04, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL008A, 1024 KB: skipped. Probing for Spansion S25FL016A, 2048 KB: skipped. Probing for SST SST25VF016B, 2048 KB: skipped. Probing for SST SST25VF032B, 4096 KB: skipped. Probing for SST SST25VF064C, 8192 KB: skipped. Probing for SST SST25VF040.REMS, 512 KB: skipped. Probing for SST SST25VF040B, 512 KB: skipped. Probing for SST SST25LF040A.RES, 512 KB: skipped. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Probing for SST SST25VF080B, 1024 KB: skipped. Probing for SST SST28SF040A, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST29LE010, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST29EE020A, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST29LE020, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39SF512, 64 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39SF010A, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39SF020A, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39SF040, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39VF512, 64 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39VF010, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39VF020, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39VF040, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST39VF080, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF004C, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 KB: skipped. Probing for ST M25P05.RES, 64 KB: skipped. Probing for ST M25P10-A, 128 KB: skipped. Probing for ST M25P10.RES, 128 KB: skipped. Probing for ST M25P20, 256 KB: skipped. Probing for ST M25P40, 512 KB: skipped. Probing for ST M25P40-old, 512 KB: skipped. Probing for ST M25P80, 1024 KB: skipped. Probing for ST M25P16, 2048 KB: skipped. Probing for ST M25P32, 4096 KB: skipped. Probing for ST M25P64, 8192 KB: skipped. Probing for ST M25P128, 16384 KB: skipped. Probing for ST M29F002B, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 KB: probe_m29f400bt: id1 0x49, id2 0x44 Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0x49, id2 0x44 Probing for ST M29W010B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 KB: probe_jedec_common: id1 0xfa, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for TI TMS29F002RB, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 KB: probe_jedec_common: id1 0xa4, id2 0xf5, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25Q80, 1024 KB: skipped. Probing for Winbond W25Q16, 2048 KB: skipped. Probing for Winbond W25Q32, 4096 KB: skipped. Probing for Winbond W25Q64, 8192 KB: skipped. Probing for Winbond W25x10, 128 KB: skipped. Probing for Winbond W25x20, 256 KB: skipped. Probing for Winbond W25x40, 512 KB: skipped. Probing for Winbond W25x80, 1024 KB: skipped. Probing for Winbond W25x16, 2048 KB: skipped. Probing for Winbond W25x32, 4096 KB: skipped. Probing for Winbond W25x64, 8192 KB: skipped. Probing for Winbond W29C011, 128 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W29C020C, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W29C040P, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W49F020, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0x9d, id2 0x6e Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x9d, id2 0x6e Probing for AMIC unknown AMIC SPI chip, 0 KB: skipped. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Probing for Eon unknown Eon SPI chip, 0 KB: skipped. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Probing for SST unknown SST SPI chip, 0 KB: skipped. Probing for ST unknown ST SPI chip, 0 KB: skipped. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, ERASE FAILED at 0x00000000! Expected=0xff, Read=0x49, failed byte count from 0x00000000-0x00000fff: 0x3cd ERASE FAILED! Looking at blockwise erase function 1... trying... 0x000000-0x00ffff, ERASE FAILED at 0x00000000! Expected=0xff, Read=0x49, failed byte count from 0x00000000-0x0000ffff: 0x3cd ERASE FAILED! Looking at blockwise erase function 2... trying... 0x000000-0x07ffff, ERASE FAILED at 0x00000000! Expected=0xff, Read=0x49, failed byte count from 0x00000000-0x0007ffff: 0x509e5 ERASE FAILED! Looking at blockwise erase function 3... not defined. Looking for another erase function. Looking at blockwise erase function 4... not defined. Looking for another erase function. Looking at blockwise erase function 5... not defined. Looking for another erase function. FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Verification fails: Orion:~/tmp/flashrom# ./flashrom -V -v /root/bios/oldbios.dump Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFY FAILED at 0x00040000! Expected=0xff, Read=0xa4, failed byte count from 0x00000000-0x0007ffff: 0xee06 Orion:~/tmp/flashrom# ./flashrom -r failedbios.dump http://www.jotschi.de/download/bios/failedbios.dump Before i started flashing the bios i made a backup of my old bios: http://www.jotschi.de/download/bios/oldbios.dump Orion:~# lspci -nnvvvxxx 00:00.0 Host bridge [0600]: nVidia Corporation nForce2 IGP2 [10de:01e0] (rev c1) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Region 0: Memory at d0000000 (32-bit, prefetchable) [size=128M] Capabilities: [40] AGP version 2.0 Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW+ AGP3- Rate=x1,x2,x4 Command: RQ=1 ArqSz=0 Cal=0 SBA- AGP- GART64- 64bit- FW- Rate=x1 Capabilities: [60] HyperTransport: Host or Secondary Interface Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=8bit MLWO=8bit LWI=8bit LWO=8bit Revision ID: 0.16 Kernel driver in use: agpgart-nvidia Kernel modules: nvidia-agp 00: de 10 e0 01 06 00 b0 00 c1 00 00 06 00 00 80 00 10: 08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 02 60 20 00 17 02 00 1f 01 00 00 00 ff ff ff ff 50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 60: 08 00 01 20 20 00 88 80 10 00 00 00 01 ff 01 8f 70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 80: 0c 01 00 00 ff ff ff 3f 01 00 00 00 01 80 00 00 90: 14 80 40 a7 14 80 40 a5 00 30 00 00 00 00 00 00 a0: 00 00 00 00 c0 d8 e2 00 00 00 00 00 00 00 00 00 b0: cc ff 07 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 33 33 03 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: f6 01 47 00 16 30 00 10 00 00 00 00 00 00 00 00 f0: 0f 00 00 38 00 00 00 00 00 00 00 00 00 00 00 00 00:01.0 ISA bridge [0601]: nVidia Corporation nForce2 ISA Bridge [10de:0060] (rev a4) Subsystem: EPoX Computer Co., Ltd. Device [1695:1000] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [48] HyperTransport: Slave or Primary Interface Command: BaseUnitID=1 UnitCnt=15 MastHost- DefDir- Link Control 0: CFlE- CST- CFE- <LkFail- Init+ EOC+ TXO- <CRCErr=0 Link Config 0: MLWI=8bit MLWO=8bit LWI=8bit LWO=8bit Link Control 1: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO+ <CRCErr=0 Link Config 1: MLWI=8bit MLWO=8bit LWI=8bit LWO=8bit Revision ID: 0.00 00: de 10 60 00 0f 00 b0 00 a4 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 95 16 00 10 30: 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 40: 95 16 00 10 de fd 3c 08 08 00 e1 01 60 00 88 88 50: a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 40 00 00 01 44 00 00 01 42 00 00 00 01 f8 ff 70: 10 00 ff ff 03 00 00 00 0f 00 40 00 18 d0 00 00 80: 09 80 00 00 d2 02 00 00 3f 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: cc 00 02 00 0a 00 00 00 00 00 00 00 00 00 00 00 e0: 00 11 00 07 3f 00 00 00 00 38 26 80 00 00 00 00 f0: 00 ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.1 SMBus [0c05]: nVidia Corporation nForce2 SMBus (MCP) [10de:0064] (rev a2) Subsystem: EPoX Computer Co., Ltd. Device [1695:1000] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 12 Region 0: I/O ports at ec00 [size=32] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: nForce2_smbus Kernel modules: i2c-nforce2 00: de 10 64 00 01 00 b0 00 a2 00 05 0c 00 00 80 00 10: 01 ec 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 95 16 00 10 30: 00 00 00 00 44 00 00 00 00 00 00 00 0c 01 03 01 40: 95 16 00 10 01 00 02 c0 00 00 00 00 00 00 00 00 50: 01 50 00 00 41 50 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:08.0 PCI bridge [0604]: nVidia Corporation nForce2 External PCI Bridge [10de:006c] (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 I/O behind bridge: 0000c000-0000dfff Memory behind bridge: e2000000-e2ffffff Prefetchable memory behind bridge: 50000000-500fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- <SERR- <PERR+ BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Kernel modules: shpchp 00: de 10 6c 00 07 01 a0 00 a3 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 20 c0 d0 80 82 20: 00 e2 f0 e2 00 50 00 50 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 40: 00 00 00 00 01 00 02 00 01 00 00 00 08 0b 05 00 50: 0c 0d fe 3f 0e 0f 00 00 7f 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Orion:~# superiotool -dV superiotool r3125 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x80fe, id=0x1752 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x2e... Failed. Returned data: id=0x0000, rev=0x0 Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x5217, rev=0xf Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0x00, port+1=0x00 Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x17) at 0x2e Register dump: idx 02 07 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f val ff 0b 52 17 ff fe 80 00 00 00 00 7c c0 ff 00 ff def 00 NA 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 00 00 00 00 04 0e 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 04 38 def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 00 80 def 01 00 60 00 64 01 0c 80 LDN 0x06 (Consumer IR) idx 30 60 61 70 val 00 00 00 00 def 00 00 00 00 LDN 0x07 (Game port, MIDI port, GPIO 1) idx 30 60 61 62 63 70 f0 f1 f2 val 07 02 01 03 30 0a ff 00 00 def 00 02 01 03 30 09 ff 00 00 LDN 0x08 (GPIO 2, Watchdog timer) idx 30 f0 f1 f2 f3 f5 f6 f6 f7 val 01 ff 07 01 00 00 00 00 00 def 00 ff 00 00 00 00 00 00 00 LDN 0x09 (GPIO 3) idx 30 f0 f1 f2 f3 val 01 ff 00 00 40 def 00 ff 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 00 00 40 03 14 00 00 00 00 00 00 af 33 04 00 00 00 00 00 def 00 00 00 00 NA NA 00 00 00 00 00 00 00 00 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 val 01 02 90 00 00 def 00 00 00 00 00 Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Orion:~/tmp/flashrom# dmidecode # dmidecode 2.9 SMBIOS 2.2 present. 37 structures occupying 934 bytes. Table at 0x000F0000. Handle 0x0000, DMI type 0, 19 bytes BIOS Information Vendor: Phoenix Technologies, LTD Version: 6.00 PG Release Date: 02/12/2004 Address: 0xE0000 Runtime Size: 128 kB ROM Size: 512 kB Characteristics: ISA is supported PCI is supported PNP is supported APM is supported BIOS is upgradeable BIOS shadowing is allowed Boot from CD is supported Selectable boot is supported BIOS ROM is socketed EDD is supported 5.25"/360 KB floppy services are supported (int 13h) 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 KB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported AGP is supported LS-120 boot is supported ATAPI Zip drive boot is supported

2 1

Asus A7N8X-E DELUXE (nVidia nForce2) / SST49LF040
by Mattias Mattsson 08 Aug '10

08 Aug '10

Hi, This board is already listed as supported by flashrom, but I was unable to find a test report so here are my logs. Probe, read, erase and write all work. Tested with r1099. Latest BIOS: http://www.asus.com/product.aspx?P_ID=TmQtPJv4jIxmL9C2 Thanks -mattias

2 1

Asus M4A785TD-M EVO (AMD SB710) / Macronix MX25L8005
by Mattias Mattsson 08 Aug '10

08 Aug '10

Hi, I have tested flashrom r1129 on an Asus M4A785TD-M EVO board with MX25L8005 flash. Probe, read, erase and writes all work. Latest BIOS is here: ftp://ftp.asus.com/pub/ASUS/mb/socketAM3/M4A785TD-M_EVO/ Logs attached. Thanks! -mattias

2 1

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flashrom August 2010