80/100/132 column line width policy
by Carl-Daniel Hailfinger
Hi,
we're hitting the 80 column limit in our code in ways which actually
reduce readability for the code. Examples are various multiline messages
and complicated nested code where refactoring to a separate function
doesn't make sense.
Keeping the old 80 column limit is not really an option anymore.
Standard terminal sizes have one of 80, 100 or 132 columns.
Given the monitor resolutions many people have nowadays, I think it is
safe to say that you can fit two xterms with 100 columns horizonally
next to each other. 100 columns should also be sufficient for a msg_p*
of roughly 80 columns of text.
132 columns provide more leeway, but IMHO that would be too wide for
good readability (and my screen can't fit two xterms side-by-side anymore).
Of course some files have sections where any column limit is not
acceptable (board lists etc.), but the column limit violations should be
limited to the affected file sections, not whole files.
Comments?
I'd like to get this decided today or tomorrow so we know where we need
line breaks in Stefan Tauner's new struct flashchip patch.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
1 month
Spansion S25FL128P......X
by The Raven
I have a spansion S25FL128P......X chip and can do some tests.
The "problem" is that i don't know if its an 0 or an 1.
On the chip i see only "FL128PIF" and one line lower i see "00299012 C".
Probing works (id1 0x01, id2 0x2018):
Calibrating delay loop... OK.
serprog: Programmer name is "serprog-duino"
Found Spansion flash chip "S25FL128P......0" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL128P......1" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL128S......0" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL128S......1" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL129P......0" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL129P......1" (16384 kB, SPI) on serprog.
Multiple flash chip definitions match the detected chip(s):
"S25FL128P......0", "S25FL128P......1", "S25FL128S......0",
"S25FL128S......1", "S25FL129P......0", "S25FL129P......1"
Please specify which chip definition to use with the -c <chipname> option.
BTW: Chip was fund on a Dell-Systemboard.
1 year, 8 months
FOSDEM 2017
by Carl-Daniel Hailfinger
Hi,
FOSDEM 2017 deadlines are soon.
Do we want to have a full developer room, a talk or just a stand?
Unfortunately I won't be able to attend, so someone else will have to be
the formal contact for organizing our stand/devroom/talk. I will help
with submitting proposals if this is desired by the person organizing
our stand/devroom/...
Who is willing to take care of our FOSDEM 2017 presence?
https://fosdem.org/2017/news/2016-07-20-call-for-participation/
Deadlines:
Developer Rooms: 9 September
Main Track Talks: 10 October
Stands: 31 October
Lightning talks: 25 November
Regards,
Carl-Daniel
2 years, 1 month
[PATCH] internal: Dont define functions on yet unsupported architechtures
by Urja Rannikko
This fixes a warning with newer (6.1) gcc on ARM,
as tested by swiftgeek on irc.
Signed-off-by: Urja Rannikko <urjaman(a)gmail.com>
---
internal.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/internal.c b/internal.c
index 4062b64..aa5f1d1 100644
--- a/internal.c
+++ b/internal.c
@@ -131,6 +131,8 @@ int register_superio(struct superio s)
int is_laptop = 0;
int laptop_ok = 0;
+/* This matches with the #if for the registration of par_master_internal */
+#if IS_X86 || IS_MIPS
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr);
static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
@@ -155,6 +157,7 @@ static const struct par_master par_master_internal = {
.chip_writel = internal_chip_writel,
.chip_writen = fallback_chip_writen,
};
+#endif
enum chipbustype internal_buses_supported = BUS_NONE;
@@ -358,6 +361,8 @@ int internal_init(void)
}
#endif
+/* This matches with the #if for the registration of par_master_internal */
+#if IS_X86 || IS_MIPS
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
{
@@ -400,3 +405,4 @@ static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
mmio_readn((void *)addr, buf, len);
return;
}
+#endif
--
2.9.3
2 years, 1 month
W836xx: Lenovo T530: flashrom -V
by Nenad Crnko
Hello flashrom team,
Please find appended a problem report of a failed attempt at probing
the flash on T530.
I would be happy to assist with testing and have means of recovering
if the flash content should get corrupted.
It looks like flashrom currently can not even get to reading the flash
on this model.
Regards,
Nenad
[root@t530 flashrom-0.9.9]# ./flashrom -VV -p 'internal:mainboard=Lenovo:Thinkpad T530'
flashrom v0.9.9-r1955 on Linux 4.7.9-200.fc24.x86_64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org
flashrom was built with libpci 3.5.1, GCC 6.2.1 20160916 (Red Hat 6.2.1-2), little endian
Command line (3 args): ./flashrom -VV -p internal:mainboard=Lenovo:Thinkpad T530
Calibrating delay loop... OS timer resolution is 1 usecs, 3484M loops per second, 10 myus = 10 us, 100 myus = 135 us, 1000 myus = 1146 us, 10000 myus = 10327 us, 4 myus = 4 us, OK.
Initializing internal programmer
Found candidate at: 00000500-00000510
Found coreboot table at 0x00000500.
Found candidate at: 00000000-00000a9c
Found coreboot table at 0x00000000.
coreboot table found at 0xbfef6000.
coreboot header(24) checksum: d8fe table(2716) checksum: 8a9f entries: 24
Vendor ID: LENOVO, part ID: ThinkPad T530
Using Internal DMI decoder.
DMI string chassis-type: "Laptop"
Laptop detected via DMI.
DMI string system-manufacturer: "LENOVO"
DMI string system-product-name: "2394BF7"
DMI string system-version: "ThinkPad T530"
DMI string baseboard-manufacturer: "LENOVO"
DMI string baseboard-product-name: "2394BF7"
DMI string baseboard-version: "ThinkPad T530"
W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect.
Active config mode, unknown reg 0x20 ID: 00.
========================================================================
WARNING! You seem to be running flashrom on an unsupported laptop.
Laptops, notebooks and netbooks are difficult to support and we
recommend to use the vendor flashing utility. The embedded controller
(EC) in these machines often interacts badly with flashing.
See the manpage and https://flashrom.org/Laptops for details.
If flash is shared with the EC, erase is guaranteed to brick your laptop
and write may brick your laptop.
Read and probe may irritate your EC and cause fan failure, backlight
failure and sudden poweroff.
You have been warned.
========================================================================
Aborting.
Error: Programmer initialization failed.
[root@t530 flashrom-0.9.9]#
[root@t530 flashrom-0.9.9]# lspci -nn
00:00.0 Host bridge [0600]: Intel Corporation 3rd Gen Core processor DRAM Controller [8086:0154] (rev 09)
00:01.0 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor PCI Express Root Port [8086:0151] (rev 09)
00:02.0 VGA compatible controller [0300]: Intel Corporation 3rd Gen Core processor Graphics Controller [8086:0166] (rev 09)
00:04.0 Signal processing controller [1180]: Intel Corporation 3rd Gen Core Processor Thermal Subsystem [8086:0153] (rev 09)
00:14.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB xHCI Host Controller [8086:1e31] (rev 04)
00:16.0 Communication controller [0780]: Intel Corporation 7 Series/C210 Series Chipset Family MEI Controller #1 [8086:1e3a] (rev 04)
00:19.0 Ethernet controller [0200]: Intel Corporation 82579LM Gigabit Network Connection [8086:1502] (rev 04)
00:1a.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #2 [8086:1e2d] (rev 04)
00:1b.0 Audio device [0403]: Intel Corporation 7 Series/C210 Series Chipset Family High Definition Audio Controller [8086:1e20] (rev 04)
00:1c.0 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 1 [8086:1e10] (rev c4)
00:1c.1 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 2 [8086:1e12] (rev c4)
00:1c.2 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 3 [8086:1e14] (rev c4)
00:1d.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #1 [8086:1e26] (rev 04)
00:1f.0 ISA bridge [0601]: Intel Corporation QM77 Express Chipset LPC Controller [8086:1e55] (rev 04)
00:1f.2 SATA controller [0106]: Intel Corporation 7 Series Chipset Family 6-port SATA Controller [AHCI mode] [8086:1e03] (rev 04)
00:1f.3 SMBus [0c05]: Intel Corporation 7 Series/C210 Series Chipset Family SMBus Controller [8086:1e22] (rev 04)
01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GF108M [NVS 5400M] [10de:0def] (rev a1)
01:00.1 Audio device [0403]: NVIDIA Corporation GF108 High Definition Audio Controller [10de:0bea] (rev a1)
02:00.0 SD Host controller [0805]: Ricoh Co Ltd MMC/SD Host Controller [1180:e822] (rev 08)
02:00.1 System peripheral [0880]: Ricoh Co Ltd Device [1180:e232] (rev 05)
02:00.3 FireWire (IEEE 1394) [0c00]: Ricoh Co Ltd R5C832 PCIe IEEE 1394 Controller [1180:e832] (rev 04)
03:00.0 Network controller [0280]: Realtek Semiconductor Co., Ltd. RTL8188CE 802.11b/g/n WiFi Adapter [10ec:8176] (rev 01)
[root@t530 flashrom-0.9.9]#
2 years, 2 months
Re: [flashrom] Query Reg excluding the dependency with the libusb and libftdi
by David Hendricks
On Tue, Oct 25, 2016 at 2:29 AM, RAJESH DASARI <raajeshdasari(a)gmail.com> wrote:
> Hi ,
>
> Could some one please tell me is there any way to remove the
> dependency with the libusb and libftdi while building the flashrom
> binary .
>
> I use flashrom tool only to the flash the BIOS not for any USB device.
> I don't need support for FT2232, Dediprog or USB-Blaster.
There are several CONFIG_* variables that can be (un)set when you
build flashrom. They are listed under "Default settings of CONFIG_*
variables" in the Makefile, and you can change the defaults however
you like. You probably only need CONFIG_INTERNAL enabled for your
desired use case.
Alternatively, you can look at the output of the make command to see
what's being included by default and override the default. For
example, to explicitly disable USB Blaster you can use run
"CONFIG_USBBLASTER_SPI=no make".
--
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
2 years, 2 months
Query Reg excluding the dependency with the libusb and libftdi
by RAJESH DASARI
Hi ,
Could some one please tell me is there any way to remove the
dependency with the libusb and libftdi while building the flashrom
binary .
I use flashrom tool only to the flash the BIOS not for any USB device.
I don't need support for FT2232, Dediprog or USB-Blaster.
Thanks,
Rajesh Dasari.
2 years, 2 months
FreeBsd killed my BIOS
by Christopher Robinson
After a clean install of FreeBsd, my Sun Ultra 20 x86 AMD64 desktop would not reboot.I only got the Sun Microsytems logo on my monitor, nothing else happened. I think I needto reflash the BIOS and would like to do this with flashrom. However, I see that no live cdsare available. I plan to try Hiren's (earlier on I tried out systemrescue for another issue,with no success). However, I don't see how this will boot the system without first flashing theBIOS, if that is the problem. Sort of a Catch-22. The same seems to apply to Parted Magic.
2 years, 2 months
Re: [flashrom] Development flashrom
by Agustin Isasmendi
Pinouts launchpad CC3200. First remove jumpers!
When finished my development, Could you publish my development in your web?
I would be very happy, it is my first contribution to the community.
2016-10-17 17:59 GMT-03:00 Agustin Isasmendi <isasmendi.agus(a)gmail.com>:
> Hi Carl, David
>
> The launchpad CC3200 have FTDI 2232D for programming CC3200 MCU. I wanted
> to use this FT2232 with flashrom.
> I can finally use flashrom with launchpad cc3200.
>
> But i have questions about ft2232_spi.c file (attached) in line 488
> "buf[i++] = 0 & ~cs_bits; /* assertive */"
> Why sets all pins to low state? I need keep one pin to high state.The
> launchpad CC3200 requires keep Bit 7 to high state for work.
>
> It work replacement line 488 for this buf[i++] = 0x80;
> Any solution?
>
> attach img with flashrom running. Sorry for quality
>
> Reggards
>
> 2016-10-14 20:19 GMT-03:00 Carl-Daniel Hailfinger <
> c-d.hailfinger.devel.2006(a)gmx.net>:
>
>> On 14.10.2016 21:24, David Hendricks wrote:
>> > What exactly are you trying to do? How do you plan to use the CC3200?
>> > How is the flash memory connected / accessed?
>> >
>> > TI has some information about flashing it
>> > here: http://processors.wiki.ti.com/index.php/CC31xx_%26_CC32xx_FT
>> DI_Flashing
>> >
>> > If you'd like, you can try adding support for the FTDI chip in
>> > ft2232_spi.c.
>>
>> There are various existing open source tools based on libftdi which
>> write the EEPROM which does the same thing as FT_PROG. Please note that
>> FT_PROG writes the configuation EEPROM of the FTDI chip, not the flash
>> chip storing the firmware of the CC3100/CC3200.
>>
>>
>> > If the FTDI D2XX is significantly different you can create a new file
>> > (ftdi_d2xx.c, for example), and use ft2232_spi.c as a template.
>>
>> I think the FTDI D2XX library has a license incompatible with flashrom.
>>
>>
>> If you want to replace TI CCS UniFlash with flashrom, it would make
>> sense to check if any protocol documentation for the UART-based flashing
>> exists. In that case you won't need D2XX or libftdi.
>>
>> Regards,
>> Carl-Daniel
>>
>
>
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2 years, 3 months
