Hi,
we're hitting the 80 column limit in our code in ways which actually
reduce readability for the code. Examples are various multiline messages
and complicated nested code where refactoring to a separate function
doesn't make sense.
Keeping the old 80 column limit is not really an option anymore.
Standard terminal sizes have one of 80, 100 or 132 columns.
Given the monitor resolutions many people have nowadays, I think it is
safe to say that you can fit two xterms with 100 columns horizonally
next to each other. 100 columns should also be sufficient for a msg_p*
of roughly 80 columns of text.
132 columns provide more leeway, but IMHO that would be too wide for
good readability (and my screen can't fit two xterms side-by-side anymore).
Of course some files have sections where any column limit is not
acceptable (board lists etc.), but the column limit violations should be
limited to the affected file sections, not whole files.
Comments?
I'd like to get this decided today or tomorrow so we know where we need
line breaks in Stefan Tauner's new struct flashchip patch.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
I have a spansion S25FL128P......X chip and can do some tests.
The "problem" is that i don't know if its an 0 or an 1.
On the chip i see only "FL128PIF" and one line lower i see "00299012 C".
Probing works (id1 0x01, id2 0x2018):
Calibrating delay loop... OK.
serprog: Programmer name is "serprog-duino"
Found Spansion flash chip "S25FL128P......0" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL128P......1" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL128S......0" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL128S......1" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL129P......0" (16384 kB, SPI) on serprog.
Found Spansion flash chip "S25FL129P......1" (16384 kB, SPI) on serprog.
Multiple flash chip definitions match the detected chip(s):
"S25FL128P......0", "S25FL128P......1", "S25FL128S......0",
"S25FL128S......1", "S25FL129P......0", "S25FL129P......1"
Please specify which chip definition to use with the -c <chipname> option.
BTW: Chip was fund on a Dell-Systemboard.
Hi,
I'm trying to find out which external programmers should be supported next.
1. There was talk of an AVR-based new programmer using the serprog
protocol on IRC by someone with the nick "coldelectrons", but I have no
idea if he/she is reading this mail. IMHO more hardware using the
serprog protocol is always a good idea.
2. All those Willem/Sivava variants. People regularly request those, but
I don't think anyone in here owns the hardware.
3. RayeR's SPIPGM. I have a preliminary patch which could work, but I
don't have the hardware. Will send the patch to the list soon.
4. LPC^2, Milksop, CheapLPC and other programmers from the Xbox modding
community.
5. Dozens of SPI programmer hardware projects scattered over the net.
Too many to count, and I'm not sure which of them has more than one user.
In general, it seems creating a new programmer hardware design is like
writing IRC clients: A nice way to get started in the field. I have no
problems merging flashrom support for all of them, but I won't implement
support for all of them myself.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
On Wed, 27 Jul 2011 18:20:19 +0200
Mattias Mattsson <vitplister(a)gmail.com> wrote:
> Hi all,
>
> I was able to run flashrom under Linux on PPC (big endian) hardware
> with two small modifications in internal.c and processor_enable.c (see
> attached patch). Not sure if this is the right way to do it but it
> seems to work for me.
>
i am resending this patch (unchanged) because patchwork did not pick it
up correctly. please do send one patch per mail only in the future
until we have something really working. :)
--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner
Hi,
Someone had already reverse engineered the protocol and created an SPI
flasher tool for that:
https://github.com/setarcos/ch341prog
Using this code it won't be a big issue to add flashrom support.
Regards,
Miklos Marton
> I can write to log usb activity with operations with CH341A usb
> programmer from original 1.18 software with operation read, write..
> this log is very happy with support of CH341A in flashrom?
>> On Tue, 6 Jan 2015 05:20:22 +0500
>> novoagansk(a)gmail.com wrote:
>>> ????????????, .
>>>
>>> Sorry, Please tell me about: how add support for this programmer in flashrom?
>>>
>>> If you can - please tell me "example" how USB device parallel add in
>>> flashrom.
>>>
>>> or other links to support any usb devices in flashrom..
>>>
>>>
>>> CH341A usb chip:
>>> http://www.seekic.com/circuit_diagram/Basic_Circuit/USB_to_parallel_serial_…
>> There is not much information available about that chip. The available
>> English datasheets do not cover the most important part: the
>> communication protocol between the chip and the host. Without that it
>> is not exactly trivial to add support for it in flashrom. One has to
>> reverse engineer the protocol first. Members of the flashrom community
>> have done that for the Dediprog SF100 once but they are no longer
>> active, so please don't expect it to be done. dediprog.c is probably
>> the most similar programmer flashrom currently supports because it is
>> the only one that uses a completely custom USB protocol.
>
>
>
Üdvözlettel,
Márton Miklós
+36-70-39-60-009
Üdvözlettel,
Márton Miklós
+36-70-39-60-009
Hello,
this chip is marked as "untested" in write mode.
So here are my test-results:
Erase in d8-Mode is not working (see log).
But i think it's the already known "serprog bug".
Erase in c7-mode is ok.
Write is working in both modes.
But i don't know why in c7-mode the log shows:
0x000000-0x007fff:W, 0x008000-0x00ffff:S, 0x010000-0x017fff:S,
0x018000-0x01ffff:S
I have created the test-file with dd and urandom. The file (131072 byte)
is full with data.
So it should write (W) not only to 0x007fff. Strange!
If you need more logs or infos, let me know.
BTW: The chip is labeled "25P10VP". I see nothing with "-A".
And the chip was found on a "Maxtor" hard disk drive.
Hello!
I have Gigabyte H55M-S2H motherboard with 2 MX25L6465EM2I SPI flash chips, but now flashrom asks me to choose from 3 different chips:
Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
Please specify which chip definition to use with the -c <chipname> option.
I find chip datasheet where: http://www.datasheetarchive.com/dl/Datasheets-IS78/DSAH00369299.pdf
In the table 6 (ID Definitions) of this datasheet we can see RDID=0x2017
1. Is it possible to use one of supposed chip or a new one?
2. Can you add comment about MX25L6465 in the flashchips.h after MX25L6405 or new definition in flashchips.c ?
3. Is it possible to determine flash chip by RDID and RES (Read Electronic Signature)?
--
Best regards Alexander.V Trubitsyn
On Wed, 25 Feb 2015 03:38:01 +0100
Peter Stuge <peter(a)stuge.se> wrote:
> Carl-Daniel Hailfinger wrote:
> > two logos
>
> I'd recommend avoiding that. It becomes confusing for people.
Not necessarily... the facebook "f" or linkedin "in" are examples where
parts of the lettering are reused in icons. Based on that idea I have
created a lettering containing the SOIC chip and bolt. I doubt this
would produce any confusion :)
--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner