flashrom October 2016

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[PATCH 3/4] Initial MX25L25635F support
by Timothy Pearson 12 Oct '16

12 Oct '16

Add initial support for MX25L25635F Flash devices. --- flashchips.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/flashchips.c b/flashchips.c index 7cd12fa..61075dd 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8045,6 +8045,53 @@ const struct flashchip flashchips[] = { { .vendor = "Macronix", + .name = "MX25L25635F/MX25L25645E/MX25L25665E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L25635F, + .total_size = 32768, + .page_size = 256, + /* OTP: 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .enter_4ba = spi_enter_4ba_b7, /* enter 4-bytes addressing mode by CMD B7 */ + .read_nbyte = spi_nbyte_read_4ba, /* read from 4-bytes addressing mode */ + .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ + .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20_4ba, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52_4ba, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8_4ba, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: security register and SBLK/SBULK; MX25L12835F: configuration register */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", .name = "MX25U1635E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, -- 2.9.3

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[PATCH 2/4] Add support for programming SPI devices attached to the
by Timothy Pearson 12 Oct '16

12 Oct '16

AST2400 BMC All possible (five) Flash devices are supported with the programmer- specific parameter spibus=<n>, along with a special setting spibus=host to access the dedicated SPI controller (often used for the host BIOS). --- Makefile | 20 +++ ast2400.c | 426 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashrom.c | 12 ++ programmer.h | 13 ++ 4 files changed, 471 insertions(+) create mode 100644 ast2400.c diff --git a/Makefile b/Makefile index d771398..c0eef61 100644 --- a/Makefile +++ b/Makefile @@ -214,6 +214,11 @@ UNSUPPORTED_FEATURES += CONFIG_GFXNVIDIA=yes else override CONFIG_GFXNVIDIA = no endif +ifeq ($(CONFIG_AST2400), yes) +UNSUPPORTED_FEATURES += CONFIG_AST2400=yes +else +override CONFIG_AST2400 = no +endif ifeq ($(CONFIG_SATASII), yes) UNSUPPORTED_FEATURES += CONFIG_SATASII=yes else @@ -441,6 +446,11 @@ UNSUPPORTED_FEATURES += CONFIG_GFXNVIDIA=yes else override CONFIG_GFXNVIDIA = no endif +ifeq ($(CONFIG_AST2400), yes) +UNSUPPORTED_FEATURES += CONFIG_AST2400=yes +else +override CONFIG_AST2400 = no +endif ifeq ($(CONFIG_SATASII), yes) UNSUPPORTED_FEATURES += CONFIG_SATASII=yes else @@ -565,6 +575,9 @@ CONFIG_NIC3COM ?= yes # Enable NVIDIA graphics cards. Note: write and erase do not work properly. CONFIG_GFXNVIDIA ?= yes +# Enable AST2400 BMC SoCs. +CONFIG_AST2400 ?= yes + # Always enable SiI SATA controllers for now. CONFIG_SATASII ?= yes @@ -664,6 +677,7 @@ ifeq ($(CONFIG_ENABLE_LIBPCI_PROGRAMMERS), no) override CONFIG_INTERNAL = no override CONFIG_NIC3COM = no override CONFIG_GFXNVIDIA = no +override CONFIG_AST2400 = no override CONFIG_SATASII = no override CONFIG_ATAHPT = no override CONFIG_ATAVIA = no @@ -776,6 +790,12 @@ PROGRAMMER_OBJS += gfxnvidia.o NEED_LIBPCI += CONFIG_GFXNVIDIA endif +ifeq ($(CONFIG_AST2400), yes) +FEATURE_CFLAGS += -D'CONFIG_AST2400=1' +PROGRAMMER_OBJS += ast2400.o +NEED_LIBPCI += CONFIG_AST2400 +endif + ifeq ($(CONFIG_SATASII), yes) FEATURE_CFLAGS += -D'CONFIG_SATASII=1' PROGRAMMER_OBJS += satasii.o diff --git a/ast2400.c b/ast2400.c new file mode 100644 index 0000000..72e108a --- /dev/null +++ b/ast2400.c @@ -0,0 +1,426 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2016 Raptor Engineering, LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_ASPEED 0x1a03 + +#define ASPEED_MEMMAP_SIZE (128 * 1024) +#define ASPEED_P2A_OFFSET 0x10000 + +#define AST2400_SCU_APB_ADDR 0x1e6e2000 +#define AST2400_SCU_APB_BRIDGE_OFFSET (AST2400_SCU_APB_ADDR & 0xffff) +#define AST2400_SCU_PROT_KEY 0x00 +#define AST2400_SCU_MISC_CTL 0x2c +#define AST2400_SCU_HW_STRAP 0x70 + +#define AST2400_SCU_PASSWORD 0x1688a8a8 +#define AST2400_SCU_BOOT_SRC_MASK 0x3 +#define AST2400_SCU_BOOT_SPI 0x2 +#define AST2400_SCU_BOOT_NONE 0x3 + +#define AST2400_SMC_APB_ADDR 0x1e620000 +#define AST2400_SMC_FMC00 0x00 +#define AST2400_SMC_CE_CTL(N) (0x10 + (N * 4)) +#define AST2400_SMC_CE_SEG(N) (0x30 + (N * 4)) + +#define AST2400_SMC_FLASH_MMIO_ADDR 0x20000000 + +#define AST2400_SPI_APB_ADDR 0x1e630000 +#define AST2400_SPI_CFG 0x00 +#define AST2400_SPI_CTL 0x04 + +#define AST2400_SPI_CFG_WRITE_EN 0x1 +#define AST2400_SPI_CMD_FAST_R_MODE 0x1 +#define AST2400_SPI_CMD_USER_MODE 0x3 +#define AST2400_SPI_CMD_MASK 0x3 +#define AST2400_SPI_STOP_CE_ACTIVE (0x1 << 2) +#define AST2400_SPI_CPOL_1 (0x1 << 4) +#define AST2400_SPI_LSB_FIRST_CTRL (0x1 << 5) +#define AST2400_SPI_SPEED_MASK (0xf << 8) +#define AST2400_SPI_IO_MODE_MASK (0x3 << 28) + +#define AST2400_SPI_FLASH_MMIO_ADDR 0x30000000 + +#define AST2400_WDT_APB_ADDR 0x1e785000 +#define AST2400_WDT_APB_BRIDGE_OFFSET (AST2400_WDT_APB_ADDR & 0xffff) + +#define AST2400_WDT1_CTL 0x0c + +#define AST2400_WDT_RESET_MODE_MASK (0x3 << 5) +#define AST2400_WDT_RESET_CPU_ONLY (0x2 << 5) + +uint8_t *aspeed_bar = 0; +uint8_t aspeed_spi_bus = 0; +uint8_t aspeed_halt_cpu = 0; +uint8_t aspeed_resume_cpu = 0; +uint8_t aspeed_tickle_fw = 0; +uint32_t aspeed_flash_mmio_offset = 0; +uint32_t aspeed_host_mode = 0; +uint32_t original_wdt_conf = 0; + +const struct dev_entry bmc_aspeed[] = { + {PCI_VENDOR_ID_ASPEED, 0x2000, OK, "ASPEED", "AST2400" }, + + {0}, +}; + +static int ast2400_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); + +static const struct spi_master spi_master_ast2400 = { + .type = SPI_CONTROLLER_AST2400, + .max_data_read = 256, + .max_data_write = 256, + .command = ast2400_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, +}; + +static int ast2400_set_a2b_bridge_scu(void) +{ + pci_mmio_writel(0x0, aspeed_bar + 0xf000); + pci_mmio_writel(AST2400_SCU_APB_ADDR & 0xffff0000, aspeed_bar + 0xf004); + pci_mmio_writel(0x1, aspeed_bar + 0xf000); + + return 0; +} + +static int ast2400_set_a2b_bridge_wdt(void) +{ + pci_mmio_writel(0x0, aspeed_bar + 0xf000); + pci_mmio_writel(AST2400_WDT_APB_ADDR & 0xffff0000, aspeed_bar + 0xf004); + pci_mmio_writel(0x1, aspeed_bar + 0xf000); + + return 0; +} + +static int ast2400_set_a2b_bridge_smc(void) +{ + pci_mmio_writel(0x0, aspeed_bar + 0xf000); + pci_mmio_writel(AST2400_SMC_APB_ADDR, aspeed_bar + 0xf004); + pci_mmio_writel(0x1, aspeed_bar + 0xf000); + + return 0; +} + +static int ast2400_set_a2b_bridge_spi(void) +{ + pci_mmio_writel(0x0, aspeed_bar + 0xf000); + pci_mmio_writel(AST2400_SPI_APB_ADDR, aspeed_bar + 0xf004); + pci_mmio_writel(0x1, aspeed_bar + 0xf000); + + return 0; +} + +static int ast2400_set_a2b_bridge_smc_flash(void) +{ + pci_mmio_writel(0x0, aspeed_bar + 0xf000); + pci_mmio_writel(AST2400_SMC_FLASH_MMIO_ADDR + aspeed_flash_mmio_offset, aspeed_bar + 0xf004); + pci_mmio_writel(0x1, aspeed_bar + 0xf000); + + return 0; +} + +static int ast2400_set_a2b_bridge_spi_flash(void) +{ + pci_mmio_writel(0x0, aspeed_bar + 0xf000); + pci_mmio_writel(AST2400_SPI_FLASH_MMIO_ADDR, aspeed_bar + 0xf004); + pci_mmio_writel(0x1, aspeed_bar + 0xf000); + + return 0; +} + +static int ast2400_disable_cpu(void) { + uint32_t dword; + + if (aspeed_halt_cpu) { + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_HW_STRAP); + if (((dword & AST2400_SCU_BOOT_SRC_MASK) != AST2400_SCU_BOOT_SPI) + && ((dword & AST2400_SCU_BOOT_SRC_MASK) != AST2400_SCU_BOOT_NONE)) { /* NONE permitted to allow for BMC recovery after Ctrl+C or crash */ + msg_perr("CPU halt requested but CPU firmware source is not SPI.\n"); + pci_mmio_writel(0x0, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_PROT_KEY); + aspeed_halt_cpu = 0; + return 1; + } + + /* Disable WDT from issuing full SoC reset + * Without this, OpenPOWER systems will crash when the GPIO blocks are reset on WDT timeout + */ + msg_pinfo("Configuring P2A bridge for WDT access\n"); + ast2400_set_a2b_bridge_wdt(); + original_wdt_conf = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_WDT_APB_BRIDGE_OFFSET + AST2400_WDT1_CTL); + pci_mmio_writel((original_wdt_conf & ~AST2400_WDT_RESET_MODE_MASK) | AST2400_WDT_RESET_CPU_ONLY, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_WDT_APB_BRIDGE_OFFSET + AST2400_WDT1_CTL); + + /* Disable CPU */ + ast2400_set_a2b_bridge_scu(); + pci_mmio_writel((dword & ~AST2400_SCU_BOOT_SRC_MASK) | AST2400_SCU_BOOT_NONE, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_HW_STRAP); + } + + return 0; +} + +static int ast2400_enable_cpu(void) { + uint32_t dword; + + if (aspeed_halt_cpu && aspeed_resume_cpu) { + /* Re-enable CPU */ + ast2400_set_a2b_bridge_scu(); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_HW_STRAP); + pci_mmio_writel((dword & ~AST2400_SCU_BOOT_SRC_MASK) | AST2400_SCU_BOOT_SPI, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_HW_STRAP); + + /* Reset WDT configuration */ + ast2400_set_a2b_bridge_wdt(); + pci_mmio_writel((original_wdt_conf & ~AST2400_WDT_RESET_MODE_MASK) | AST2400_WDT_RESET_CPU_ONLY, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_WDT_APB_BRIDGE_OFFSET + AST2400_WDT1_CTL); + } + + return 0; +} + +static int ast2400_shutdown(void *data) { + /* Reactivate CPU if previously deactivated */ + ast2400_enable_cpu(); + + /* Disable backdoor APB access */ + pci_mmio_writel(0x0, aspeed_bar + 0xf000); + + return 0; +} + +int ast2400_init(void) +{ + struct pci_dev *dev = NULL; + uint32_t dword; + uint8_t divisor; + + char *arg; + + aspeed_spi_bus = 0; + arg = extract_programmer_param("spibus"); + if (arg) { + if (!strcmp(arg,"host")) + aspeed_host_mode = 1; + else + aspeed_spi_bus = strtol(arg, NULL, 0); + } + free(arg); + + aspeed_halt_cpu = 0; + arg = extract_programmer_param("cpu"); + if (arg && !strcmp(arg,"pause")) { + aspeed_halt_cpu = 1; + aspeed_resume_cpu = 1; + } + if (arg && !strcmp(arg,"halt")) { + aspeed_halt_cpu = 1; + aspeed_resume_cpu = 0; + } + arg = extract_programmer_param("tickle"); + if (arg && !strcmp(arg,"true")) + aspeed_tickle_fw = 1; + free(arg); + + if ((aspeed_host_mode == 0) && ((aspeed_spi_bus < 0) || (aspeed_spi_bus > 4))) { + msg_perr("SPI bus number out of range! Valid values are 0 - 4.\n"); + return 1; + } + + if (rget_io_perms()) + return 1; + + dev = pcidev_init(bmc_aspeed, PCI_BASE_ADDRESS_1); + if (!dev) + return 1; + + uintptr_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_1); + if (!io_base_addr) + return 1; + + msg_pinfo("Detected ASPEED MMIO base address: 0x%p.\n", (void*)io_base_addr); + + aspeed_bar = rphysmap("ASPEED", io_base_addr, ASPEED_MEMMAP_SIZE); + if (aspeed_bar == ERROR_PTR) + return 1; + + if (register_shutdown(ast2400_shutdown, dev)) + return 1; + + io_base_addr += ASPEED_P2A_OFFSET; + msg_pinfo("ASPEED P2A base address: 0x%p.\n", (void*)io_base_addr); + + msg_pinfo("Configuring P2A bridge for SCU access\n"); + ast2400_set_a2b_bridge_scu(); + pci_mmio_writel(AST2400_SCU_PASSWORD, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_PROT_KEY); + + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_MISC_CTL); + pci_mmio_writel(dword & ~((0x1 << 24) | (0x2 << 22)), aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SCU_APB_BRIDGE_OFFSET + AST2400_SCU_MISC_CTL); + + /* Halt CPU if requested */ + if (ast2400_disable_cpu()) + return 1; + + msg_pinfo("Configuring P2A bridge for SMC access\n"); + ast2400_set_a2b_bridge_smc(); + + if (aspeed_host_mode) { + msg_pinfo("Configuring P2A bridge for SPI access\n"); + ast2400_set_a2b_bridge_spi(); + + divisor = 0; /* Slowest speed for now */ + + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CTL); + dword &= ~AST2400_SPI_SPEED_MASK; + dword |= (divisor << 8); + dword &= ~AST2400_SPI_CPOL_1; + dword &= ~AST2400_SPI_LSB_FIRST_CTRL; /* MSB first */ + dword &= ~AST2400_SPI_IO_MODE_MASK; /* Single bit I/O mode */ + pci_mmio_writel(dword, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CTL); + } + else { + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_FMC00); + if (((dword >> (aspeed_spi_bus * 2)) & 0x3) != 0x2) { + msg_perr("CE%01x Flash type is not SPI!\n", aspeed_spi_bus); + return 1; + } + + msg_pinfo("Enabling CE%01x write\n", aspeed_spi_bus); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_FMC00); + pci_mmio_writel(dword | (0x1 << (16 + aspeed_spi_bus)), aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_FMC00); + + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_SEG(aspeed_spi_bus)); + aspeed_flash_mmio_offset = ((dword >> 16) & 0x3f) * 0x800000; + msg_pinfo("Using CE%01x offset %08x\n", aspeed_spi_bus, aspeed_flash_mmio_offset); + } + + register_spi_master(&spi_master_ast2400); + + return 0; +} + +static void ast2400_spi_xfer_data(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) +{ + int i; + uint32_t dword; + + for (i = 0; i < writecnt; i++) + msg_pspew("[%02x]", writearr[i]); + msg_pspew("\n"); + + for (i = 0; i < writecnt; i=i+4) { + if ((writecnt - i) < 4) + break; + dword = writearr[i]; + dword |= writearr[i + 1] << 8; + dword |= writearr[i + 2] << 16; + dword |= writearr[i + 3] << 24; + pci_mmio_writel(dword, aspeed_bar + ASPEED_P2A_OFFSET); + } + for (; i < writecnt; i++) + pci_mmio_writeb(writearr[i], aspeed_bar + ASPEED_P2A_OFFSET); + programmer_delay(1); + for (i = 0; i < readcnt;) { + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET); + if (i < readcnt) + readarr[i] = dword & 0xff; + i++; + if (i < readcnt) + readarr[i] = (dword >> 8) & 0xff; + i++; + if (i < readcnt) + readarr[i] = (dword >> 16) & 0xff; + i++; + if (i < readcnt) + readarr[i] = (dword >> 24) & 0xff; + i++; + } + + for (i = 0; i < readcnt; i++) + msg_pspew("[%02x]", readarr[i]); + msg_pspew("\n"); +} + +/* Returns 0 upon success, a negative number upon errors. */ +static int ast2400_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) +{ + uint32_t dword; + + msg_pspew("%s, cmd=0x%02x, writecnt=%d, readcnt=%d\n", __func__, *writearr, writecnt, readcnt); + + if (aspeed_host_mode) { + /* Set up user command mode */ + ast2400_set_a2b_bridge_spi(); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CFG); + pci_mmio_writel(dword | AST2400_SPI_CFG_WRITE_EN, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CFG); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CTL); + pci_mmio_writel(dword | AST2400_SPI_CMD_USER_MODE, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CTL); + + /* Transfer data */ + ast2400_set_a2b_bridge_spi_flash(); + ast2400_spi_xfer_data(flash, writecnt, readcnt, writearr, readarr); + + /* Tear down user command mode */ + ast2400_set_a2b_bridge_spi(); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CTL); + pci_mmio_writel((dword & ~AST2400_SPI_CMD_MASK) | AST2400_SPI_CMD_FAST_R_MODE, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CTL); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CFG); + pci_mmio_writel(dword & ~AST2400_SPI_CFG_WRITE_EN, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SPI_CFG); + } + else { + /* Set up user command mode */ + ast2400_set_a2b_bridge_smc(); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + pci_mmio_writel(dword | AST2400_SPI_CMD_USER_MODE, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + pci_mmio_writel(dword & ~AST2400_SPI_STOP_CE_ACTIVE, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + + /* Transfer data */ + ast2400_set_a2b_bridge_smc_flash(); + ast2400_spi_xfer_data(flash, writecnt, readcnt, writearr, readarr); + + /* Tear down user command mode */ + ast2400_set_a2b_bridge_smc(); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + pci_mmio_writel(dword | AST2400_SPI_STOP_CE_ACTIVE, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + dword = pci_mmio_readl(aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + pci_mmio_writel((dword & ~AST2400_SPI_CMD_MASK) | AST2400_SPI_CMD_FAST_R_MODE, aspeed_bar + ASPEED_P2A_OFFSET + AST2400_SMC_CE_CTL(aspeed_spi_bus)); + } + + if (aspeed_tickle_fw) { + ast2400_enable_cpu(); + programmer_delay(100); + ast2400_disable_cpu(); + } + + return 0; +} diff --git a/flashrom.c b/flashrom.c index 28b177b..5238cfb 100644 --- a/flashrom.c +++ b/flashrom.c @@ -134,6 +134,18 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_AST2400 == 1 + { + .name = "ast2400", + .type = PCI, + .devs.dev = bmc_aspeed, + .init = ast2400_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_DRKAISER == 1 { .name = "drkaiser", diff --git a/programmer.h b/programmer.h index bd8e98d..25a8506 100644 --- a/programmer.h +++ b/programmer.h @@ -45,6 +45,9 @@ enum programmer { #if CONFIG_GFXNVIDIA == 1 PROGRAMMER_GFXNVIDIA, #endif +#if CONFIG_AST2400 == 1 + PROGRAMMER_AST2400, +#endif #if CONFIG_DRKAISER == 1 PROGRAMMER_DRKAISER, #endif @@ -399,6 +402,12 @@ int gfxnvidia_init(void); extern const struct dev_entry gfx_nvidia[]; #endif +/* ast2400.c */ +#if CONFIG_AST2400 == 1 +int ast2400_init(void); +extern const struct dev_entry bmc_aspeed[]; +#endif + /* drkaiser.c */ #if CONFIG_DRKAISER == 1 int drkaiser_init(void); @@ -600,6 +609,10 @@ enum spi_controller { #if CONFIG_CH341A_SPI == 1 SPI_CONTROLLER_CH341A_SPI, #endif + +#if CONFIG_AST2400 == 1 + SPI_CONTROLLER_AST2400, +#endif }; #define MAX_DATA_UNSPECIFIED 0 -- 2.9.3

1 0

[PATCH 1/4] Obtain correct virtual address for 32-bit BARs on PPC
by Timothy Pearson 12 Oct '16

12 Oct '16

PowerPC systems have the ability to map 32-bit BARs into 64-bit host windows. Reading the BAR directly from the hardware is insufficient on these machines; use the libpci deb->base_addr[x] mechanism instead. --- pcidev.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/pcidev.c b/pcidev.c index 2c78063..34b948b 100644 --- a/pcidev.c +++ b/pcidev.c @@ -37,11 +37,13 @@ enum pci_bartype { uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) { uint64_t addr; - uint32_t upperaddr; uint8_t headertype; uint16_t supported_cycles; enum pci_bartype bartype = TYPE_UNKNOWN; +#ifndef __PPC64__ + uint32_t upperaddr; +#endif headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f; msg_pspew("PCI header type 0x%02x\n", headertype); @@ -97,6 +99,12 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) switch (bartype) { case TYPE_MEMBAR: msg_pdbg("MEM"); +#ifdef __PPC64__ + /* PowerPC is able to translate 32-bit BARs into 64-bit host windows. + * Use the dev->base_addr[x] mechanism to handle mapping. + */ + addr = dev->base_addr[(bar - 0x10) / 0x4] & PCI_BASE_ADDRESS_MEM_MASK; +#else if (!(supported_cycles & PCI_COMMAND_MEMORY)) { msg_perr("MEM BAR access requested, but device has MEM space accesses disabled.\n"); /* TODO: Abort here? */ @@ -122,6 +130,7 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) } } addr &= PCI_BASE_ADDRESS_MEM_MASK; +#endif break; case TYPE_IOBAR: msg_pdbg("I/O\n"); -- 2.9.3

1 0

[PATCH 0/4] Obtain correct virtual address for 32-bit BARs on PPC
by Timothy Pearson 12 Oct '16

12 Oct '16

This series, when combined with the 4BA addressing patches already submitted earlier this year, allows full read/write access to the various Flash devices commonly found attached to AST2400 BMCs on OpenPOWER systems.

1 0

Development flashrom
by Agustin Isasmendi 12 Oct '16

12 Oct '16

Hi friends My name is Agustín Isasmendi, i'm from Argentina. I want add CC3200 support to flashrom app. But i need help for you. Could you send me documentation of flashrom? Thanks!

1 0

Re: [flashrom] flashrom read on board Intel Lynx Point LP Mainstream
by David Hendricks 10 Oct '16

10 Oct '16

The management engine strikes again: https://www.flashrom.org/ME What are you trying to do? You may need to use an external programmer if you want to read the entire chip. On Sat, Oct 8, 2016 at 10:35 PM, John Adams <admin(a)alpherius.xyz> wrote: > flashrom v0.9.9-rc1-r1942 on Linux 4.7.2-galliumos (x86_64) > flashrom is free software, get the source code at https://flashrom.org > > flashrom was built with libpci 3.3.1, GCC 5.3.1 20160225, little endian > Command line (5 args): flashrom --programmer internal -r image.img -V > Calibrating delay loop... OS timer resolution is 1 usecs, 1287M loops per > second, 10 myus = 9 us, 100 myus = 92 us, 1000 myus = 928 us, 10000 myus = > 10183 us, 4 myus = 4 us, OK. > Initializing internal programmer > Found candidate at: 00000500-00000510 > Found coreboot table at 0x00000500. > Found candidate at: 00000000-000003d8 > Found coreboot table at 0x00000000. > coreboot table found at 0x7bf7a000. > coreboot header(24) checksum: e00f table(984) checksum: 8a56 entries: 20 > Vendor ID: Dell, part ID: Wolf > Using Internal DMI decoder. > DMI string chassis-type: "Desktop" > DMI string system-manufacturer: "Dell" > DMI string system-product-name: "Wolf" > DMI string system-version: "1.0" > DMI string baseboard-manufacturer: "" > DMI string baseboard-product-name: "" > DMI string baseboard-version: "" > Found chipset "Intel Lynx Point LP Mainstream" with PCI ID 8086:9c45. > This chipset is marked as untested. If you are using an up-to-date version > of flashrom *and* were (not) able to successfully update your firmware > with it, > then please email a report to flashrom(a)flashrom.org including a verbose > (-V) log. > Thank you! > Enabling flash write... Root Complex Register Block address = 0xfed1c000 > GCS = 0x21: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x0 (SPI) > Top Swap: enabled (A16(+) inverted) > 0xfff80000/0xffb80000 FWH IDSEL: 0x0 > 0xfff00000/0xffb00000 FWH IDSEL: 0x0 > 0xffe80000/0xffa80000 FWH IDSEL: 0x1 > 0xffe00000/0xffa00000 FWH IDSEL: 0x1 > 0xffd80000/0xff980000 FWH IDSEL: 0x2 > 0xffd00000/0xff900000 FWH IDSEL: 0x2 > 0xffc80000/0xff880000 FWH IDSEL: 0x3 > 0xffc00000/0xff800000 FWH IDSEL: 0x3 > 0xff700000/0xff300000 FWH IDSEL: 0x4 > 0xff600000/0xff200000 FWH IDSEL: 0x5 > 0xff500000/0xff100000 FWH IDSEL: 0x6 > 0xff400000/0xff000000 FWH IDSEL: 0x7 > 0xfff80000/0xffb80000 FWH decode enabled > 0xfff00000/0xffb00000 FWH decode enabled > 0xffe80000/0xffa80000 FWH decode enabled > 0xffe00000/0xffa00000 FWH decode enabled > 0xffd80000/0xff980000 FWH decode enabled > 0xffd00000/0xff900000 FWH decode enabled > 0xffc80000/0xff880000 FWH decode enabled > 0xffc00000/0xff800000 FWH decode enabled > 0xff700000/0xff300000 FWH decode enabled > 0xff600000/0xff200000 FWH decode enabled > 0xff500000/0xff100000 FWH decode enabled > 0xff400000/0xff000000 FWH decode enabled > Maximum FWH chip size: 0x100000 bytes > SPI Read Configuration: prefetching enabled, caching enabled, > BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled > SPIBAR = 0x00007fa2ff270000 + 0x3800 > 0x04: 0xe008 (HSFS) > HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 > Warning: SPI Configuration Lockdown activated. > Reading OPCODES... done > 0x06: 0x0000 (HSFC) > HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 > 0x50: 0x00004a4b (FRAP) > BMWAG 0x00, BMRAG 0x00, BRWA 0x4a, BRRA 0x4b > 0x54: 0x00000000 FREG0: Warning: Flash Descriptor region > (0x00000000-0x00000fff) is read-only. > 0x58: 0x07ff0200 FREG1: BIOS region (0x00200000-0x007fffff) is read-write. > 0x5C: 0x01ff0001 FREG2: Warning: Management Engine region > (0x00001000-0x001fffff) is locked. > Not all flash regions are freely accessible by flashrom. This is most > likely > due to an active ME. Please see https://flashrom.org/ME for details. > Writes have been disabled for safety reasons. You can enforce write > support with the ich_spi_force programmer option, but you will most likely > harm your hardware! If you force flashrom you will get no support if > something breaks. On a few mainboards it is possible to enable write > access by setting a jumper (see its documentation or the board itself). > 0x90: 0x84 (SSFS) > SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 > 0x91: 0xf90000 (SSFC) > SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=1 > 0x94: 0x5006 (PREOP) > 0x96: 0xb32d (OPTYPE) > 0x98: 0x05030201 (OPMENU) > 0x9C: 0x0bd89f20 (OPMENU+4) > 0xA0: 0x00000000 (BBAR) > 0xC4: 0x80000000 (LVSCC) > LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=0 > 0xC8: 0x00000000 (UVSCC) > UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0 > 0xD0: 0x50444653 (FPB) > OK. > The following protocols are supported: FWH, SPI. > Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25LQ032/A25LQ32A, 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for AMIC A25LQ64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DL081, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DL161, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT25F512, 64 kB: Invalid OPCODE 0x15, will not execute. > Probing for Atmel AT25F512A, 64 kB: Invalid OPCODE 0x15, will not execute. > Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Atmel AT25F1024(A), 128 kB: Invalid OPCODE 0x15, will not > execute. > Probing for Atmel AT25F2048, 256 kB: Invalid OPCODE 0x15, will not execute. > Probing for Atmel AT25F4096, 512 kB: Invalid OPCODE 0x15, will not execute. > Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB321E, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for ESMT F25L32PA, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25QH64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25QH128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25S10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25S20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25S40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25S80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25S16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25S32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Eon EN25S64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for ESI ES25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for ESI ES25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for ESI ES25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for GigaDevice GD25LQ40, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for GigaDevice GD25LQ80, 1024 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25LQ16, 2048 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25LQ64(B), 8192 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25LQ128, 16384 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q512, 64 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for GigaDevice GD25Q10, 128 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for GigaDevice GD25Q20(B), 256 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q16(B), 2048 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25Q128C, 16384 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for GigaDevice GD25T80, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for GigaDevice GD25VQ41B, 512 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Macronix MX23L1654, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Macronix MX23L3254, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Macronix MX23L6454, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Macronix MX23L12854, 16384 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L2005(C)/MX25L2006E, 256 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L4005(A/C)/MX25L4006E, 512 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L8005/MX25L8006E/MX25L8008E/MX25V8005, 1024 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Macronix MX25L1605A/MX25L1606E/MX25L1608E, 2048 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L1605D/MX25L1608D/MX25L1673E, 2048 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L3205(A), 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L3206E/MX25L3208E, 4096 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L3273E, 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Macronix MX25L6405D, 8192 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L6406E/MX25L6408E, 8192 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E, 8192 > kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25L12805D, 16384 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L12835F/MX25L12845E/MX25L12865E, 16384 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Macronix MX25U1635E, 2048 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25U3235E/F, 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25U6435E/F, 8192 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25U12835F, 16384 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix MX25L6495F, 8192 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P05, 64 kB: Ignoring RES in favour of > RDID. > Probing for Micron/Numonyx/ST M25P10-A, 128 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P10, 128 kB: Ignoring RES in favour of > RDID. > Probing for Micron/Numonyx/ST M25P20, 256 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P20-old, 256 kB: Ignoring RES in favour > of RDID. > Probing for Micron/Numonyx/ST M25P40, 512 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P40-old, 512 kB: Ignoring RES in favour > of RDID. > Probing for Micron/Numonyx/ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25P128, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PE10, 128 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PE20, 256 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PE40, 512 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PE80, 1024 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PE16, 2048 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PX80, 1024 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PX16, 2048 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PX32, 4096 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M25PX64, 8192 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M45PE10, 128 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M45PE20, 256 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M45PE40, 512 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M45PE80, 1024 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST M45PE16, 2048 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST N25Q016, 2048 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST N25Q032..1E, 4096 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST N25Q032..3E, 4096 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST N25Q064..1E, 8192 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST N25Q064..3E, 8192 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST N25Q128..1E, 16384 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Micron/Numonyx/ST N25Q128..3E, 16384 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Nantronics N25S10, 128 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Nantronics N25S20, 256 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Nantronics N25S40, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Nantronics N25S80, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Nantronics N25S16, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for PMC Pm25LD256C, 32 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LD512(C), 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LD010(C), 128 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for PMC Pm25LD020(C), 256 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for PMC Pm25LD040(C), 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for PMC Pm25LQ020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LQ040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LQ080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LQ016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LQ032C, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LV512(A), 64 kB: Invalid OPCODE 0xab, will not execute. > Probing for PMC Pm25LV010, 128 kB: Invalid OPCODE 0xab, will not execute. > Probing for PMC Pm25LV010A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Sanyo LE25FW106, 128 kB: Invalid OPCODE 0xab, will not execute. > Probing for Sanyo LE25FW406A, 512 kB: Invalid OPCODE 0xab, will not > execute. > Probing for Sanyo LE25FU406B, 512 kB: Invalid OPCODE 0xab, will not > execute. > Probing for Sanyo LE25FU406C/LE25U40CMC, 512 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Sanyo LE25FW203A, 256 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Sanyo LE25FW403A, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Sanyo LE25FW418A, 512 kB: Invalid OPCODE 0xab, will not > execute. > Probing for Sanyo LE25FW806, 1024 kB: Invalid OPCODE 0xab, will not > execute. > Probing for Sanyo LE25FW808, 1024 kB: Invalid OPCODE 0xab, will not > execute. > Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Spansion S25FL032A/P, 4096 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Spansion S25FL064A/P, 8192 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Spansion S25FL204K, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Spansion S25FL208K, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Spansion S25FL116K/S25FL216K, 2048 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Spansion S25FL132K, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Spansion S25FL164K, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Spansion S25FL127S-64kB, 16384 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Spansion S25FL127S-256kB, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Spansion S25FL128P......0, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Spansion S25FL128P......1, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Spansion S25FL128S......0, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Spansion S25FL128S......1, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Spansion S25FL129P......0, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Spansion S25FL129P......1, 16384 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for SST SST25LF020A, 256 kB: Invalid OPCODE 0x90, will not execute. > Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. > Probing for SST SST25LF080(A), 1024 kB: Invalid OPCODE 0xab, will not > execute. > Probing for SST SST25VF512(A), 64 kB: Invalid OPCODE 0x90, will not > execute. > Probing for SST SST25VF010(A), 128 kB: Invalid OPCODE 0x90, will not > execute. > Probing for SST SST25VF020, 256 kB: Invalid OPCODE 0x90, will not execute. > Probing for SST SST25VF020B, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. > Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not > execute. > Probing for SST SST25WF020A, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25WF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25WF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for SST SST25WF512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25WF010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25WF020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25WF040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for SST SST25WF080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Winbond W25Q40.V, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q80.V, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q16.V, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q32.V, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q64.V, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Found Winbond flash chip "W25Q64.V" (8192 kB, SPI) mapped at physical > address 0x00000000ff800000. > Chip status register is 0x00. > Probing for Winbond W25Q128.V, 16384 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q20.W, 256 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q40.W, 512 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q80.W, 1024 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q16.W, 2048 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q32.W, 4096 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25Q64.W, 8192 kB: probe_spi_rdid_generic: id1 0xef, > id2 0x4017 > Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not > execute. > Receiving SFDP signature failed. > Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Macronix unknown Macronix SPI chip, 0 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 > 0xef, id2 0x4017 > Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Winbond unknown Winbond (ex Nexcom) SPI chip, 0 kB: > probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: > id1 0xef, id2 0x4017 > Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, > will not execute. > Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x8a, id2 0x85, > id1 is normal flash content, id2 is normal flash content > Probing for Atmel AT49LH00B4, 512 kB: probe_82802ab: id1 0xff, id2 0xff, > id1 parity violation, id1 is normal flash content, id2 is normal flash > content > Probing for Atmel AT49LH004, 512 kB: probe_82802ab: id1 0xff, id2 0xff, > id1 parity violation, id1 is normal flash content, id2 is normal flash > content > Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x4c, id2 0x41, id1 > is normal flash content, id2 is normal flash content > Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x8a, id2 0x85, > id1 is normal flash content, id2 is normal flash content > Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, > id1 parity violation, id1 is normal flash content, id2 is normal flash > content > Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x4c, id2 0x41, > id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x8a, id2 > 0x85, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x89, id2 > 0xe1, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 > 0xff, id1 parity violation, id1 is normal flash content, id2 is normal > flash content > Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, > id1 parity violation, id1 is normal flash content, id2 is normal flash > content > Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x4c, id2 > 0x41, id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x4c, id2 0x41, > id1 is normal flash content, id2 is normal flash content > Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x5f, id2 0x53, > id1 parity violation, id1 is normal flash content, id2 is normal flash > content > Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x4c, id2 0x41, id1 > is normal flash content, id2 is normal flash content > Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x4c, id2 0x41, id1 > is normal flash content, id2 is normal flash content > Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x8a, id2 0x85, id1 is > normal flash content, id2 is normal flash content > Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x5f, id2 0x53, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x4c, id2 0x41, id1 > is normal flash content, id2 is normal flash content > Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 > 0xff, id1 parity violation, id1 is normal flash content, id2 is normal > flash content > Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 > 0xff, id1 parity violation, id1 is normal flash content, id2 is normal > flash content > Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 > 0xff, id1 parity violation, id1 is normal flash content, id2 is normal > flash content > Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x8a, id2 > 0x85, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x4c, id2 > 0x41, id1 is normal flash content, id2 is normal flash content > Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 > 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is > normal flash content > Found Winbond flash chip "W25Q64.V" (8192 kB, SPI). > This chip may contain one-time programmable memory. flashrom cannot read > and may never be able to write it, hence it may not be able to completely > clone the contents of this chip (see man page for details). > Reading flash... Transaction error! > SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 > SSFC: SCGO=0, ACS=0, SPOP=0, COP=2, DBC=63, SME=0, SCF=1 > Running OPCODE 0x03 failed at address 0x001000 (payload length was 64). > Read operation failed! > FAILED. > Restoring MMIO space at 0x7fa2ff2738a0 > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > https://www.flashrom.org/mailman/listinfo/flashrom > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Re: [flashrom] ENE KB9012 patches: new test results
by Paul Kocialkowski 09 Oct '16

09 Oct '16

Hi, I think I may have an explanation for this behavior. Since EDI is enabled via clock detection, it is possible that the first request cannot be served (as it is received concurrently with clock detection) and so gets lost. I have added a dummy read before any required transaction, so that the chip can detect EDI and enable it priori to serving any useful request. This change is available on my git repository[0]. Feel free to try and it and report back, so that I can decide whether to send it to upstream flashrom. [0]: http://git.code.paulk.fr/gitweb/?p=flashrom.git branch next Cheers! -- Paul Kocialkowski, developer of free digital technology at the lower levels Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/

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Re: [flashrom] ENE KB9012 patches: new test results
by Paul Kocialkowski 09 Oct '16

09 Oct '16

HI, Le samedi 08 octobre 2016 à 01:15 +0300, Mike Banon a écrit : > How long are your wires? I am using short ones (the likes of 10 cm). > > For high-speed signals, this can have an influence. > my wires are 11 cm, 8 cm of which is 12 strands high quality copper > and only 3 cm are ordinary aluminium (inside the 30 pin 0.5mm pitch > keyboard-like connector). Copper has 1.65x times better electrical > conductivity than aluminium, so these mixed material 11 cm are about > 7.8 cm in aluminium-only terms, which seems to be short enough to be > reliable, also because read 128KB checksum is always the same Yes, indeed. I was worried that long wires would cause a specific issue in the frequency range we're dealing with, but the symptoms would indeed rather be random errors. And the length looks good anyway. > > Also, you should try to reduce the SPI clock speed: if the > > "works 1 out of 2 times" issue is caused by a clock speed that is > > slightly too fast for the KB9012, lowering it could bring the > > required stability. However, it worked directly with CH341A here. > According to page 229 of kb datasheet EDI_CLK should be between 1 MHz > and 8 MHz, so can't set lower than 1 MHz (tried, it always fails). Right, good point, I had lost sight of that. > With other speeds it works 1 out of 2 times regardless of speed > selection. For CH341A I don't know how to choose a speed, and its' > results are the same (but works much faster). What is interesting is > that, if it would be purely a clock issue, it would have worked in 50% > cases - but there would not be a clear "fail/success/fail/success" > pattern - instead, a bunch of fails and success that are 50% by > average statistics. Yes, you're perfectly right! > Moreover, this "fail/success" pattern always > continues if I unplug a programmer from USB, plug it back and try > again - which makes me sure that the outcome of each try depends on a > current state of KB9012 or board in general. That makes sense. > Possible theory is that KB9012 ENE debug interface (EDI) could behave > differently on different boards. To figure that out, I could give you the spare board that I put out to first write flashrom support while traveling. I know for sure that it works 100% of the time with my setup. > There are four main types of G505S motherboards that I am > aware of: > *) LA-A091P rev.1.0 - discrete graphics is 8570M <-- my case > *) LA-A091P rev.1.A - discrete graphics is 8570M > *) LA-A091P rev.1.A - discrete graphics is R5 M230 > *) LA-A092P rev.1.A - no discrete graphics <-- your case The one I have is marked with LA-A091P rev: 1.A, which has discrete graphics too. I'll order more boards (more or less) soon as I need them for development (both EC and Coreboot), so hopefully I'll get one that has a similar bug. > Also it could be that there was a group of KB9012 with buggy EDI > interface, and both me and Joerg got one :P (but that is less likely) Indeed, but could be possible. I think the best way to figure it out is that I send you one that is known to work reliably with my setup and see if the issue still occurs. > In any case this detection problem is minor, it takes just a couple of > seconds to retry the last console command... Yes indeed, but I'd like to know why it's happening at all. Also, perhaps we can do something about it in the code (IIRC Joerg had sent a change in that direction). I'd be happier if flashrom support for it was reliable for all users :) > On Fri, Oct 7, 2016 at 11:08 AM, Paul Kocialkowski <contact(a)paulk.fr> wrote: > > > > Hi, > > > > Le samedi 01 octobre 2016 à 05:18 +0300, mikeb mikeb a écrit : > > > > > > Hi Paul, very happy to read your reply! I confirm that: > > > 1) grounding pin 42 to go into test mode - OK, all the grounds were > > > connected > > > together: programmer's, mainboard's and KB9012's 42 pin > > > > Sounds good then! Note that the proprietary firmware explicitly disables EDI > > (the protocol used to access the memory), so grounding pin 42 is the only > > way to > > access it. > > > > > > > > 2) powering the mainboard - OK, but only by power adapter, battery was not > > > plugged in. if I do not connect a power adapter, KB9012 cannot be detected > > > at > > > all, which is expected behavior. > > > > This is correct. > > > > > > > > Maybe you are connecting the battery while doing this; there should be > > > some > > > reason why your results are different. In any case, this 50% detection > > > issue > > > is just a minor inconvenience at the moment. What surprising me more is > > > that > > > reading time difference between BPv4 and CH341A > > > > I do not have the battery plugged when flashing the device, and plugging it > > in > > doesn't change anything here. > > > > How long are your wires? I am using short ones (the likes of 10 cm). For > > high > > -speed signals, this can have an influence. Also, you should try to reduce > > the > > SPI clock speed: if the "works 1 out of 2 times" issue is caused by a clock > > speed that is slightly too fast for the KB9012, lowering it could bring the > > required stability. However, it worked directly with CH341A here. > > > > The different read times are likely due to different SPI clock frequencies. > > I > > don't know what CH341A uses but it seems to be a good compromise. FTDI > > programmers tend to use a clock frequency that is too fast for the KB9012, > > so it > > has to be divided with divisor=8. > > > > However, this makes the read slower than CH341A. > > > > > > > > I have some questions for you regarding Origami, but since they are not > > > directly related to flashrom I separate them into another private message > > > without CC'ing a list (you will receive it in less than a hour) > > > > Indeed, let's keep this discussion about flashrom-related topics only. > > > > Origami-EC will get its own infrastructure eventually anyway (I hope soon). > > > > Cheers! > > > > > > > > On Fri, Sep 30, 2016 at 11:20 PM, Paul Kocialkowski <paulk(a)paulk.fr> > > > wrote: > > > > > > > > Hi, I got your emails just fine, I just didn't have time to sit down and > > > > write a proper reply but I'm very enthusiasic about working with you ! > > > > > > > > Cheers, > > > > Paul Kocialkowski > > > > > > > > Le vendredi 23 septembre 2016 à 03:16 +0300, mikeb mikeb a écrit : > > > > > > > > > > Good day! I just tried reading from KB9012 and encountered exactly the > > > > same > > > > > > > > > > problem as Joerg Albert has ( https://www.flashrom.org/pipermail/flash > > > > > rom/ > > > > 2016 > > > > > > > > > > -May/014653.html ) - chip is detected only every second time. This is > > > > > not > > > > > caused by cabling. While it is recommended for SPI that the wires > > > > > should > > > > be > > > > > > > > > > shorter than 20cm, my wires are 11 cm: 8 cm of which is 12 strands > > > > > high > > > > > quality copper and only 3 cm are ordinary aluminium inside the 30 pin > > > > 0.5mm > > > > > > > > > > pitch keyboard-like connector > > > > > > > > This is interesting! I still haven't been able to reproduce the issue > > > > (but > > > > haven't tried so hard either). Could you indicate whether you are: > > > > * grounding pin 42 to go into test mode > > > > * powering the mainboard > > > > > > > > Thanks! > > > > > > > > > > > > > > > > > > NOTE: it was much easier and safer to solder 1P wires to this > > > > > connector > > > > rather > > > > > > > > > > than to motherboard, and you could remove/insert it at any time - what > > > > > a > > > > great > > > > > > > > > > convenience! The only 1P wire I had to solder to motherboard is to > > > > > motherboard's ground, - to make it possible to unite three grounds > > > > > (motherboard s, KB9012 s and programmer s) - and that was really easy > > > > because > > > > > > > > > > at least one of these orange circle grounds has a great distance > > > > > between > > > > it > > > > > > > > > > and motherboard's elements so it is difficult to screw up there :) > > > > > Going > > > > to > > > > > > > > > > share photos and write some manuals about connectivity, hopefully > > > > > helpful > > > > to > > > > > > > > > > the people like me who want to participate in Origami EC project - > > > > creation of > > > > > > > > > > open source firmware for KB9012 which in case of success will be a > > > > > HUGE > > > > step > > > > > > > > > > towards Lenovo G505S liberation (AMD laptop with coreboot support) . > > > > > Discovered Paul's presentation talk by pure accident - > > > > > https://www.youtube.com/watch?v=B708jdCiW7o > > > > > > > > > > So I tried using two SPI programmers: 1) CH341A . 2) Bus Pirate v4 . > > > > > The > > > > only > > > > > > > > > > observed difference is a speed: for CH341A read takes 13-14 minutes, > > > > > while > > > > for > > > > > > > > > > BPv4 - despite the latest 7.0 firmware with level 3 optimizations ( > > > > > http:/ > > > > /dan > > > > > > > > > > gerousprototypes.com/docs/Bus_Pirate#Download ) and SPI speed is 8 MHz > > > > > - > > > > it > > > > > > > > > > takes 40 minutes to read! Checksums of the files are the same and the > > > > files > > > > > > > > > > have almost the same contains as KB9012 image for LA-A091P G505S that > > > > > I > > > > found > > > > > > > > > > online (same except the area 0x1d000 - 0x1e0f0, their image is filled > > > > > with > > > > > 0xff there, mine has many 0x00 with a few 0xff and also data - > > > > > probably > > > > > encoded serial number and similar stuff) , so I am pretty sure these > > > > > programmers both are reading without errors in my setup, just at the > > > > different > > > > > > > > > > speeds for some weird reason > > > > > > > > > > Patches applied before testing: > > > > > 1) https://patchwork.coreboot.org/patch/4412/ > > > > > 2) https://patchwork.coreboot.org/patch/4413/ > > > > > 3) https://patchwork.coreboot.org/patch/4414/ > > > > > > > > > > This problem with 1/2 detection rate is not a blocker, more like a > > > > > small > > > > > inconvenience, so I strongly believe that these patches should be > > > > > merged > > > > as > > > > > > > > > > soon as possible! Paul Kocialkowski has committed them almost a year > > > > > ago, > > > > such > > > > > > > > > > a major feature and still not merged?? > > > > > > > > > > Below you could see some -VVV detection logs. > > > > > > > > > > After reading this really inspiring article ( http://code.paulk.fr/art > > > > > icle > > > > 25/a > > > > > > > > > > n-incentive-for-liberating-computers-my-own-use-case ) I guess that > > > > > Paul's > > > > > motherboard is LA-A092P, very similar to LA-A091P but no extra GPU. > > > > > Could > > > > that > > > > > > > > > > be a reason he is not getting a detection problem? Just a wild > > > > > guess... > > > > > > > > > > Yours sincerely, > > > > > Mikeb > > > > > > > > > > 1) Common part of "2) and "3)" - CH341A tries to detect: > > > > > sudo ./flashrom -p ch341a_spi -c "KB9012 (EDI)" -VVV > > > > > flashrom v0.9.9-r1954 on Linux 4.4.0-36-generic (x86_64) > > > > > flashrom is free software, get the source code at https://flashrom.org > > > > > flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little > > > > > endian > > > > > Command line (5 args): ./flashrom -p ch341a_spi -c KB9012 (EDI) -VVV > > > > > > > > > > 2) FAIL: > > > > > Calibrating delay loop... OS timer resolution is 1 usecs, 578M loops > > > > > per > > > > > second, 10 myus = 11 us, 100 myus = 92 us, 1000 myus = 914 us, 10000 > > > > > myus > > > > = > > > > > > > > > > 9661 us, 4 myus = 5 us, OK. > > > > > Initializing ch341a_spi programmer, Device revision is 3.0.4 > > > > > Wrote 3 bytes: aa 61 00 > > > > > Wrote 4 bytes: ab b7 7f 20 > > > > > The following protocols are supported: SPI. > > > > > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: > > > > > mapping > > > > > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > > > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > > > > > Read 7 bytes: ff ff ff ff 00 00 00 > > > > > programmer_unmap_flash_region: unmapped 0x0000000000000000 > > > > > No EEPROM/flash device found. > > > > > Note: flashrom can never write if the flash chip isn't found > > > > automatically. > > > > > > > > > > Wrote 4 bytes: ab b7 40 20 > > > > > > > > > > 3) SUCCESS: > > > > > Calibrating delay loop... OS timer resolution is 1 usecs, 629M loops > > > > > per > > > > > second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 994 us, 10000 > > > > > myus > > > > = > > > > > > > > > > 9974 us, 4 myus = 4 us, OK. > > > > > Initializing ch341a_spi programmer, Device revision is 3.0.4 > > > > > Wrote 3 bytes: aa 61 00 > > > > > Wrote 4 bytes: ab b7 7f 20 > > > > > The following protocols are supported: SPI. > > > > > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: > > > > > mapping > > > > > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > > > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > > > > > Read 7 bytes: 00 00 00 00 fa 0a c3 > > > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 24 ff ff ff > > > > > Read 7 bytes: 00 00 00 00 fa 0a 20 > > > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > > > > > Read 7 bytes: 00 00 00 00 fa 0a 00 > > > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 80 > > > > > Read 5 bytes: 00 00 00 00 00 > > > > > Found ENE flash chip "KB9012 (EDI)" (128 kB, SPI) on ch341a_spi. > > > > > programmer_unmap_flash_region: unmapped 0x0000000000000000 > > > > > No operations were specified. > > > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > > > > > Read 7 bytes: 00 00 00 00 fa 0a 80 > > > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 00 > > > > > Read 5 bytes: 00 00 00 00 00 > > > > > Wrote 34 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 cf > > > > > Read 1 bytes: 00 > > > > > Wrote 4 bytes: ab b7 40 20 > > > > > > > > > > 4) Small part of Bus Pirate v4 reading log: > > > > > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 > > > > > 0x30 > > > > 0x00 > > > > > > > > > > 0xfe 0xab, receiving 0x01 0x5f 0x50 0x90 > > > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 > > > > > 0x40 > > > > > 0x00 0xfe 0xa8 0xc6, receiving 0x01 > > > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 > > > > > 0x40 > > > > > 0x00 0xfe 0xac 0x03, receiving 0x01 > > > > > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 > > > > > 0x30 > > > > 0x00 > > > > > > > > > > 0xfe 0xab, receiving 0x01 0x5f 0x50 0xec > > > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 > > > > > 0x40 > > > > > 0x00 0xfe 0xa8 0xc7, receiving 0x01 > > > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 > > > > > 0x40 > > > > > 0x00 0xfe 0xac 0x03, receiving 0x01 > > > > > > > > > > 5) Small part of CH341A reading log: > > > > > Read 5 bytes: 00 00 00 00 00 > > > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > > > > > Read 7 bytes: 00 00 00 00 fa 0a ff > > > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 15 fb > > > > > Read 5 bytes: 00 00 00 00 00 > > > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 35 c0 > > > > > Read 5 bytes: 00 00 00 00 00 > > > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 > > > > > 00 > > > > 00 00 > > > > > > > > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > > > > > > > > > -- > > > > Paul Kocialkowski, developer of low-level free software for embedded > > > > devices > > > > > > > > Website: https://www.paulk.fr/ > > > > Coding blog: https://code.paulk.fr/ > > > > Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/ > > > > _______________________________________________ > > > > flashrom mailing list > > > > flashrom(a)flashrom.org > > > > https://www.flashrom.org/mailman/listinfo/flashrom > > > > > > -- > > Paul Kocialkowski, developer of low-level free software for embedded devices > > > > Website: https://www.paulk.fr/ > > Coding blog: https://code.paulk.fr/ > > Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/ -- Paul Kocialkowski, developer of free digital technology at the lower levels Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/

1 0

flashrom read on board Intel Lynx Point LP Mainstream
by John Adams 08 Oct '16

08 Oct '16

1 0

Re: [flashrom] ENE KB9012 patches: new test results
by Paul Kocialkowski 07 Oct '16

07 Oct '16

Hi, Le samedi 01 octobre 2016 à 05:18 +0300, mikeb mikeb a écrit : > Hi Paul, very happy to read your reply! I confirm that: > 1) grounding pin 42 to go into test mode - OK, all the grounds were connected > together: programmer's, mainboard's and KB9012's 42 pin Sounds good then! Note that the proprietary firmware explicitly disables EDI (the protocol used to access the memory), so grounding pin 42 is the only way to access it. > 2) powering the mainboard - OK, but only by power adapter, battery was not > plugged in. if I do not connect a power adapter, KB9012 cannot be detected at > all, which is expected behavior. This is correct. > Maybe you are connecting the battery while doing this; there should be some > reason why your results are different. In any case, this 50% detection issue > is just a minor inconvenience at the moment. What surprising me more is that > reading time difference between BPv4 and CH341A I do not have the battery plugged when flashing the device, and plugging it in doesn't change anything here. How long are your wires? I am using short ones (the likes of 10 cm). For high -speed signals, this can have an influence. Also, you should try to reduce the SPI clock speed: if the "works 1 out of 2 times" issue is caused by a clock speed that is slightly too fast for the KB9012, lowering it could bring the required stability. However, it worked directly with CH341A here. The different read times are likely due to different SPI clock frequencies. I don't know what CH341A uses but it seems to be a good compromise. FTDI programmers tend to use a clock frequency that is too fast for the KB9012, so it has to be divided with divisor=8. However, this makes the read slower than CH341A. > I have some questions for you regarding Origami, but since they are not > directly related to flashrom I separate them into another private message > without CC'ing a list (you will receive it in less than a hour) Indeed, let's keep this discussion about flashrom-related topics only. Origami-EC will get its own infrastructure eventually anyway (I hope soon). Cheers! > On Fri, Sep 30, 2016 at 11:20 PM, Paul Kocialkowski <paulk(a)paulk.fr> wrote: > > Hi, I got your emails just fine, I just didn't have time to sit down and > > write a proper reply but I'm very enthusiasic about working with you ! > > > > Cheers, > > Paul Kocialkowski > > > > Le vendredi 23 septembre 2016 à 03:16 +0300, mikeb mikeb a écrit : > > > Good day! I just tried reading from KB9012 and encountered exactly the > > same > > > problem as Joerg Albert has ( https://www.flashrom.org/pipermail/flashrom/ > > 2016 > > > -May/014653.html ) - chip is detected only every second time. This is not > > > caused by cabling. While it is recommended for SPI that the wires should > > be > > > shorter than 20cm, my wires are 11 cm: 8 cm of which is 12 strands high > > > quality copper and only 3 cm are ordinary aluminium inside the 30 pin > > 0.5mm > > > pitch keyboard-like connector > > > > This is interesting! I still haven't been able to reproduce the issue (but > > haven't tried so hard either). Could you indicate whether you are: > > * grounding pin 42 to go into test mode > > * powering the mainboard > > > > Thanks! > > > > > > > NOTE: it was much easier and safer to solder 1P wires to this connector > > rather > > > than to motherboard, and you could remove/insert it at any time - what a > > great > > > convenience! The only 1P wire I had to solder to motherboard is to > > > motherboard's ground, - to make it possible to unite three grounds > > > (motherboard s, KB9012 s and programmer s) - and that was really easy > > because > > > at least one of these orange circle grounds has a great distance between > > it > > > and motherboard's elements so it is difficult to screw up there :) Going > > to > > > share photos and write some manuals about connectivity, hopefully helpful > > to > > > the people like me who want to participate in Origami EC project - > > creation of > > > open source firmware for KB9012 which in case of success will be a HUGE > > step > > > towards Lenovo G505S liberation (AMD laptop with coreboot support) . > > > Discovered Paul's presentation talk by pure accident - > > > https://www.youtube.com/watch?v=B708jdCiW7o > > > > > > So I tried using two SPI programmers: 1) CH341A . 2) Bus Pirate v4 . The > > only > > > observed difference is a speed: for CH341A read takes 13-14 minutes, while > > for > > > BPv4 - despite the latest 7.0 firmware with level 3 optimizations ( http:/ > > /dan > > > gerousprototypes.com/docs/Bus_Pirate#Download ) and SPI speed is 8 MHz - > > it > > > takes 40 minutes to read! Checksums of the files are the same and the > > files > > > have almost the same contains as KB9012 image for LA-A091P G505S that I > > found > > > online (same except the area 0x1d000 - 0x1e0f0, their image is filled with > > > 0xff there, mine has many 0x00 with a few 0xff and also data - probably > > > encoded serial number and similar stuff) , so I am pretty sure these > > > programmers both are reading without errors in my setup, just at the > > different > > > speeds for some weird reason > > > > > > Patches applied before testing: > > > 1) https://patchwork.coreboot.org/patch/4412/ > > > 2) https://patchwork.coreboot.org/patch/4413/ > > > 3) https://patchwork.coreboot.org/patch/4414/ > > > > > > This problem with 1/2 detection rate is not a blocker, more like a small > > > inconvenience, so I strongly believe that these patches should be merged > > as > > > soon as possible! Paul Kocialkowski has committed them almost a year ago, > > such > > > a major feature and still not merged?? > > > > > > Below you could see some -VVV detection logs. > > > > > > After reading this really inspiring article ( http://code.paulk.fr/article > > 25/a > > > n-incentive-for-liberating-computers-my-own-use-case ) I guess that Paul's > > > motherboard is LA-A092P, very similar to LA-A091P but no extra GPU. Could > > that > > > be a reason he is not getting a detection problem? Just a wild guess... > > > > > > Yours sincerely, > > > Mikeb > > > > > > 1) Common part of "2) and "3)" - CH341A tries to detect: > > > sudo ./flashrom -p ch341a_spi -c "KB9012 (EDI)" -VVV > > > flashrom v0.9.9-r1954 on Linux 4.4.0-36-generic (x86_64) > > > flashrom is free software, get the source code at https://flashrom.org > > > flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian > > > Command line (5 args): ./flashrom -p ch341a_spi -c KB9012 (EDI) -VVV > > > > > > 2) FAIL: > > > Calibrating delay loop... OS timer resolution is 1 usecs, 578M loops per > > > second, 10 myus = 11 us, 100 myus = 92 us, 1000 myus = 914 us, 10000 myus > > = > > > 9661 us, 4 myus = 5 us, OK. > > > Initializing ch341a_spi programmer, Device revision is 3.0.4 > > > Wrote 3 bytes: aa 61 00 > > > Wrote 4 bytes: ab b7 7f 20 > > > The following protocols are supported: SPI. > > > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > > > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > > > Read 7 bytes: ff ff ff ff 00 00 00 > > > programmer_unmap_flash_region: unmapped 0x0000000000000000 > > > No EEPROM/flash device found. > > > Note: flashrom can never write if the flash chip isn't found > > automatically. > > > Wrote 4 bytes: ab b7 40 20 > > > > > > 3) SUCCESS: > > > Calibrating delay loop... OS timer resolution is 1 usecs, 629M loops per > > > second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 994 us, 10000 myus > > = > > > 9974 us, 4 myus = 4 us, OK. > > > Initializing ch341a_spi programmer, Device revision is 3.0.4 > > > Wrote 3 bytes: aa 61 00 > > > Wrote 4 bytes: ab b7 7f 20 > > > The following protocols are supported: SPI. > > > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > > > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a c3 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 24 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a 20 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a 00 > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 80 > > > Read 5 bytes: 00 00 00 00 00 > > > Found ENE flash chip "KB9012 (EDI)" (128 kB, SPI) on ch341a_spi. > > > programmer_unmap_flash_region: unmapped 0x0000000000000000 > > > No operations were specified. > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a 80 > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 00 > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 34 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 cf > > > Read 1 bytes: 00 > > > Wrote 4 bytes: ab b7 40 20 > > > > > > 4) Small part of Bus Pirate v4 reading log: > > > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 > > 0x00 > > > 0xfe 0xab, receiving 0x01 0x5f 0x50 0x90 > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xa8 0xc6, receiving 0x01 > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xac 0x03, receiving 0x01 > > > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 > > 0x00 > > > 0xfe 0xab, receiving 0x01 0x5f 0x50 0xec > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xa8 0xc7, receiving 0x01 > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xac 0x03, receiving 0x01 > > > > > > 5) Small part of CH341A reading log: > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a ff > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 15 fb > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 35 c0 > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > > > > > -- > > Paul Kocialkowski, developer of low-level free software for embedded devices > > > > Website: https://www.paulk.fr/ > > Coding blog: https://code.paulk.fr/ > > Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/ > > _______________________________________________ > > flashrom mailing list > > flashrom(a)flashrom.org > > https://www.flashrom.org/mailman/listinfo/flashrom > > -- Paul Kocialkowski, developer of low-level free software for embedded devices Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/

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flashrom October 2016