Attention is currently required from: Nico Huber, Edward O'Callaghan, Neill Corlett. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61288 )
Change subject: Add mediatek_i2c_spi interface ......................................................................
Patch Set 2:
(3 comments)
File mediatek_i2c_spi.c:
https://review.coreboot.org/c/flashrom/+/61288/comment/4c5d2b8f_a59c3ac9 PS1, Line 96: args.data->block
This is copying the data out of the i2c_smbus_data, starting at 1, using the size specified by [0].
I imagine Edward would like to avoid pointer arithmetics, substituting `args.data->block + 1` with `&args.data->block[1]`.
https://review.coreboot.org/c/flashrom/+/61288/comment/1c39616f_6a30553b PS1, Line 242: GPIO line
This is specific to the revision of chip that our board uses (TSUMOP82JUQ).
At the very least, I'd add an option to enable WP# control.
https://review.coreboot.org/c/flashrom/+/61288/comment/6b711c64_fa9c87a6 PS1, Line 249: 0x426, 7
The TSUMOP82JUQ has a GPIO line going to WP# on SPI, and these two registers (0x426 and 0x428) contr […]
Hmmm, I see. Could other boards with the same chip use a different GPIO for WP#?
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Angel Pons (Code Review)