[M] Change in flashrom[master]: flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME

[Martin Roth (Code Review)]

Attention is currently required from: Angel Pons, Raj Astekar, Ravishankar Sarawadi, Wonkyu Kim.

Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58025?usp=email )

Change subject: flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME
......................................................................

Patch Set 4:

(3 comments)

File flashchips.c:

https://review.coreboot.org/c/flashrom/+/58025/comment/f78f29e6_42fd48f0 :
PS4, Line 6415: FEATURE_4BA_WREN
I don't think that this chip requires WREN before setting 4 bit addressing.

It also supports QPI, so I think this should be:

```
FEATURE_QPI | FEATURE_4BA
```

https://review.coreboot.org/c/flashrom/+/58025/comment/9d17cba0_6fce0e12 :
PS4, Line 6434: .eraseblocks = { {64 * 1024, 1024} },
It looks like we lost the .block_erase identifier:

```
.eraseblocks = { {64 * 1024, 1024} },
.block_erase = spi_block_erase_dc,
```

https://review.coreboot.org/c/flashrom/+/58025/comment/a2f2c514_5b8de3c6 :
PS4, Line 6450: 		.voltage        = {1600, 2000},
Maybe add the register bits?  I think this is right:
```
.reg_bits       =
                {
                        .srp    = {STATUS1, 7, RW},
                        .bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
                        .tb     = {STATUS1, 6, RW},
                },
```