Attention is currently required from: Angel Pons, Raj Astekar, Ravishankar Sarawadi, Wonkyu Kim.
View Change
3 comments:
File flashchips.c:
Patch Set #4, Line 6415: FEATURE_4BA_WREN
I don't think that this chip requires WREN before setting 4 bit addressing.
It also supports QPI, so I think this should be:
```
FEATURE_QPI | FEATURE_4BA
```
Patch Set #4, Line 6434: .eraseblocks = { {64 * 1024, 1024} },
It looks like we lost the .block_erase identifier:
```
.eraseblocks = { {64 * 1024, 1024} },
.block_erase = spi_block_erase_dc,
```
Patch Set #4, Line 6450: .voltage = {1600, 2000},
Maybe add the register bits? I think this is right:
```
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.tb = {STATUS1, 6, RW},
},
```
To view, visit change 58025. To unsubscribe, or for help writing mail filters, visit settings.
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I2fe6bc1219cd1ee19b93caabab69de938cfc44b0
Gerrit-Change-Number: 58025
Gerrit-PatchSet: 4
Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Raj Astekar <raj.astekar@intel.com>
Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai@intel.com>
Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Anastasia Klimchuk <aklm@chromium.org>
Gerrit-CC: Martin Roth <martin.roth@amd.corp-partner.google.com>
Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi@intel.corp-partner.google.com>
Gerrit-CC: Thomas Heijligen <src@posteo.de>
Gerrit-Attention: Wonkyu Kim <wonkyu.kim@intel.com>
Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com>
Gerrit-Attention: Angel Pons <th3fanbus@gmail.com>
Gerrit-Attention: Raj Astekar <raj.astekar@intel.com>
Gerrit-Comment-Date: Fri, 16 Jun 2023 19:36:59 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment