Attention is currently required from: qianfan, Nicholas Chin, Angel Pons.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70529 )
Change subject: Add initial CH347T SPI programmer ......................................................................
Patch Set 6:
(2 comments)
File ch347t_spi.c:
https://review.coreboot.org/c/flashrom/+/70529/comment/786bc1e6_0773826c PS5, Line 169: if (n > CH347_MAX_DATA_WRITE) : n = CH347_MAX_DATA_WRITE;
I can't find a better idea, could you please give me some advices?
Oh wait, this is chunking the transfers, right? It's a bit confusing because the chunk size goes through `libusb_bulk_transfer()`. If so, then this seems reasonable. No idea if flashrom has a `MIN(a, b)` macro somewhere; if it does, then one could do:
size_t n = MIN(sz, CH347_MAX_DATA_WRITE);
https://review.coreboot.org/c/flashrom/+/70529/comment/a5970d6c_723fe928 PS5, Line 279: memset(&csctrl, 0, sizeof(csctrl));
OK
Thanks!
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