Attention is currently required from: Angel Pons, Martin L Roth, Martin Roth, Nikolai Artemiev, Peter Marheine, Raj Astekar, Ravishankar Sarawadi, Wonkyu Kim.
Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58025?usp=email )
Change subject: flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME ......................................................................
Patch Set 9:
(8 comments)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58025/comment/757c5505_65b33e2e : PS8, Line 6590: SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD
Datasheet has BP4, so this should be `SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD`
Done
https://review.coreboot.org/c/flashrom/+/58025/comment/babfbf5f_527af607 : PS8, Line 6591: SPI_DISABLE_BLOCKPROTECT
SPI_DISABLE_BLOCKPROTECT_BP4_SRWD
Done
https://review.coreboot.org/c/flashrom/+/58025/comment/a9ca038e_00b9c8ef : PS8, Line 6594: {1600, 2000}
Slight correction : from datasheet it's 1.65~2. […]
Done
https://review.coreboot.org/c/flashrom/+/58025/comment/7150c154_8d09c229 : PS8, Line 6599: .tb = {STATUS1, 6, RW},
In such cases you should add a comment: […]
Done
https://review.coreboot.org/c/flashrom/+/58025/comment/c8375f77_2ef8c3b8 : PS8, Line 6646: SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD
SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD
Done
https://review.coreboot.org/c/flashrom/+/58025/comment/f07fcadc_252825b9 : PS8, Line 6647: SPI_DISABLE_BLOCKPROTECT
SPI_DISABLE_BLOCKPROTECT_BP4_SRWD
Done
https://review.coreboot.org/c/flashrom/+/58025/comment/70902419_f56fdd17 : PS8, Line 6650: {1600, 2000},
1.65~2. […]
Done
https://review.coreboot.org/c/flashrom/+/58025/comment/02e38de8_d2e09c2b : PS8, Line 6655: .tb = {STATUS1, 6, RW},
Also as above, needs a comment: […]
Done