Change in flashrom[staging]: ichspi: Disable software sequencing by default for Skylake

[David Hendricks (Code Review)]

David Hendricks has posted comments on this change. ( https://review.coreboot.org/22274 )

Change subject: ichspi: Disable software sequencing by default for Skylake
......................................................................

Patch Set 1: Code-Review+2

(1 comment)

The Lewisburg datasheet seems to indicate that SCGO is RW, and I'm not aware of any C62x variants where that use a different datasheet. So I think we're safe there.

However, I haven't tested swseq on Lewisburg since, as you suggested, I don't have one with an unlocked/non-zero opmenu at the moment. Flashrom sees the missing opcodes and falls back to hwseq on my test system.

https://review.coreboot.org/#/c/22274/1/ichspi.c
File ichspi.c:

https://review.coreboot.org/#/c/22274/1/ichspi.c@1957
PS1, Line 1957: 		}
Would it make sense to move this to line 1800, closer to where ich_spi_mode gets set (near the beginning of case CHIPSET_ICH8)?