Change in flashrom[master]: spi_master: Introduce SPI_MASTER_4BA feature flag

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/22421 )

Change subject: spi_master: Introduce SPI_MASTER_4BA feature flag
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Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/22421/5/spi25.c
File spi25.c:

https://review.coreboot.org/#/c/22421/5/spi25.c@380
PS5, Line 380: 				 "Please report a bug at [e-mail]\n");
> How so? If you're referring to chip erase commands, those are handled using

I'm talking about the block erase commands. If the core read/erase/write
code tries a native 4BA erase and the master doesn't support it, we end
up here.

Maybe we should handle native 4BA erase commands differently. e.g. put
them in a separate list? or bail out earlier? Though, my last plan was
to ask the master anyway if an erase command is supported (e.g. 3BA
commands may not be as well in case of locked opcodes on Intel) instead
of going through all the preparations and trying.