[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake

[Subrata Banik (Code Review)]

Attention is currently required from: Hsuan-ting Chen.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81357?usp=email )

Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake
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Patch Set 2:

(1 comment)

File ichspi.c:

https://review.coreboot.org/c/flashrom/+/81357/comment/82abe3d6_838d31df :
PS1, Line 1848: case CHIPSET_METEOR_LAKE:
> It was your previous CL that put MTL in that position

For sure that is my CL which added MTL after ADL but there is no such restriction to maintain the order. You can move the macro at the end of the list.
> (https://review.coreboot.org/c/flashrom/+/62783) Could you share if (1) We could move it to the very end

Please move MTL as the end so we can add LNL and PTL after MTL.
> (2) Will there be any other chipset name which will be moved to make the order makes sense?

Looking at ur current logic, i felt the MTL is the first SOC where we would like to enable this support hence, moving MTL is okay and new Intel SOC can be added after MTL so, the suggested logic (by me) works w/o any maintenance burden.