Change in flashrom[master]: sb600spi.c: Use SPI100 bit mappings

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Robert Zieba, Paul Menzel, Jon Murphy, Edward O'Callaghan, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63422 )

Change subject: sb600spi.c: Use SPI100 bit mappings
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Patch Set 2:

(3 comments)

Commit Message:

https://review.coreboot.org/c/flashrom/+/63422/comment/bd80d4d2_ce0ed620 
PS1, Line 11: generation
> generations?

Done

https://review.coreboot.org/c/flashrom/+/63422/comment/6537841e_fcef8cfc 
PS1, Line 8: 
           : Flashrom has been using legacy spi100 bit mappings when programming the
           : opcode and triggering the command. These legacy bit mappings are
           : deprecated in upcoming generation of AMD SoCs.
> The knowledge of how SPI100 works completely is spare, can you provide more precise details here?

Added more details relevant to this CL. Also added the reference document number (for Cezanne SoC) which has some details about SPI100.

https://review.coreboot.org/c/flashrom/+/63422/comment/edc5ae1e_43074ca6 
PS1, Line 11: Stop using the legacy
            : spi100 registers and use the correct ones.
> Ran on Cezanne and everything looks good […]

Done