[M] Change in flashrom[master]: ichspi.c: Read chip ID and use it to populate `flash->chip`

[Nico Huber (Code Review)]

Attention is currently required from: Angel Pons, Nikolai Artemiev.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69195 )

Change subject: ichspi.c: Read chip ID and use it to populate `flash->chip`
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Patch Set 12:

(6 comments)

File ichspi.c:

https://review.coreboot.org/c/flashrom/+/69195/comment/229372ca_f2c15230 
PS12, Line 1500: 	flash->chip->tested = TEST_OK_PREWB;
What if ich_hwseq_get_flash_id() bailed?

https://review.coreboot.org/c/flashrom/+/69195/comment/26c5d96f_52e3d538 
PS12, Line 135: #define HSFC_CYCLE_RDID		HSFC_FCYCLE_MASK(6)
This belongs to PCH100_HSFC_FCYCLE*. It doesn't fit in the 2 bits for ICH9.
(ICH9_HSFC_FCYCLE_BIT_WIDTH is a mask, not a number of bits, apparently).

https://review.coreboot.org/c/flashrom/+/69195/comment/4d7ff62c_95702594 
PS12, Line 1404: 		if ((chip->manufacture_id == mfg_id) && (chip->model_id == model_id))
Should check if it's a SPI flash and if the database numbers are for RDID.

https://review.coreboot.org/c/flashrom/+/69195/comment/d7deac47_99b4b57a 
PS12, Line 1466: 	const int len = sizeof(data);
Why 4?

https://review.coreboot.org/c/flashrom/+/69195/comment/699cafbf_a65018c0 
PS12, Line 1474: 	if (ich_exec_sync_hwseq_xfer(flash, HSFC_CYCLE_RDID, 1, len, ich_generation,
Should check if RDID cycle is supported (since PCH100).

https://review.coreboot.org/c/flashrom/+/69195/comment/e43ed110_ed398c89 
PS12, Line 1494: 		return -1;
Does this break normal read/erase/write operation if there is no matching entry?