Attention is currently required from: Xiang Wang, Stefan Reinauer, Angel Pons.
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49255 )
Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
Patch Set 14:
(2 comments)
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/5eda1d7a_c06cf981
PS12, Line 208:
: if (parse_spi_mode(&cpol, &cpha))
: return ERROR_FLASHROM_BUG;
If the parameter mode is not set, parse_spi_mode returns 0. […]
Where are they initialised to 0?
Also you may as well update the man page in this commit then for completeness.
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/e5c5dd6e_877c30ae
PS14, Line 41:
: static int cpol; /* Clock Polarity */
: static int cpha; /* Clock Phase */
sounds like you want,
```
static int cpol = 0; /* Clock Polarity */
static int cpha = 0; /* Clock Phase */
```
--
To view, visit
https://review.coreboot.org/c/flashrom/+/49255
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d
Gerrit-Change-Number: 49255
Gerrit-PatchSet: 14
Gerrit-Owner: Xiang Wang
merle@hardenedlinux.org
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Edward O'Callaghan
quasisec@chromium.org
Gerrit-Reviewer: Stefan Reinauer
stefan.reinauer@coreboot.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Shawn C
citypw@hardenedlinux.org
Gerrit-Attention: Xiang Wang
merle@hardenedlinux.org
Gerrit-Attention: Stefan Reinauer
stefan.reinauer@coreboot.org
Gerrit-Attention: Angel Pons
th3fanbus@gmail.com
Gerrit-Comment-Date: Sun, 10 Jan 2021 07:54:56 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Xiang Wang
merle@hardenedlinux.org
Comment-In-Reply-To: Edward O'Callaghan
quasisec@chromium.org
Gerrit-MessageType: comment