Attention is currently required from: Stefan Reinauer, Edward O'Callaghan, Angel Pons. Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49255 )
Change subject: bitbang-spi.c: support clock polarity and phase ......................................................................
Patch Set 16:
(4 comments)
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/db8db323_4c4d4f75 PS14, Line 74: bitbang_spi_set_sck_set_mosi
Where did this go?
read operate don't care mosi. The previous code is problematic.
https://review.coreboot.org/c/flashrom/+/49255/comment/2040673c_b3a40d5e PS14, Line 53: master->set_sck(val);
For sanity's sake, only use `cpol` here.
This obscures the meaning
https://review.coreboot.org/c/flashrom/+/49255/comment/19b6fb57_11b88c63 PS14, Line 68: bitbang_spi_set_sck_set_mosi
If you're reordering the operations inside this function, I would also rename everything accordingly […]
https://review.coreboot.org/c/flashrom/+/49264
https://review.coreboot.org/c/flashrom/+/49255/comment/0672fef7_146ed232 PS14, Line 210: ERROR_FLASHROM_BUG
Definitely not a flashrom bug.
I am not very clear, the previous code used this to put back the value
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Xiang Wang (Code Review)