Attention is currently required from: Nicholas Chin, Angel Pons.
qianfan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70529 )
Change subject: Add initial CH347T SPI programmer ......................................................................
Patch Set 3:
(2 comments)
File ch347t_spi.c:
https://review.coreboot.org/c/flashrom/+/70529/comment/f1df6b3a_e10a2e94 PS3, Line 119: SPI_NSS_HARD
The vendor drivers set this to 0x0200, which is SPI_NSS_SOFT in the enum. […]
OK, I will change it to SPI_NSS_SOFT, as same as the vendor drivers.
https://review.coreboot.org/c/flashrom/+/70529/comment/2e197e3d_ebbf2b7b PS3, Line 420: 0
Rewording what I meant: Mode 1 uses interface 2, so the code currently will not correctly detach the […]
Got it. I will make a change.
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qianfan (Code Review)