Attention is currently required from: Stefan Reinauer, Edward O'Callaghan, Angel Pons. Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49255 )
Change subject: bitbang-spi.c: support clock polarity and phase ......................................................................
Patch Set 13:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/49255/comment/cbaa3c9b_184bb89f PS12, Line 12: .
Also state the previous mode here that is currently assumed.
Done
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/0699be98_26d81ce2 PS12, Line 208: : if (parse_spi_mode(&cpol, &cpha)) : return ERROR_FLASHROM_BUG;
Hmm, the only thing is this could be a little too harsh for this patch in that, could we just assume […]
If the parameter mode is not set, parse_spi_mode returns 0. cpol/cpha will default to 0 and use spi's mode0. Only when the user specifies the mode parameter and the value of mode is not 0-3 will an error occur
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Xiang Wang (Code Review)