Attention is currently required from: Robert Zieba, Paul Menzel, Jon Murphy, Edward O'Callaghan, Karthik Ramasubramanian.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63422 )
Change subject: sb600spi.c: Use SPI100 bit mappings
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63422/comment/f066a9cd_aef12d9c
PS1, Line 8:
: Flashrom has been using legacy spi100 bit mappings when programming the
: opcode and triggering the command. These legacy bit mappings are
: deprecated in upcoming generation of AMD SoCs.
Added more details relevant to this CL. […]
spi_ctrlr_xfer in soc/amd/common/block/spi/fch_spi_ctrl.c in coreboot might clarify a bit how this spi100 engine is used
https://review.coreboot.org/c/flashrom/+/63422/comment/3bf8fcf4_796507e9
PS1, Line 11: Stop using the legacy
: spi100 registers and use the correct ones.
Done
give me a few hours to check with the docs that this won't break things on older platforms before landing this patch
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