Attention is currently required from: Khem Raj, Edward O'Callaghan. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/51960 )
Change subject: flashrom: Mark RISCV as non memory-mapped I/O architecture ......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1: What's the reason for the change? I don't even understand why the Makefile enables the programmers for the other arches w/o port-I/O implementation.
File Makefile:
https://review.coreboot.org/c/flashrom/+/51960/comment/86a650df_d42790ca PS1, Line 562: ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc arc riscv)) Is this really what you want? Note the `ifneq`, it means the programmers below would be enabled for riscv.