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I'd like you to reexamine a change. Please visit
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Change subject: libflashrom,writeprotect: add flashrom_wp_get_available_ranges()
......................................................................
libflashrom,writeprotect: add flashrom_wp_get_available_ranges()
Generate list of available ranges by enumerating all possible values
that range bits (BPx, TB, ...) can take and using the chip's range
decoding function to get the range that is selected by each one.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-list
BRANCH=none
Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M libflashrom.c
M libflashrom.h
M writeprotect.c
M writeprotect.h
4 files changed, 268 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/58481/34
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#30).
Change subject: libflashrom,writeprotect: add functions for reading/writing WP configs
......................................................................
libflashrom,writeprotect: add functions for reading/writing WP configs
New functions are exposed through the libflashrom API for
reading/writing chip WP configuartion: `flashrom_wp_{read,write}_cfg()`.
The input/output of these functions is a an opaque `struct
flashrom_wp_cfg` instance, which includes the flash protection range and
status register protection mode.
This commit also adds `{read,write}_wp_bits()` helper functions that
read/write chip-specific WP configuration bits.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M libflashrom.c
M libflashrom.h
M writeprotect.c
M writeprotect.h
4 files changed, 352 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/79/58479/30
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#28).
Change subject: flash.h,flashchips.c: add writeprotect bit layout map to chips
......................................................................
flash.h,flashchips.c: add writeprotect bit layout map to chips
This patch adds a register bit map `struct reg_bit_info`, with fields
for storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M writeprotect.h
3 files changed, 73 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/28
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Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58477 )
Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
Patch Set 27:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58477/comment/28aed946_6e1b439c
PS20, Line 6353: .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
: .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
> On the other hand, we can't edit wiki before patch is merged: that would make wiki refer to somethin […]
Just a first draft of what we should say, happy to revise:
(add as another bullet on the list of chip fields):
`.reg_bits` contains information about the configuration bits in the chip's registers and is required to support write protection operations on the chip.
For example, `.cmp = {STATUS2, 6, RW}` indicates that the complement bit (CMP) is the 6th bit of the chip's 2nd status register and that it is writable. If multiple bits are used to define a single value, they are written as an array with the least-significant bit first, e.g. `.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}}`.
See `struct reg_bit_info` in flash.h for details on what each of the configuration bits does.
Note that some datasheets use inconsistent names for configuration bits. In particular, bits that act like TB/SEC/CMP are sometimes called BP3/BP4/etc. Bits should be named according their functions and a note should be added if they differ from the datasheet, e.g.
```
.sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
```
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58736 )
Change subject: ichspi: Extract handling programmer param into a function
......................................................................
Patch Set 11:
(2 comments)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58736/comment/8869322f_4a90526f
PS11, Line 1762: {
There probably should be here a
`*ich_spi_mode = ich_auto;`
otherwise the function can return 0; and never actually have set `ich_spi_mode`.
https://review.coreboot.org/c/flashrom/+/58736/comment/ee2e61b0_9411eb41
PS11, Line 1796: = ich_auto;
the above comment would avoid the need to initialise here.
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Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58474 )
Change subject: writeprotect, cli_classic: delete old writeprotect code
......................................................................
Patch Set 15:
(1 comment)
File cli_classic.c:
https://review.coreboot.org/c/flashrom/+/58474/comment/85e1352f_2dbebc98
PS15, Line 785: get_region_range
> get_region_range() also looks like part of the original wp effort and would […]
Maybe we should make it a libflashrom function? Being able to get the start/length of a region seems useful enough to make it part of the API.
It does get used again when the new CLI code is added.
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Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
Patch Set 27: Code-Review+2
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58477/comment/0b45960d_617e51d8
PS20, Line 6353: .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
: .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
> Nikolai, I can edit wiki, let's coordinate this!
On the other hand, we can't edit wiki before patch is merged: that would make wiki refer to something which, technically, does not exist yet? So maybe merge this first, and then wiki update? What do people think?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58474 )
Change subject: writeprotect, cli_classic: delete old writeprotect code
......................................................................
Patch Set 15:
(1 comment)
File cli_classic.c:
https://review.coreboot.org/c/flashrom/+/58474/comment/927ca91d_b8c249ef
PS15, Line 785: get_region_range
get_region_range() also looks like part of the original wp effort and would
be left dead. Drop it too?
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