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Change subject: Add Elkhart Lake support
......................................................................
Patch Set 4: Code-Review+2
(1 comment)
Patchset:
PS4:
> I hope I did the rebasing properly...
Looks perfect, thanks!
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Change subject: Add Elkhart Lake support
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
I hope I did the rebasing properly...
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Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/60711
to look at the new patch set (#4).
Change subject: Add Elkhart Lake support
......................................................................
Add Elkhart Lake support
Elkhart Lake has a chipset called Mule Creek Canyon which is quite
compatible with 300 series chipsets. There are a few differences though,
e.g. different encoding for the SPI clock values for read and write in
the FLCOMP register. In addition Elkhart Lake has a new PCI device ID
for the SPI controller which is added, too.
TEST=Read and flash complete flash on Siemens MC EHL1
Change-Id: I711e39a3ec9cd7098389231eaa1cb864d615a475
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M chipset_enable.c
M ich_descriptors.c
M ichspi.c
M programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
5 files changed, 47 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/11/60711/4
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Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60711 )
Change subject: Add Elkhart Lake support
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> Meh... […]
So I have to rebase, or?
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Change subject: Add Elkhart Lake support
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
Meh... I merged something conflicting in the meantime :-/
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Change subject: Add Elkhart Lake support
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/60711/comment/e9135542_e098691d
PS1, Line 1033: return CHIPSET_500_SERIES_TIGER_POINT;
> Turned out the SPI programming guide is wrong and will be updated. […]
I remember having tested this as well with your descriptor and tried to
reason about the fields... don't remember if I still wanted to do some-
thing ;) maybe we should add CSSO to be sure in the future. Let's see how
this fares.
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