Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83753?usp=email )
Change subject: doc: Convert the doc for MSI JSPI1
......................................................................
doc: Convert the doc for MSI JSPI1
The doc converted from
https://wiki.flashrom.org/MSI_JSPI1
Change-Id: Idd215a3a3a4d62629803a71d360755c43c1ab599
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
---
M doc/user_docs/index.rst
A doc/user_docs/msi_jspi1.rst
2 files changed, 51 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/53/83753/1
diff --git a/doc/user_docs/index.rst b/doc/user_docs/index.rst
index b61567a..6756d9e 100644
--- a/doc/user_docs/index.rst
+++ b/doc/user_docs/index.rst
@@ -9,3 +9,4 @@
chromebooks
management_engine
misc_intel
+ msi_jspi1
diff --git a/doc/user_docs/msi_jspi1.rst b/doc/user_docs/msi_jspi1.rst
new file mode 100644
index 0000000..dc20866
--- /dev/null
+++ b/doc/user_docs/msi_jspi1.rst
@@ -0,0 +1,50 @@
+=========
+MSI JSPI1
+=========
+
+JSPI1 is a 5x2 or 6x2 2.0mm pitch pin header on many MSI motherboards.
+It is used to recover from bad boot ROM images. Specifically,
+it appears to be used to connect an alternate ROM with a working image.
+Pull the #HOLD line low to deselect the onboard SPI ROM, allowing another
+SPI ROM to take its place on the bus. Pull the #WP line high to disable write-protection.
+Some boards use 1.8V flash chips, while others use 3.3V flash chips;
+Check the flash chip datasheet to determine the correct value.
+
+**JSPI1 (5x2)**
+
+======== ======== ======== ====
+name pin pin name
+======== ======== ======== ====
+VCC 1 2 VCC
+MISO 3 4 MOSI
+#SS 5 6 SCLK
+GND 7 8 GND
+#HOLD 9 10 NC
+======== ======== ======== ====
+
+**JSPI1 (6x2)**
+
+======== ======== ======== ============
+name pin pin name
+======== ======== ======== ============
+VCC 1 2 VCC
+SO 3 4 SI
+#SS 5 6 CLK
+GND 7 8 GND
+NC 9 10 NC (no pin)
+#WP 11 12 #HOLD
+======== ======== ======== ============
+
+======== =====================================
+name function
+======== =====================================
+VCC Voltage (See flash chip datasheet)
+MISO SPI Master In/Slave Out
+MOSI SPI Master Out/Slave In
+#SS SPI Slave (Chip) Select (active low)
+SCLK SPI Clock
+GND ground/common
+#HOLD SPI hold (active low)
+#WP SPI write-protect (active low)
+NC Not Connected (or no pin)
+======== =====================================
--
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Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83751?usp=email )
Change subject: doc: Add manpage item for nicintel_spi
......................................................................
doc: Add manpage item for nicintel_spi
The existing page on old wiki is very small and fits into
a manpage item:
https://wiki.flashrom.org/NICIntel
Change-Id: I139065611c68c0fa0a675fe49a6f8bc20e9057f7
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
---
M doc/classic_cli_manpage.rst
1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/51/83751/1
diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst
index d8380c7..36dd125 100644
--- a/doc/classic_cli_manpage.rst
+++ b/doc/classic_cli_manpage.rst
@@ -664,6 +664,11 @@
Please note that the small number of address lines connected to the chip may make accessing large chips impossible.
The maximum supported chip size is 128KB.
+nicintel_spi programmer
+^^^^^^^^^^^^^^^^^^^^^^^
+
+Programmer for SPI flash ROMs on Intel Gigabit network cards. Tested on 32-bit hardware/PCI only.
+
nicintel_eeprom programmer
^^^^^^^^^^^^^^^^^^^^^^^^^^
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David Reguera Garcia (Dreg) has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/83471?usp=email )
Change subject: doc: Add doc for buspirate programmer
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> David, I have added you to maintainers and you are now a member in "flashrom reviewers" group! Welco […]
Confirmed! I can vote +2
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David Reguera Garcia (Dreg) has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/83471?usp=email )
Change subject: doc: Add doc for buspirate programmer
......................................................................
Patch Set 2: Code-Review+2
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Anastasia Klimchuk has posted comments on this change by David Reguera Garcia (Dreg). ( https://review.coreboot.org/c/flashrom/+/83681?usp=email )
Change subject: MAINTAINERS: Add David Reguera for Bus Pirate
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
Welcome David! I have a comment for you here CB:83471
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Anastasia Klimchuk has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/83471?usp=email )
Change subject: doc: Add doc for buspirate programmer
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
David, I have added you to maintainers and you are now a member in "flashrom reviewers" group! Welcome! :)
With this, you can fully approve patches, which means voting +2.
I want to verify it works, could you please try approve this patch? Given that you already reviewed it earlier anyway.
Thank you!
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Khem Raj has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/43770 )
Change subject: Makefile: Check for last line only from preprocessed output
......................................................................
Makefile: Check for last line only from preprocessed output
This started to fail with glibc 2.32 since glibc added additional
attributes to functions in signal.h therefore existing regexp started to
fail as it is not able to handle these functions e.g.
extern int siginterrupt (int __sig, int __interrupt) __attribute__ ((__nothrow__ , __leaf__))
__attribute__ ((__deprecated__ ("Use sigaction with SA_RESTART instead")));
grep -v '^\#' | grep '"' | cut -f 2 -d'"'
bit outside of fd_set selected
Use sigaction with SA_RESTART instead
arm
So changing it to
tail -1 | grep '"' | cut -f 2 -d'"'
arm
Produces the expected result, this was hidden until now
Signed-off-by: Khem Raj <raj.khem(a)gmail.com>
Change-Id: I123a046e142d54632f12d54e2aa09b0928c02b91
---
M Makefile
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/43770/1
diff --git a/Makefile b/Makefile
index 803529f..3795681 100644
--- a/Makefile
+++ b/Makefile
@@ -106,7 +106,7 @@
# IMPORTANT: The following line must be placed before TARGET_OS is ever used
# (of course), but should come after any lines setting CC because the line
# below uses CC itself.
-override TARGET_OS := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E os.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
+override TARGET_OS := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E os.h 2>/dev/null | tail -1 | grep '"' | cut -f 2 -d'"'))
ifeq ($(TARGET_OS), Darwin)
override CPPFLAGS += -I/opt/local/include -I/usr/local/include
@@ -460,8 +460,8 @@
# IMPORTANT: The following line must be placed before ARCH is ever used
# (of course), but should come after any lines setting CC because the line
# below uses CC itself.
-override ARCH := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E archtest.c 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
-override ENDIAN := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E endiantest.c 2>/dev/null | grep -v '^\#'))
+override ARCH := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E archtest.c 2>/dev/null | tail -1 | grep '"' | cut -f 2 -d'"'))
+override ENDIAN := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E endiantest.c 2>/dev/null | tail -1))
# Disable the internal programmer on unsupported architectures (everything but x86 and mipsel)
ifneq ($(ARCH)-little, $(filter $(ARCH),x86 mips)-$(ENDIAN))
--
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