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[S] Change in flashrom[main]: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register
by Kane Chen (Code Review) 19 Aug '24

19 Aug '24

Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Hsuan-ting Chen, Kane Chen, Peter Marheine, Subrata Banik. Kane Chen has posted comments on this change by Kane Chen. ( https://review.coreboot.org/c/flashrom/+/83896?usp=email ) Change subject: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register ...................................................................... Patch Set 6: (1 comment) File meson_options.txt: https://review.coreboot.org/c/flashrom/+/83896/comment/943f8586_edc3ad59?us… : PS3, Line 9: option('use_libpci_ecam', type : 'boolean', value : false) > Add something to doc/release_notes/devel. […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/83896?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Gerrit-Change-Number: 83896 Gerrit-PatchSet: 6 Gerrit-Owner: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Mon, 19 Aug 2024 01:29:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Comment-In-Reply-To: Peter Marheine <pmarheine(a)chromium.org>

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[S] Change in flashrom[main]: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register
by Kane Chen (Code Review) 19 Aug '24

19 Aug '24

Attention is currently required from: Hsuan Ting Chen, Hsuan-ting Chen, Kane Chen, Kane Chen, Subrata Banik. Hello Hsuan Ting Chen, Hsuan-ting Chen, Peter Marheine, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/83896?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register ...................................................................... chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register In the latest pciutils(v3.13.0), it supports accessing pci registers by ecam. This patch uses libpci version check to decide whether flashrom calls libpci and use 0xcf8/0xcfc or ecam to access pci registers. BUG=b:359813524 TEST=with libpci >= 3.13.0, flashrom is working with ECAM access Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Signed-off-by: Kane Chen <kane.chen(a)intel.com> --- M chipset_enable.c M doc/release_notes/devel.rst M meson.build 3 files changed, 22 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/96/83896/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/83896?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Gerrit-Change-Number: 83896 Gerrit-PatchSet: 6 Gerrit-Owner: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com>

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[XS] Change in flashrom[main]: doc: Remove leftover reference to building_with_make
by Peter Marheine (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Anastasia Klimchuk. Peter Marheine has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/83942?usp=email ) Change subject: doc: Remove leftover reference to building_with_make ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/83942?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If6d3580972ea7d42503004b922b90829025bd62d Gerrit-Change-Number: 83942 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Sun, 18 Aug 2024 23:52:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in flashrom[main]: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register
by Peter Marheine (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Hsuan Ting Chen, Hsuan-ting Chen, Kane Chen, Kane Chen, Subrata Banik. Peter Marheine has posted comments on this change by Kane Chen. ( https://review.coreboot.org/c/flashrom/+/83896?usp=email ) Change subject: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register ...................................................................... Patch Set 5: (1 comment) File meson_options.txt: https://review.coreboot.org/c/flashrom/+/83896/comment/b722c300_fa9212e0?us… : PS3, Line 9: option('use_libpci_ecam', type : 'boolean', value : false) > Thanks for the feedback. […] Add something to doc/release_notes/devel.rst -- To view, visit https://review.coreboot.org/c/flashrom/+/83896?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Gerrit-Change-Number: 83896 Gerrit-PatchSet: 5 Gerrit-Owner: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Comment-Date: Sun, 18 Aug 2024 23:51:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Comment-In-Reply-To: Peter Marheine <pmarheine(a)chromium.org>

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[L] Change in flashrom[main]: tree: Remove print_wiki.c
by Peter Marheine (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Alexander Goncharov, Anastasia Klimchuk. Peter Marheine has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/83941?usp=email ) Change subject: tree: Remove print_wiki.c ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/83941?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I9990add27f7fdddc23ddd1f33306566ce7548417 Gerrit-Change-Number: 83941 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Sun, 18 Aug 2024 23:50:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in flashrom[main]: flashchips: Update test status for Fuldan FM25Q08 and FM25Q128
by Samantaz Fox (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer. Samantaz Fox has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83970?usp=email ) Change subject: flashchips: Update test status for Fuldan FM25Q08 and FM25Q128 ...................................................................... flashchips: Update test status for Fuldan FM25Q08 and FM25Q128 Both of these chips were tested in-circuit with an SOIC-8 clamp and two different BusPirate boards: the BPv3.6 from Adafruit (sku 237) and the BPv3.6a from Sparkfun (sku TOL-12942), on a Fedora 38 host, using flashrom 9a570318 (changes rebased since then). Change-Id: Ib3c94f03a132a912bb4bb9d36e8783f4468587c4 Signed-off-by: Samantaz Fox <coding(a)samantaz.fr> --- M flashchips.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/83970/1 diff --git a/flashchips.c b/flashchips.c index baf9f8e..6bd2397 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6240,7 +6240,7 @@ /* OTP: 1024B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* QPI enable 0x38, disable 0xFF */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, - .tested = TEST_UNTESTED, + .tested = { .probe = NT, .read = OK, .erase = OK, .write = OK }, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = { @@ -6403,7 +6403,7 @@ /* supports SFDP */ /* QPI enable 0x38, disable 0xFF */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, - .tested = TEST_UNTESTED, + .tested = { .probe = NT, .read = OK, .erase = NT, .write = NT }, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = { -- To view, visit https://review.coreboot.org/c/flashrom/+/83970?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ib3c94f03a132a912bb4bb9d36e8783f4468587c4 Gerrit-Change-Number: 83970 Gerrit-PatchSet: 1 Gerrit-Owner: Samantaz Fox <coding(a)samantaz.fr> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com>

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[M] Change in flashrom[main]: flashchips: Add definitions for Fuldan FM25Q04, FM25Q64 and FM25Q128
by Samantaz Fox (Code Review) 18 Aug '24

18 Aug '24

Samantaz Fox has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83969?usp=email ) Change subject: flashchips: Add definitions for Fuldan FM25Q04, FM25Q64 and FM25Q128 ...................................................................... flashchips: Add definitions for Fuldan FM25Q04, FM25Q64 and FM25Q128 These chips have the exact same characteristics as their 8/16/32 counterparts, except for the different flash size. Testing status will be updated in a subsequent commit. Change-Id: I88fcc2bbb9706c8adb3722da6aa0e1d2d04c3fde Signed-off-by: Samantaz Fox <coding(a)samantaz.fr> --- M flashchips.c M include/flashchips.h 2 files changed, 135 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/69/83969/1 diff --git a/flashchips.c b/flashchips.c index e6b4761..baf9f8e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6186,6 +6186,50 @@ { .vendor = "Fudan", + .name = "FM25Q04", + .bustype = BUS_SPI, + .manufacture_id = FUDAN_ID_NOPREFIX, + .model_id = FUDAN_FM25Q04, + .total_size = 512, + .page_size = 256, + /* supports SFDP */ + /* QPI enable 0x38, disable 0xFF */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + /* 128 * 4KB sectors */ + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + /* 16 * 32KB blocks */ + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + /* 8 * 64KB blocks */ + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + /* Full chip erase (0x60) */ + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + /* Full chip erase (0xC7) */ + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + }, + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Fudan", .name = "FM25Q08", .bustype = BUS_SPI, .manufacture_id = FUDAN_ID_NOPREFIX, @@ -6305,6 +6349,94 @@ }, { + .vendor = "Fudan", + .name = "FM25Q64", + .bustype = BUS_SPI, + .manufacture_id = FUDAN_ID_NOPREFIX, + .model_id = FUDAN_FM25Q64, + .total_size = 8192, + .page_size = 256, + /* supports SFDP */ + /* QPI enable 0x38, disable 0xFF */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + /* 2048 * 4KB sectors */ + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + /* 256 * 32KB blocks */ + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + /* 128 * 64KB blocks */ + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + /* Full chip erase (0x60) */ + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + /* Full chip erase (0xC7) */ + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + }, + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL, /* bit6 selects size of protected blocks; TODO: SR2 */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Fudan", + .name = "FM25Q128", + .bustype = BUS_SPI, + .manufacture_id = FUDAN_ID_NOPREFIX, + .model_id = FUDAN_FM25Q128, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* QPI enable 0x38, disable 0xFF */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + /* 4096 * 4KB sectors */ + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + /* 512 * 32KB blocks */ + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + /* 256 * 64KB blocks */ + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + /* Full chip erase (0x60) */ + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + /* Full chip erase (0xC7) */ + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + }, + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL, /* bit6 selects size of protected blocks; TODO: SR2 */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "Fujitsu", .name = "MBM29F004BC", .bustype = BUS_PARALLEL, diff --git a/include/flashchips.h b/include/flashchips.h index d5c0027..3dbffeb 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -344,9 +344,12 @@ #define FUDAN_FM25F01 0x3111 #define FUDAN_FM25F02 0x3112 /* Same as FM25F02A */ #define FUDAN_FM25F04 0x3113 /* Same as FM25F04A */ +#define FUDAN_FM25Q04 0x4013 #define FUDAN_FM25Q08 0x4014 #define FUDAN_FM25Q16 0x4015 #define FUDAN_FM25Q32 0x4016 +#define FUDAN_FM25Q64 0x4017 +#define FUDAN_FM25Q128 0x4018 #define FUJITSU_ID 0x04 /* Fujitsu */ #define FUJITSU_MBM29DL400BC 0x0F -- To view, visit https://review.coreboot.org/c/flashrom/+/83969?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I88fcc2bbb9706c8adb3722da6aa0e1d2d04c3fde Gerrit-Change-Number: 83969 Gerrit-PatchSet: 1 Gerrit-Owner: Samantaz Fox <coding(a)samantaz.fr>

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[XS] Change in flashrom[main]: flashchips: add GD25B128E and GD25R128E
by Victor Lim (Code Review) 18 Aug '24

18 Aug '24

Victor Lim has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/83967?usp=email ) Change subject: flashchips: add GD25B128E and GD25R128E ...................................................................... flashchips: add GD25B128E and GD25R128E GD25B128E: 3V 128Mbit shipped with QE = 1 https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-0… GD25R128E: GD25Q128E with RPMC feature. GD25Q128E and GD25R128E share the same datasheet on the flash side. https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240729/DS-0… Tested on ch347 both models with read write erase and protection. Change-Id: I14e3c44ebbcc65640042a7719401615b5aa66cc2 Signed-off-by: Victor Lim <vlim(a)gigadevice.com> --- M flashchips.c M include/flashchips.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/67/83967/1 diff --git a/flashchips.c b/flashchips.c index 5b8069c..2dede76 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7273,7 +7273,7 @@ { .vendor = "GigaDevice", - .name = "GD25Q127C/GD25Q128E", + .name = "GD25Q128E/GD25B128E/GD25R128E/GD25Q127C", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q128, diff --git a/include/flashchips.h b/include/flashchips.h index 20f799e..4e1abc4 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -391,7 +391,7 @@ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ -#define GIGADEVICE_GD25Q128 0x4018 /* Same as GD25Q128B, GD25Q127C, GD25Q128C, and GD25Q128E, can be distinguished by SFDP */ +#define GIGADEVICE_GD25Q128 0x4018 /* Same as GD25Q128B, GD25Q127C, GD25Q128C,and GD25Q128E, GD25B128E, GD25R128E can be distinguished by SFDP */ #define GIGADEVICE_GD25Q256D 0x4019 #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ -- To view, visit https://review.coreboot.org/c/flashrom/+/83967?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I14e3c44ebbcc65640042a7719401615b5aa66cc2 Gerrit-Change-Number: 83967 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com>

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[M] Change in flashrom[main]: flashchips: add GD25LF512MF model
by Victor Lim (Code Review) 17 Aug '24

17 Aug '24

Attention is currently required from: Nikolai Artemiev, Stefan Reinauer. Victor Lim has posted comments on this change by Victor Lim. ( https://review.coreboot.org/c/flashrom/+/83912?usp=email ) Change subject: flashchips: add GD25LF512MF model ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/83912/comment/b88d1788_b995f062?us… : PS1, Line 10: I will have to send you the datasheet through email. > I got the datasheet thank you! I did the review, all good. […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/83912?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3d202f5afcc9c33a4040f8186dc6fef1878ba79a Gerrit-Change-Number: 83912 Gerrit-PatchSet: 2 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Sat, 17 Aug 2024 17:08:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[M] Change in flashrom[main]: flashchips: add GD25LF512MF model
by Victor Lim (Code Review) 17 Aug '24

17 Aug '24

Attention is currently required from: Nikolai Artemiev, Stefan Reinauer, Victor Lim. Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/83912?usp=email to look at the new patch set (#2). Change subject: flashchips: add GD25LF512MF model ...................................................................... flashchips: add GD25LF512MF model GD25LF512MF: 1.8V 512Mbit high performance, quad IO enabled. Tested on ch347 with erase, write, read, and protection Change-Id: I3d202f5afcc9c33a4040f8186dc6fef1878ba79a Signed-off-by: Victor Lim <vlim(a)gigadevice.com> --- M flashchips.c M include/flashchips.h 2 files changed, 57 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/12/83912/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/83912?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3d202f5afcc9c33a4040f8186dc6fef1878ba79a Gerrit-Change-Number: 83912 Gerrit-PatchSet: 2 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Victor Lim <vlim(a)gigadevice.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com>

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