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Change in flashrom[staging]: 4BA: Flashrom integration for the 4-bytes addressing extensions
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/20505 ) Change subject: 4BA: Flashrom integration for the 4-bytes addressing extensions ...................................................................... 4BA: Flashrom integration for the 4-bytes addressing extensions This patch integrates code of the previous patch into Flashrom's code. All the integrations is around 3 functions spi_nbyte_read, spi_nbyte_program and spi_byte_program. After this patch then are not static and can be called by their pointers saved in flashchips array. Also I added to flashrom.c some code to switch a chip to 4-bytes addressing mode. And one error message is corrected in spi.c because it's not suitable for 32-bit addresses. Patched files ------------- flash.h + added set of 4-bytes address functions to flashchip structure definition flashrom.c + added switch to 4-bytes addressing more for chips which support it serprog.c + added 4-bytes addressing spi_nbyte_read call to serprog_spi_read spi.c + fixed flash chip size check in spi_chip_read spi25.c + added 4-bytes addressing spi_nbyte_read call to spi_read_chunked + added 4-bytes addressing spi_nbyte_program call to spi_write_chunked + added 4-bytes addressing spi_byte_program call to spi_chip_write_1 Conflicts: serprog.c Change-Id: Ib051cfc93bd4aa7580519e0e6206d025f3ca8049 Signed-off-by: Boris Baykov <dev(a)borisbaykov.com>, Russia, Jan 2014 [clg: ported from https://www.flashrom.org/pipermail/flashrom/2015-January/013205.html ] Signed-off-by: Cédric Le Goater <clg(a)kaod.org> Reviewed-on: https://review.coreboot.org/20505 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M flash.h M flashrom.c M spi.c M spi25.c 4 files changed, 47 insertions(+), 4 deletions(-) Approvals: Nico Huber: Looks good to me, approved build bot (Jenkins): Verified diff --git a/flash.h b/flash.h index 56c0b4f..2219918 100644 --- a/flash.h +++ b/flash.h @@ -167,6 +167,14 @@ unsigned int page_size; int feature_bits; + /* set of function pointers to use in 4-bytes addressing mode */ + struct four_bytes_addr_funcs_set { + int (*enter_4ba) (struct flashctx *flash); + int (*read_nbyte) (struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); + int (*program_byte) (struct flashctx *flash, unsigned int addr, const uint8_t databyte); + int (*program_nbyte) (struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); + } four_bytes_addr_funcs; + /* Indicate how well flashrom supports different operations of this flash chip. */ struct tested { enum test_state probe; diff --git a/flashrom.c b/flashrom.c index c600efc..8e22434 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2223,6 +2223,29 @@ if (flash->chip->unlock) flash->chip->unlock(flash); + /* Switching to 4-Bytes Addressing mode if flash chip supports it */ + if(flash->chip->feature_bits & FEATURE_4BA_SUPPORT) { + /* Do not switch if chip is already in 4-bytes addressing mode */ + if (flash->chip->feature_bits & FEATURE_4BA_ONLY) { + msg_cdbg("Flash chip is already in 4-bytes addressing mode.\n"); + } + /* Go to 4-Bytes Addressing mode */ + else { + if (!flash->chip->four_bytes_addr_funcs.enter_4ba) { + msg_cerr("No function for Enter 4-bytes addressing mode for this flash chip.\n" + "Please report to flashrom(a)flashrom.org\n"); + return 1; + } + + if(flash->chip->four_bytes_addr_funcs.enter_4ba(flash)) { + msg_cerr("Switching to 4-bytes addressing mode failed!\n"); + return 1; + } + + msg_cdbg("Switched to 4-bytes addressing mode.\n"); + } + } + return 0; } diff --git a/spi.c b/spi.c index 894f73f..0a4a618 100644 --- a/spi.c +++ b/spi.c @@ -110,7 +110,10 @@ * means 0xffffff, the highest unsigned 24bit number. */ addrbase = spi_get_valid_read_addr(flash); - if (addrbase + flash->chip->total_size * 1024 > (1 << 24)) { + /* Show flash chip size warning if flash chip doesn't support + 4-Bytes Addressing mode and last address excedes 24 bits */ + if (!(flash->chip->feature_bits & FEATURE_4BA_SUPPORT) && + addrbase + flash->chip->total_size * 1024 > (1 << 24)) { msg_perr("Flash chip size exceeds the allowed access window. "); msg_perr("Read will probably fail.\n"); /* Try to get the best alignment subject to constraints. */ diff --git a/spi25.c b/spi25.c index 76242be..30b862f 100644 --- a/spi25.c +++ b/spi25.c @@ -28,6 +28,7 @@ #include "chipdrivers.h" #include "programmer.h" #include "spi.h" +#include "spi4ba.h" static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes) { @@ -967,7 +968,10 @@ lenhere = min(start + len, (i + 1) * area_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { toread = min(chunksize, lenhere - j); - rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); + rc = (flash->chip->feature_bits & FEATURE_4BA_SUPPORT) == 0 + ? spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread) + : flash->chip->four_bytes_addr_funcs.read_nbyte(flash, starthere + j, + buf + starthere - start + j, toread); if (rc) break; } @@ -1012,7 +1016,10 @@ lenhere = min(start + len, (i + 1) * page_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { towrite = min(chunksize, lenhere - j); - rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); + rc = (flash->chip->feature_bits & FEATURE_4BA_SUPPORT) == 0 + ? spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite) + : flash->chip->four_bytes_addr_funcs.program_nbyte(flash, starthere + j, + buf + starthere - start + j, towrite); if (rc) break; while (spi_read_status_register(flash) & SPI_SR_WIP) @@ -1038,7 +1045,9 @@ int result = 0; for (i = start; i < start + len; i++) { - result = spi_byte_program(flash, i, buf[i - start]); + result = (flash->chip->feature_bits & FEATURE_4BA_SUPPORT) == 0 + ? spi_byte_program(flash, i, buf[i - start]) + : flash->chip->four_bytes_addr_funcs.program_byte(flash, i, buf[i - start]); if (result) return 1; while (spi_read_status_register(flash) & SPI_SR_WIP) -- To view, visit https://review.coreboot.org/20505 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: merged Gerrit-Change-Id: Ib051cfc93bd4aa7580519e0e6206d025f3ca8049 Gerrit-Change-Number: 20505 Gerrit-PatchSet: 5 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[staging]: spi4ba: Drop now obsolete redundant functions
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22023 ) Change subject: spi4ba: Drop now obsolete redundant functions ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/702/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/779/ : SUCCESS -- To view, visit https://review.coreboot.org/22023 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I1d04448fd1acbfc37b8e17288f497a4292dfd6d6 Gerrit-Change-Number: 22023 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:24:14 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Merge remainder of spi4ba in
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22024 ) Change subject: spi25: Merge remainder of spi4ba in ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/703/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/780/ : SUCCESS -- To view, visit https://review.coreboot.org/22024 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: If581e24347e45cbb27002ea99ffd70e334c110cf Gerrit-Change-Number: 22024 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:24:12 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Enable direct 4BA read and write using feature bits
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22021 ) Change subject: spi25: Enable direct 4BA read and write using feature bits ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/701/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/778/ : SUCCESS -- To view, visit https://review.coreboot.org/22021 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I2f6817ca198bf923671a7aa67e956e5477d71848 Gerrit-Change-Number: 22021 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:24:05 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Remove now obsolete `four_bytes_addr_funcs` path
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22022 ) Change subject: spi25: Remove now obsolete `four_bytes_addr_funcs` path ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/700/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/777/ : SUCCESS -- To view, visit https://review.coreboot.org/22022 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Idb7c576cb159630da2268813388b497cb5f46b43 Gerrit-Change-Number: 22022 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:24:00 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Add native 4BA support
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22020 ) Change subject: spi25: Add native 4BA support ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/698/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/776/ : SUCCESS -- To view, visit https://review.coreboot.org/22020 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1 Gerrit-Change-Number: 22020 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:53 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Introduce spi_simple_write_cmd()
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22018 ) Change subject: spi25: Introduce spi_simple_write_cmd() ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/699/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/775/ : SUCCESS -- To view, visit https://review.coreboot.org/22018 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Ib244356fa471e15863b52e6037899d19113cb4a9 Gerrit-Change-Number: 22018 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:49 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Use common code for nbyte read/write and erase
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22019 ) Change subject: spi25: Use common code for nbyte read/write and erase ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/697/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/774/ : SUCCESS -- To view, visit https://review.coreboot.org/22019 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Ibc1ae48acbfbd427a30bcd64bdc080dc3dc20503 Gerrit-Change-Number: 22019 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:43 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25_statusreg: Return defined value on failed RDSR
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22017 ) Change subject: spi25_statusreg: Return defined value on failed RDSR ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/696/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/773/ : SUCCESS -- To view, visit https://review.coreboot.org/22017 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I714b20001a5443bba665c2e0061ca14069777581 Gerrit-Change-Number: 22017 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:38 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Merge remainder of spi4ba in
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22024 Change subject: spi25: Merge remainder of spi4ba in ...................................................................... spi25: Merge remainder of spi4ba in Change-Id: If581e24347e45cbb27002ea99ffd70e334c110cf Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile M chipdrivers.h M flashchips.c M spi.h M spi25.c D spi4ba.c D spi4ba.h 7 files changed, 122 insertions(+), 454 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/24/22024/1 diff --git a/Makefile b/Makefile index 5573127..9184bb3 100644 --- a/Makefile +++ b/Makefile @@ -514,7 +514,7 @@ CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ sst28sf040.o 82802ab.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ - spi4ba.o opaque.o sfdp.o en29lv640b.o at45db.o + opaque.o sfdp.o en29lv640b.o at45db.o ############################################################################### # Library code. diff --git a/chipdrivers.h b/chipdrivers.h index 12fc5a3..d7a4aa9 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -43,8 +43,10 @@ int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -53,11 +55,17 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); +int spi_enter_4ba_b7(struct flashctx *flash); +int spi_enter_4ba_b7_we(struct flashctx *flash); +int spi_exit_4ba_e9(struct flashctx *flash); +int spi_exit_4ba_e9_we(struct flashctx *flash); + /* spi25_statusreg.c */ uint8_t spi_read_status_register(struct flashctx *flash); @@ -192,29 +200,5 @@ /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); int write_en29lv640b(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); - -/* spi4ba.c */ -int spi_enter_4ba_b7(struct flashctx *flash); -int spi_enter_4ba_b7_we(struct flashctx *flash); -int spi_exit_4ba_e9(struct flashctx *flash); -int spi_exit_4ba_e9_we(struct flashctx *flash); -int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_byte_program_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_direct(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); #endif /* !__CHIPDRIVERS_H__ */ diff --git a/flashchips.c b/flashchips.c index a7fdf1c..5c100b5 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9759,10 +9759,10 @@ .block_erasers = { { .eraseblocks = { {4 * 1024, 8192} }, - .block_erase = spi_block_erase_21_4ba_direct, + .block_erase = spi_block_erase_21, }, { .eraseblocks = { {64 * 1024, 512} }, - .block_erase = spi_block_erase_dc_4ba_direct, + .block_erase = spi_block_erase_dc, }, { .eraseblocks = { {32768 * 1024, 1} }, .block_erase = spi_block_erase_c7, @@ -9792,10 +9792,10 @@ .block_erasers = { { .eraseblocks = { {4 * 1024, 16384} }, - .block_erase = spi_block_erase_21_4ba_direct, + .block_erase = spi_block_erase_21, }, { .eraseblocks = { {64 * 1024, 1024} }, - .block_erase = spi_block_erase_dc_4ba_direct, + .block_erase = spi_block_erase_dc, }, { .eraseblocks = { {65536 * 1024, 1} }, .block_erase = spi_block_erase_c7, diff --git a/spi.h b/spi.h index 41b0245..4da7b73 100644 --- a/spi.h +++ b/spi.h @@ -138,6 +138,18 @@ #define JEDEC_WRSR_OUTSIZE 0x02 #define JEDEC_WRSR_INSIZE 0x00 +/* Enter 4-byte Address Mode */ +#define JEDEC_ENTER_4_BYTE_ADDR_MODE 0xB7 + +/* Exit 4-byte Address Mode */ +#define JEDEC_EXIT_4_BYTE_ADDR_MODE 0xE9 + +/* Write Extended Address Register */ +#define JEDEC_WRITE_EXT_ADDR_REG 0xC5 + +/* Read Extended Address Register */ +#define JEDEC_READ_EXT_ADDR_REG 0xC8 + /* Read the memory */ #define JEDEC_READ 0x03 #define JEDEC_READ_OUTSIZE 0x04 @@ -154,6 +166,14 @@ #define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x03 #define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00 +/* Read the memory with 4-byte address + From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ +#define JEDEC_READ_4BA 0x13 + +/* Write memory byte with 4-byte address + From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ +#define JEDEC_BYTE_PROGRAM_4BA 0x12 + /* Error codes */ #define SPI_GENERIC_ERROR -1 #define SPI_INVALID_OPCODE -2 diff --git a/spi25.c b/spi25.c index 98b314d..8d9d54b 100644 --- a/spi25.c +++ b/spi25.c @@ -29,7 +29,6 @@ #include "chipdrivers.h" #include "programmer.h" #include "spi.h" -#include "spi4ba.h" static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes) { @@ -350,9 +349,31 @@ if (result) msg_cerr("%s failed during command execution\n", __func__); - const int status = spi_write_status(flash, poll_delay); + const int status = poll_delay ? spi_write_status(flash, poll_delay) : 0; return result ? result : status; +} + +static int spi_write_extended_address_register(struct flashctx *const flash, const uint8_t regdata) +{ + struct spi_command cmds[] = { + { + .writecnt = 1, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + }, { + .writecnt = 2, + .writearr = (const unsigned char[]){ + JEDEC_WRITE_EXT_ADDR_REG, + regdata + }, + }, + NULL_SPI_CMD, + }; + + const int result = spi_send_multicommand(flash, cmds); + if (result) + msg_cerr("%s failed during command execution\n", __func__); + return result; } static int spi_set_extended_address(struct flashctx *const flash, const uint8_t addr_high) @@ -539,6 +560,36 @@ return spi_chip_erase_c7(flash); } +/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) + JEDEC_SE_4BA (21h) instruction is new for 4-bytes addressing flash chips. + The presence of this instruction for an exact chip should be checked + by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ +int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + /* This usually takes 15-800ms, so wait in 10ms steps. */ + return spi_write_cmd(flash, 0x21, addr, NULL, 0, 10 * 1000); +} + +/* Erase 32 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) + JEDEC_BE_5C_4BA (5Ch) instruction is new for 4-bytes addressing flash chips. + The presence of this instruction for an exact chip should be checked + by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ +int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + /* This usually takes 100-4000ms, so wait in 100ms steps. */ + return spi_write_cmd(flash, 0x5c, addr, NULL, 0, 100 * 1000); +} + +/* Erase 64 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) + JEDEC_BE_DC_4BA (DCh) instruction is new for 4-bytes addressing flash chips. + The presence of this instruction for an exact chip should be checked + by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ +int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + /* This usually takes 100-4000ms, so wait in 100ms steps. */ + return spi_write_cmd(flash, 0xdc, addr, NULL, 0, 100 * 1000); +} + erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) { switch(opcode){ @@ -548,10 +599,14 @@ return NULL; case 0x20: return &spi_block_erase_20; + case 0x21: + return &spi_block_erase_21; case 0x50: return &spi_block_erase_50; case 0x52: return &spi_block_erase_52; + case 0x5c: + return &spi_block_erase_5c; case 0x60: return &spi_block_erase_60; case 0x62: @@ -568,6 +623,8 @@ return &spi_block_erase_d8; case 0xdb: return &spi_block_erase_db; + case 0xdc: + return &spi_block_erase_dc; default: msg_cinfo("%s: unknown erase opcode (0x%02x). Please report " "this at flashrom(a)flashrom.org\n", __func__, opcode); @@ -799,3 +856,33 @@ msg_cerr("%s failed to disable AAI mode.\n", __func__); return SPI_GENERIC_ERROR; } + +/* Enter 4-bytes addressing mode (without sending WREN before) */ +int spi_enter_4ba_b7(struct flashctx *flash) +{ + const unsigned char cmd = JEDEC_ENTER_4_BYTE_ADDR_MODE; + + /* Switch to 4-bytes addressing mode */ + return spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); +} + +/* Enter 4-bytes addressing mode with sending WREN before */ +int spi_enter_4ba_b7_we(struct flashctx *flash) +{ + return spi_simple_write_cmd(flash, JEDEC_ENTER_4_BYTE_ADDR_MODE, 0); +} + +/* Exit 4-bytes addressing mode (without sending WREN before) */ +int spi_exit_4ba_e9(struct flashctx *flash) +{ + const unsigned char cmd = JEDEC_EXIT_4_BYTE_ADDR_MODE; + + /* Switch to 3-bytes addressing mode */ + return spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); +} + +/* Exit 4-bytes addressing mode with sending WREN before */ +int spi_exit_4ba_e9_we(struct flashctx *flash) +{ + return spi_simple_write_cmd(flash, JEDEC_EXIT_4_BYTE_ADDR_MODE, 0); +} diff --git a/spi4ba.c b/spi4ba.c deleted file mode 100644 index d8ab6a8..0000000 --- a/spi4ba.c +++ /dev/null @@ -1,304 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2014 Boris Baykov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * SPI chip driver functions for 4-bytes addressing - */ - -#include <string.h> -#include "flash.h" -#include "chipdrivers.h" -#include "spi.h" -#include "programmer.h" -#include "spi4ba.h" - -/* #define MSG_TRACE_4BA_FUNCS 1 */ - -#ifdef MSG_TRACE_4BA_FUNCS -#define msg_trace(...) print(MSG_DEBUG, __VA_ARGS__) -#else -#define msg_trace(...) -#endif - -/* Enter 4-bytes addressing mode (without sending WREN before) */ -int spi_enter_4ba_b7(struct flashctx *flash) -{ - const unsigned char cmd[JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE] = { JEDEC_ENTER_4_BYTE_ADDR_MODE }; - - msg_trace("-> %s\n", __func__); - - /* Switch to 4-bytes addressing mode */ - return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); -} - -/* Enter 4-bytes addressing mode with sending WREN before */ -int spi_enter_4ba_b7_we(struct flashctx *flash) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_ENTER_4_BYTE_ADDR_MODE }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s\n", __func__); - - /* Switch to 4-bytes addressing mode */ - result = spi_send_multicommand(flash, cmds); - if (result) - msg_cerr("%s failed during command execution\n", __func__); - return result; -} - -/* Exit 4-bytes addressing mode (without sending WREN before) */ -int spi_exit_4ba_e9(struct flashctx *flash) -{ - const unsigned char cmd[JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE] = { JEDEC_EXIT_4_BYTE_ADDR_MODE }; - - msg_trace("-> %s\n", __func__); - - /* Switch to 3-bytes addressing mode */ - return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); -} - -/* Exit 4-bytes addressing mode with sending WREN before */ -int spi_exit_4ba_e9_we(struct flashctx *flash) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_EXIT_4_BYTE_ADDR_MODE }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s\n", __func__); - - /* Switch to 3-bytes addressing mode */ - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", __func__); - } - return result; -} - -/* Write Extended Address Register value */ -int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_WRITE_EXT_ADDR_REG_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_WRITE_EXT_ADDR_REG, - regdata - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (%02X)\n", __func__, regdata); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", __func__); - return result; - } - return 0; -} - -/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_SE_4BA (21h) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_SE_4BA_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_SE_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 15-800 ms, so wait in 10 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(10 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erase 32 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_BE_5C_4BA (5Ch) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_5C_4BA_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_5C_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erase 64 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_BE_DC_4BA (DCh) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_DC_4BA_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_DC_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} diff --git a/spi4ba.h b/spi4ba.h deleted file mode 100644 index a0316bc..0000000 --- a/spi4ba.h +++ /dev/null @@ -1,119 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2014 Boris Baykov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/* - * JEDEC flash chips instructions for 4-bytes addressing - * SPI chip driver functions for 4-bytes addressing - */ - -#ifndef __SPI_4BA_H__ -#define __SPI_4BA_H__ 1 - -/* Enter 4-byte Address Mode */ -#define JEDEC_ENTER_4_BYTE_ADDR_MODE 0xB7 -#define JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE 0x01 -#define JEDEC_ENTER_4_BYTE_ADDR_MODE_INSIZE 0x00 - -/* Exit 4-byte Address Mode */ -#define JEDEC_EXIT_4_BYTE_ADDR_MODE 0xE9 -#define JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE 0x01 -#define JEDEC_EXIT_4_BYTE_ADDR_MODE_INSIZE 0x00 - -/* Write Extended Address Register */ -#define JEDEC_WRITE_EXT_ADDR_REG 0xC5 -#define JEDEC_WRITE_EXT_ADDR_REG_OUTSIZE 0x02 -#define JEDEC_WRITE_EXT_ADDR_REG_INSIZE 0x00 - -/* Read Extended Address Register */ -#define JEDEC_READ_EXT_ADDR_REG 0xC8 -#define JEDEC_READ_EXT_ADDR_REG_OUTSIZE 0x01 -#define JEDEC_READ_EXT_ADDR_REG_INSIZE 0x01 - -/* Read the memory with 4-byte address - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_READ_4BA 0x13 -#define JEDEC_READ_4BA_OUTSIZE 0x05 -/* JEDEC_READ_4BA_INSIZE : any length */ - -/* Write memory byte with 4-byte address - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_BYTE_PROGRAM_4BA 0x12 -#define JEDEC_BYTE_PROGRAM_4BA_OUTSIZE 0x06 -#define JEDEC_BYTE_PROGRAM_4BA_INSIZE 0x00 - -/* Sector Erase 0x21 (with 4-byte address), usually 4k size. - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_SE_4BA 0x21 -#define JEDEC_SE_4BA_OUTSIZE 0x05 -#define JEDEC_SE_4BA_INSIZE 0x00 - -/* Block Erase 0x5C (with 4-byte address), usually 32k size. - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_BE_5C_4BA 0x5C -#define JEDEC_BE_5C_4BA_OUTSIZE 0x05 -#define JEDEC_BE_5C_4BA_INSIZE 0x00 - -/* Block Erase 0xDC (with 4-byte address), usually 64k size. - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_BE_DC_4BA 0xdc -#define JEDEC_BE_DC_4BA_OUTSIZE 0x05 -#define JEDEC_BE_DC_4BA_INSIZE 0x00 - -/* enter 4-bytes addressing mode */ -int spi_enter_4ba_b7(struct flashctx *flash); -int spi_enter_4ba_b7_we(struct flashctx *flash); - -/* exit 4-bytes addressing mode */ -int spi_exit_4ba_e9(struct flashctx *flash); -int spi_exit_4ba_e9_we(struct flashctx *flash); - -/* read/write flash bytes in 4-bytes addressing mode */ -int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); - -/* erase flash bytes in 4-bytes addressing mode */ -int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); - -/* read/write flash bytes from 3-bytes addressing mode using extended address register */ -int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); - -/* erase flash bytes from 3-bytes addressing mode using extended address register */ -int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); - -/* read/write flash bytes with 4-bytes address from any mode (3-byte or 4-byte) */ -int spi_byte_program_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_direct(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); - -/* erase flash bytes with 4-bytes address from any mode (3-byte or 4-byte) */ -int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); - -int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata); - -#endif /* __SPI_4BA_H__ */ -- To view, visit https://review.coreboot.org/22024 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: If581e24347e45cbb27002ea99ffd70e334c110cf Gerrit-Change-Number: 22024 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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