Hello Stefan Tauner, Youness Alaoui, Paul Menzel, Stefan Reinauer, David Hendricks, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/18925
to look at the new patch set (#6).
Change subject: chipset_enable: Add support for Intel Skylake / Kabylake
......................................................................
chipset_enable: Add support for Intel Skylake / Kabylake
All publicly known Skylake / Kabylake / Sunrise Point PCH variants
share the same register interface [1..6]. Although all SPI configu-
ration is now done through the SPI PCI device 1f.5, we can't probe
for it directly since its PCI vendor and device IDs are usually hid-
den.
To work around the hidden IDs, we use another PCI accessor that doesn't
rely on the OS seeing the PCI device.
This handles SPI flashes only. While booting from LPC is still sup-
ported, it seems nobody uses it any more.
Some additional PCI IDs were gathered from driveridentifier.com.
TEST=Compiled with B150 set to NT (instead of BAD) and checked for
sane register readings.
[1] 6th Generation Intel® Core(TM) Processor Families I/O Platform
Datasheet - Volume 1 of 2
Revision 002EN
Document Number 332995
[2] 6th Generation Intel® Processor I/O Datasheet for U/Y Platforms
Volume 2 of 2
Revision 001EN
Document Number 332996
[3] 7th Generation Intel® Processor Families I/O Platform
Datasheet - Volume 1 of 2
Revision 002
Document Number 334658
[4] 7th Generation Intel® Processor Families I/O for U/Y Platforms
Datasheet - Volume 2 of 2
Revision 002
Document Number 334659
[5] Intel® 100 Series and Intel® C230 Series Chipset Family Platform
Controller Hub (PCH)
Datasheet - Volume 1 of 2
Revision 004EN
Document Number 332690
[6] Intel® 100 Series Chipset Family Platform Controller Hub (PCH)
Datasheet - Volume 2 of 2
Revision 001EN
Document Number 332691
Change-Id: I000819aff25fbe9764f33df85f040093b82cd948
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M chipset_enable.c
M programmer.h
2 files changed, 111 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/18925/6
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Gerrit-Project: flashrom
Gerrit-Branch: staging
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I000819aff25fbe9764f33df85f040093b82cd948
Gerrit-Change-Number: 18925
Gerrit-PatchSet: 6
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at>
Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello Stefan Tauner, David Hendricks, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19044
to look at the new patch set (#4).
Change subject: ich_descriptors: Fix more odd +1s
......................................................................
ich_descriptors: Fix more odd +1s
+1 on everything doesn't make software greater per se.
v2: o Fix another +1.
o Amend style of similar (not +1 suffering) code, too.
Change-Id: Ifa5455c999e90ff9121aed29f542d71ac9ca2b1c
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M ich_descriptors.c
1 file changed, 7 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/44/19044/4
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Gerrit-Change-Id: Ifa5455c999e90ff9121aed29f542d71ac9ca2b1c
Gerrit-Change-Number: 19044
Gerrit-PatchSet: 4
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello Philippe Mathieu-Daudé, Youness Alaoui, David Hendricks, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19460
to look at the new patch set (#2).
Change subject: ichspi: Drop `dev` parameter from init functions
......................................................................
ichspi: Drop `dev` parameter from init functions
It's never used and has no clear contract (e.g. will the pointer stay
valid beyond the call?).
Change-Id: I0d4e7cc731364e86eff214b9022b842a577f9ef4
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M chipset_enable.c
M ichspi.c
M programmer.h
3 files changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/19460/2
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I0d4e7cc731364e86eff214b9022b842a577f9ef4
Gerrit-Change-Number: 19460
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com>
Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello Stefan Tauner, Paul Menzel, David Hendricks, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/18973
to look at the new patch set (#9).
Change subject: ich_descriptors: Update for Intel Skylake
......................................................................
ich_descriptors: Update for Intel Skylake
Interpretation of component clocks changed. Also more regions and more
masters are supported now. The number of regions (NR) is now static per
chipset (10 in the 100 Series case) and not coded into the descriptor
any more.
v2: o Use guess_ich_chipset() for read_ich_descriptors_from_dump().
o Update region extraction in `ich_descriptors_tool`.
TEST=Run `ich_descriptors_tool` over a 100 Series dump and checked
that output looks sane. Run `ich_descriptors_tool` over dumps
of five different older systems (1 x Sandy Bridge, 3 x Ivy Bridge,
1 x Haswell). Beside whitespace changes, regions not accounted
by `NR` are not printed any more.
Change-Id: Idd60a857d1ecffcb2e437af21134d9de44dcceb8
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M ich_descriptors.c
M ich_descriptors.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
3 files changed, 265 insertions(+), 163 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/18973/9
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Gerrit-Change-Id: Idd60a857d1ecffcb2e437af21134d9de44dcceb8
Gerrit-Change-Number: 18973
Gerrit-PatchSet: 9
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Nico Huber has posted comments on this change. ( https://review.coreboot.org/20224 )
Change subject: serial: Support custom baud rates on linux
......................................................................
Patch Set 4: Code-Review+2
I guess we should wait with submission until Stefan run this through
the build bot.
Also, you might want to mention the new behaviour in flashrom.8. OTOH,
the standard baud rates and rounding aren't mentioned either, so the
current documentation still applies ;)
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Gerrit-Change-Id: I2a20f9182cb85e7bce5d6654a2caf20e6202b195
Gerrit-Change-Number: 20224
Gerrit-PatchSet: 4
Gerrit-Owner: Urja Rannikko <urjaman(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Fri, 16 Jun 2017 12:13:40 +0000
Gerrit-HasComments: No
Urja Rannikko has posted comments on this change. ( https://review.coreboot.org/19993 )
Change subject: helpers: Add swap_byte() and swap_bytes()
......................................................................
Patch Set 1:
Looks relatively good, but I looked at the ch341a use of swap_byte(), and your use of swap_bytes in the j-link patch, so...
I think we could instead use a swapping_memcpy() (someone, suggest a better name?) that copies the bytes from buffer to buffer while swapping them and adapt both to use that.
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Gerrit-Change-Id: I9d2e1e2856c835d22eed3b3a34bc0379773dd831
Gerrit-Change-Number: 19993
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Schink <flashrom-dev(a)marcschink.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Urja Rannikko <urjaman(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Fri, 16 Jun 2017 11:50:31 +0000
Gerrit-HasComments: No
Hello Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/20224
to look at the new patch set (#4).
Change subject: serial: Support custom baud rates on linux
......................................................................
serial: Support custom baud rates on linux
The function to do this is contained in custom_baud.c because
of broken include stuff.
Change-Id: I2a20f9182cb85e7bce5d6654a2caf20e6202b195
Signed-off-by: Urja Rannikko <urjaman(a)gmail.com>
---
M Makefile
A custom_baud.c
A custom_baud.h
M serial.c
4 files changed, 136 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/24/20224/4
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Gerrit-Change-Id: I2a20f9182cb85e7bce5d6654a2caf20e6202b195
Gerrit-Change-Number: 20224
Gerrit-PatchSet: 4
Gerrit-Owner: Urja Rannikko <urjaman(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>