Hello Paul Menzel, David Hendricks, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22422
to look at the new patch set (#5).
Change subject: spi25: Revise decision when to enter/exit 4BA mode
......................................................................
spi25: Revise decision when to enter/exit 4BA mode
Instead of arbitrarily deciding whether to enter 4BA mode in the flash
chip's declaration, advertise that entering 4BA mode is supported and
only enter it if the SPI master supports 4-byte addresses. If not, exit
4BA mode (the chip might be in 4BA mode after reset). If we can't assure
the state of 4BA mode, we bail out to simplify the code (we'd have to
ensure that we don't run any instructions that can usually be switched
to 4BA mode otherwise).
Two new feature flags are introduced:
* FEATURE_4BA_ENTER:
Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN.
* FEATURE_4BA_ENTER_WREN
Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN.
FEATURE_4BA_SUPPORT is dropped, it's completely implicit now.
Also, draw the with/without WREN distinction into the enter/exit
functions to reduce code redundancy.
Change-Id: I877fe817f801fc54bd0ee2ce4e3ead324cbb3673
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M chipdrivers.h
M flash.h
M flashchips.c
M flashrom.c
M spi25.c
5 files changed, 36 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/22/22422/5
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I877fe817f801fc54bd0ee2ce4e3ead324cbb3673
Gerrit-Change-Number: 22422
Gerrit-PatchSet: 5
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello Paul Menzel, David Hendricks, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22421
to look at the new patch set (#6).
Change subject: spi_master: Introduce SPI_MASTER_4BA feature flag
......................................................................
spi_master: Introduce SPI_MASTER_4BA feature flag
Add a feature flag SPI_MASTER_4BA to `struct spi_master` that advertises
programmer-side support for 4-byte addresses in generic commands (and
read/write commands if the master uses the default implementations). Set
it for all masters that handle commands address-agnostic.
Don't prefer native 4BA instructions if the master doesn't support them.
Change-Id: Ife66e3fc49b9716f9c99cad957095b528135ec2c
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M bitbang_spi.c
M buspirate_spi.c
M ch341a_spi.c
M dummyflasher.c
M ft2232_spi.c
M linux_spi.c
M programmer.h
M serprog.c
M spi25.c
9 files changed, 31 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/22421/6
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ife66e3fc49b9716f9c99cad957095b528135ec2c
Gerrit-Change-Number: 22421
Gerrit-PatchSet: 6
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello Paul Menzel, David Hendricks, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22385
to look at the new patch set (#3).
Change subject: spi25: Enable native 4BA read and write using feature bits
......................................................................
spi25: Enable native 4BA read and write using feature bits
Prefer the native 4BA instruction when they are supported. In this
case, override our logic to decide to use a 4BA address.
Change-Id: I2f6817ca198bf923671a7aa67e956e5477d71848
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M flash.h
M flashchips.c
M spi25.c
3 files changed, 28 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/85/22385/3
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I2f6817ca198bf923671a7aa67e956e5477d71848
Gerrit-Change-Number: 22385
Gerrit-PatchSet: 3
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello David Hendricks, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22384
to look at the new patch set (#4).
Change subject: spi25: Integrate 4BA support
......................................................................
spi25: Integrate 4BA support
Allow 4-byte addresses for instructions usually used with 3-byte
addresses. Decide in which way the 4th byte will be communicated
based on the state of the chip (i.e. have we enabled 4BA mode)
and a new feature bit for an extended address register. If we
are not in 4BA mode and no extended address register is available
or the write to it fails, bail out.
We cache the state of 4BA mode and the extended address register
in the flashctx.
Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M flash.h
M flashrom.c
M spi25.c
M spi4ba.c
M spi4ba.h
5 files changed, 57 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/84/22384/4
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1
Gerrit-Change-Number: 22384
Gerrit-PatchSet: 4
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Nico Huber has posted comments on this change. ( https://review.coreboot.org/22421 )
Change subject: spi_master: Introduce SPI_MASTER_4BA feature flag
......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/#/c/22421/5/spi25.c
File spi25.c:
https://review.coreboot.org/#/c/22421/5/spi25.c@380
PS5, Line 380: "Please report a bug at flashrom(a)flashrom.org\n");
> How so? If you're referring to chip erase commands, those are handled using
I'm talking about the block erase commands. If the core read/erase/write
code tries a native 4BA erase and the master doesn't support it, we end
up here.
Maybe we should handle native 4BA erase commands differently. e.g. put
them in a separate list? or bail out earlier? Though, my last plan was
to ask the master anyway if an erase command is supported (e.g. 3BA
commands may not be as well in case of locked opcodes on Intel) instead
of going through all the preparations and trying.
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Ife66e3fc49b9716f9c99cad957095b528135ec2c
Gerrit-Change-Number: 22421
Gerrit-PatchSet: 5
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Tue, 12 Dec 2017 18:42:07 +0000
Gerrit-HasComments: Yes
Hello David Hendricks, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22384
to look at the new patch set (#3).
Change subject: spi25: Integrate 4BA support
......................................................................
spi25: Integrate 4BA support
Allow 4-byte addresses for instructions usually used with 3-byte
addresses. Decide in which way the 4th byte will be communicated
based on the state of the chip (i.e. have we enabled 4BA mode)
and a new feature bit for an extended address register. If we
are not in 4BA mode and no extended address register is available
or the write to it fails, bail out.
We cache the state of 4BA mode and the extended address register
in the flashctx.
Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M flash.h
M flashrom.c
M spi25.c
M spi4ba.c
M spi4ba.h
5 files changed, 57 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/84/22384/3
--
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To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1
Gerrit-Change-Number: 22384
Gerrit-PatchSet: 3
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>