- flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: linux_mtd: Initial import
by David Hendricks (Code Review) 04 May '18

04 May '18

David Hendricks has posted comments on this change. ( https://review.coreboot.org/25706 ) Change subject: linux_mtd: Initial import ...................................................................... Patch Set 3: Verified+1 (2 comments) https://review.coreboot.org/#/c/25706/2/linux_mtd.c File linux_mtd.c: https://review.coreboot.org/#/c/25706/2/linux_mtd.c@15 PS2, Line 15: : #include <ctype.h> : #include <errno.h> > This should go away as per https://review.coreboot.org/#/c/flashrom/+/25381/ . Done https://review.coreboot.org/#/c/25706/2/linux_mtd.c@383 PS2, Line 383: > This could be made more helpful. Removed; Specific error messages should be printed where the error occurs. -- To view, visit https://review.coreboot.org/25706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3d6bb282863a5cf69909e28a1fc752b35f1b9599 Gerrit-Change-Number: 25706 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 04 May 2018 21:37:44 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: Yes

1 0

Change in flashrom[master]: linux_mtd: Initial import
by build bot (Jenkins) (Code Review) 04 May '18

04 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25706 ) Change subject: linux_mtd: Initial import ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/1280/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/1063/ : SUCCESS -- To view, visit https://review.coreboot.org/25706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3d6bb282863a5cf69909e28a1fc752b35f1b9599 Gerrit-Change-Number: 25706 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 04 May 2018 21:37:35 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in flashrom[master]: linux_mtd: Initial import
by David Hendricks (Code Review) 04 May '18

04 May '18

Hello Patrick Rudolph, Paul Menzel, Jonathan Neuschäfer, Philipp Deppenwiese, Nico Huber, Brian Norris, I'd like you to reexamine a change. Please visit https://review.coreboot.org/25706 to look at the new patch set (#3). Change subject: linux_mtd: Initial import ...................................................................... linux_mtd: Initial import This imports a series of patches from chromiumos for MTD support. The patches are squashed to ease review and original Change-Ids have been removed to avoid confusing Gerrit. There are a few changes to integrate the code: - Conflict resolution - Makefile changes - Remove file library usage from linux_mtd. We may revisit this and use it for other Linux interfaces later on. This consolidated patch is Signed-off-by: David Hendricks <dhendricks(a)fb.com> The first commit's message is: Initial MTD support This adds MTD support to flashrom so that we can read, erase, and write content on a NOR flash chip via MTD. BUG=chrome-os-partner:40208 BRANCH=none TEST=read, write, and erase works on Oak Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/272983 Reviewed-by: Shawn N <shawnn(a)chromium.org> This is the 2nd commit message: linux_mtd: Fix compilation errors This fixes compilation errors from the initial import patch. Signed-off-by: David Hendricks <dhendricks(a)fb.com> This is the 3rd commit message: linux_mtd: Suppress message if NOR device not found This just suppresses a message that might cause confusion for unsuspecting users. BUG=none BRANCH=none TEST=ran on veyron_mickey, "NOR type device not found" message no longer appears under normal circumstances. Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302145 Commit-Ready: David Hendricks <dhendrix(a)chromium.org> Tested-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Shawn N <shawnn(a)chromium.org> This is the 4th commit message: linux_mtd: Support for NO_ERASE type devices Some mtd devices have the MTD_NO_ERASE flag set. This means these devices don't require an erase to write and might not have implemented an erase function. We should be conservative and skip erasing altogether, falling back to performing writes over the whole flash. BUG=b:35104688 TESTED=Zaius flash is now written correctly for the 0xff regions. Signed-off-by: William A. Kennington III <wak(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/472128 Commit-Ready: William Kennington <wak(a)google.com> Tested-by: William Kennington <wak(a)google.com> Reviewed-by: Brian Norris <briannorris(a)chromium.org> This is the 5th commit message: linux_mtd: do reads in eraseblock-sized chunks It's probably not the best idea to try to do an 8MB read in one syscall. Theoretically, this should work; but MTD just relies on the SPI driver to deliver the whole read in one transfer, and many SPI drivers haven't been tested well with large transfer sizes. I'd consider this a workaround, but it's still good to have IMO. BUG=chrome-os-partner:53215 TEST=boot kevin; `flashrom --read ...` TEST=check for performance regression on oak BRANCH=none Signed-off-by: Brian Norris <briannorris(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/344006 Reviewed-by: David Hendricks <dhendrix(a)chromium.org> This is the 6th commit message: linux_mtd: make read/write loop chunks consistent, and documented Theoretically, there should be no maximum size for the read() and write() syscalls on an MTD (well, except for the size of the entire device). But practical concerns (i.e., bugs) have meant we don't quite do this. For reads: Bug https://b/35573113 shows that some SPI-based MTD drivers don't yet handle very large transactions. So we artificially limit this to block-sized chunks. For writes: It's not clear there is a hard limit. Some drivers will already split large writes into smaller chunks automatically. Others don't do any splitting. At any rate, using *small* chunks can actually be a problem for some devices (b:35104688), as they get worse performance (doing an internal read/modify/write). This could be fixed in other ways by advertizing their true "write chunk size" to user space somehow, but this isn't so easy. As a simpler fix, we can just increase the loop increment to match the read loop. Per David, the original implementation (looping over page chunks) was just being paranoid. So this patch: * clarifies comments in linux_mtd_read(), to note that the chunking is somewhat of a hack that ideally can be fixed (with bug reference) * simplifies the linux_mtd_write() looping to match the structure in linux_mtd_read(), including dropping several unnecessary seeks, and correcting the error messages (they referred to "reads" and had the wrong parameters) * change linux_mtd_write() to align its chunks to eraseblocks, not page sizes Note that the "->page_size" parameter is still somewhat ill-defined, and only set by the upper layers for "opaque" flash. And it's not actually used in this driver now. If we could figure out what we really want to use it for, then we could try to set it appropriately. BRANCH=none BUG=b:35104688 TEST=various flashrom tests on Kevin TEST=Reading and writing to flash works on our zaius machines over mtd Change-Id: I3d6bb282863a5cf69909e28a1fc752b35f1b9599 Signed-off-by: Brian Norris <briannorris(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/505409 Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Martin Roth <martinroth(a)chromium.org> Reviewed-by: William Kennington <wak(a)google.com> --- M Makefile M flash.h M flashrom.c M internal.c A linux_mtd.c M programmer.h 6 files changed, 446 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/06/25706/3 -- To view, visit https://review.coreboot.org/25706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I3d6bb282863a5cf69909e28a1fc752b35f1b9599 Gerrit-Change-Number: 25706 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>

1 0

Change in flashrom[master]: digilent_spi: add a driver for the iCEblink40 development board
by build bot (Jenkins) (Code Review) 01 May '18

01 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23338 ) Change subject: digilent_spi: add a driver for the iCEblink40 development board ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/1062/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/1279/ : SUCCESS -- To view, visit https://review.coreboot.org/23338 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7ffcd9a2db4395816f0e8b6ce6c3b0d8e930c9e6 Gerrit-Change-Number: 23338 Gerrit-PatchSet: 6 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 01 May 2018 19:25:04 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in flashrom[master]: digilent_spi: add a driver for the iCEblink40 development board
by Lubomir Rintel (Code Review) 01 May '18

01 May '18

Hello Paul Menzel, build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/23338 to look at the new patch set (#6). Change subject: digilent_spi: add a driver for the iCEblink40 development board ...................................................................... digilent_spi: add a driver for the iCEblink40 development board This is driver that supports the Lattice iCE40 evaluation kits. On the board is a SPI flash memory chip labeled ST 25P10VP. Tested to work read/write/erase with "-p digilent_spi -c M25P10" or with a patch that resets the part beforehands (in which case it gets detected as a M25P10-A and is way faster due to paged writes). Change-Id: I7ffcd9a2db4395816f0e8b6ce6c3b0d8e930c9e6 Signed-off-by: Lubomir Rintel <lkundrak(a)v3.sk> --- M Makefile A digilent_spi.c M flashrom.8.tmpl M flashrom.c M programmer.h 5 files changed, 508 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/38/23338/6 -- To view, visit https://review.coreboot.org/23338 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I7ffcd9a2db4395816f0e8b6ce6c3b0d8e930c9e6 Gerrit-Change-Number: 23338 Gerrit-PatchSet: 6 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in flashrom[master]: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
by David Hendricks (Code Review) 30 Apr '18

30 Apr '18

David Hendricks has posted comments on this change. ( https://review.coreboot.org/25962 ) Change subject: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) ...................................................................... Patch Set 1: Someone on github tested the OpenEmbedded patch and confirmed that it works: https://github.com/flashrom/flashrom/pull/36 -- To view, visit https://review.coreboot.org/25962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Gerrit-Change-Number: 25962 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 30 Apr 2018 21:29:48 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in flashrom[master]: flashchips: Add Microchip SST26VF016B
by David Hendricks (Code Review) 30 Apr '18

30 Apr '18

David Hendricks has posted comments on this change. ( https://review.coreboot.org/25465 ) Change subject: flashchips: Add Microchip SST26VF016B ...................................................................... Patch Set 3: -Code-Review There was a pull request for a similar patch at https://github.com/flashrom/flashrom/pull/36. I pointed one of the commenters at the OpenEmbedded patch and they reported that the OE version of the patch works. Also, I noticed that support for this chip series seems to have originated here: https://patchwork.coreboot.org/patch/4126/ I went ahead and uploaded the latest known (AFAICT) version here: https://review.coreboot.org/#/c/flashrom/+/25962/ -- To view, visit https://review.coreboot.org/25465 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia7659e3db3168254b7f34959eece0f8df3142ab9 Gerrit-Change-Number: 25465 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 30 Apr 2018 21:28:35 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in flashrom[master]: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
by build bot (Jenkins) (Code Review) 30 Apr '18

30 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25962 ) Change subject: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/1061/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/1278/ : SUCCESS -- To view, visit https://review.coreboot.org/25962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Gerrit-Change-Number: 25962 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 30 Apr 2018 21:28:02 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in flashrom[master]: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
by David Hendricks (Code Review) 30 Apr '18

30 Apr '18

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/25962 Change subject: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) ...................................................................... flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) This patch seems to have originally been from https://patchwork.coreboot.org/patch/4126/ . The most recent version seems to be in OpenEmbedded (commit 503a572) which added support for 16Mbit and 32Mbit variants. The OpenEmbedded patch also makes changes to linux_spi.c to add some debug prints which are omitted in this version. >From the original commit message: Differences between SST26 and SST25: 1. The WREN instruction must be executed prior to WRSR [Section 5.31]. There is no EWSR. 2. Block protection bits are no longer in the status register. There is a dedicated 144-bit register [Table 5-6]. The device is write-protected by default. A Global Block-Protection Unlock command unlocks the entire memory [Section 4.1]. Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Signed-off-by: Wei Hu <wei(a)aristanetworks.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- M chipdrivers.h M flashchips.c M flashchips.h M spi25_statusreg.c 4 files changed, 130 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/25962/1 diff --git a/chipdrivers.h b/chipdrivers.h index af59c30..0ae45f4 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -107,6 +107,7 @@ int spi_prettyprint_status_register_sst25(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); +int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index 70057d4..86498af 100644 --- a/flashchips.c +++ b/flashchips.c @@ -12922,6 +12922,120 @@ { .vendor = "SST", + .name = "SST26VF016B(A)", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST26VF016B, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { + {8 * 1024, 4}, + {32 * 1024, 1}, + {64 * 1024, 30}, + {32 * 1024, 1}, + {8 * 1024, 4}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect_sst26_global_unprotect, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + { + .vendor = "SST", + .name = "SST26VF032B(A)", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST26VF032B, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { + {8 * 1024, 4}, + {32 * 1024, 1}, + {64 * 1024, 62}, + {32 * 1024, 1}, + {8 * 1024, 4}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect_sst26_global_unprotect, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + + { + .vendor = "SST", + .name = "SST26VF064B(A)", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST26VF064B, + .total_size = 8192, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { + {8 * 1024, 4}, + {32 * 1024, 1}, + {64 * 1024, 126}, + {32 * 1024, 1}, + {8 * 1024, 4}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect_sst26_global_unprotect, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "SST", .name = "SST25WF512", .bustype = BUS_SPI, .manufacture_id = SST_ID, diff --git a/flashchips.h b/flashchips.h index 68a67fa..36d7af6 100644 --- a/flashchips.h +++ b/flashchips.h @@ -703,6 +703,8 @@ #define SST_SST25VF064C 0x254B #define SST_SST26VF016 0x2601 #define SST_SST26VF032 0x2602 +#define SST_SST26VF016B 0x2641 +#define SST_SST26VF032B 0x2642 #define SST_SST26VF064B 0x2643 #define SST_SST27SF512 0xA4 #define SST_SST27SF010 0xA5 diff --git a/spi25_statusreg.c b/spi25_statusreg.c index 05c7acf..d4f0b5d 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -199,6 +199,19 @@ return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF); } +int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash) +{ + int result = spi_write_enable(flash); + if (result) + return result; + + static const unsigned char cmd[] = { 0x98 }; /* ULBPR */ + result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (result) + msg_cerr("ULBPR failed\n"); + return result; +} + /* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */ int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash) -- To view, visit https://review.coreboot.org/25962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Gerrit-Change-Number: 25962 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com>

1 0

Change in flashrom[master]: flashchips: Add Microchip SST26VF016B
by David Hendricks (Code Review) 29 Apr '18

29 Apr '18

David Hendricks has posted comments on this change. ( https://review.coreboot.org/25465 ) Change subject: flashchips: Add Microchip SST26VF016B ...................................................................... Patch Set 3: Code-Review+2 For what it's worth, there seems to be a more complete version of this patch here: http://cgit.openembedded.org/meta-openembedded/tree/meta-oe/recipes-bsp/fla… Should abandon this and import the openembedded one instead? -- To view, visit https://review.coreboot.org/25465 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia7659e3db3168254b7f34959eece0f8df3142ab9 Gerrit-Change-Number: 25465 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 30 Apr 2018 01:23:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

2025

2024

2023

2022

2021

2020

2019

2018

2017

flashrom-gerrit