September 2024 - flashrom-gerrit

[S] Change in flashrom[main]: tests: Add header stdlib.h to allow scan-build to do analysis
by Anastasia Klimchuk (Code Review) 25 Sep '24

25 Sep '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84455?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: tests: Add header stdlib.h to allow scan-build to do analysis ...................................................................... tests: Add header stdlib.h to allow scan-build to do analysis Without the header being explicitly included, scan-build run on CI was returning errors for these files, such as: include the header <stdlib.h> or explicitly provide a declaration for 'calloc' The functions in question were calloc, free, etc. Change-Id: I4b79c5f86c074c456533296c309293e4064abe3f Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84455 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M tests/ch341a_spi.c M tests/chip_wp.c M tests/erase_func_algo.c M tests/flashrom.c M tests/helpers.c M tests/linux_mtd.c M tests/raiden_debug_spi.c M tests/tests.c 8 files changed, 12 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/tests/ch341a_spi.c b/tests/ch341a_spi.c index 1cb2652..50b3d11 100644 --- a/tests/ch341a_spi.c +++ b/tests/ch341a_spi.c @@ -13,6 +13,8 @@ * GNU General Public License for more details. */ +#include <stdlib.h> + #include "lifecycle.h" #if CONFIG_CH341A_SPI == 1 diff --git a/tests/chip_wp.c b/tests/chip_wp.c index 1fa6bb9..4f0162d 100644 --- a/tests/chip_wp.c +++ b/tests/chip_wp.c @@ -16,6 +16,7 @@ #include <include/test.h> #include <stdio.h> +#include <stdlib.h> #include <string.h> #include "chipdrivers.h" diff --git a/tests/erase_func_algo.c b/tests/erase_func_algo.c index b2a09dc..d947eb9 100644 --- a/tests/erase_func_algo.c +++ b/tests/erase_func_algo.c @@ -13,6 +13,7 @@ #include <include/test.h> #include <stdio.h> +#include <stdlib.h> #include <string.h> #include "tests.h" diff --git a/tests/flashrom.c b/tests/flashrom.c index cc88831..52cc9c8 100644 --- a/tests/flashrom.c +++ b/tests/flashrom.c @@ -13,9 +13,10 @@ * GNU General Public License for more details. */ +#include <stdlib.h> + #include <include/test.h> #include "tests.h" - #include "programmer.h" #define assert_equal_and_free(text, expected) \ diff --git a/tests/helpers.c b/tests/helpers.c index 271fb48..95a1619 100644 --- a/tests/helpers.c +++ b/tests/helpers.c @@ -19,6 +19,7 @@ #include "flash.h" #include <stdint.h> +#include <stdlib.h> void address_to_bits_test_success(void **state) { diff --git a/tests/linux_mtd.c b/tests/linux_mtd.c index 3aaa5ab..0cee785 100644 --- a/tests/linux_mtd.c +++ b/tests/linux_mtd.c @@ -13,6 +13,8 @@ * GNU General Public License for more details. */ +#include <stdlib.h> + #include "lifecycle.h" #if CONFIG_LINUX_MTD == 1 diff --git a/tests/raiden_debug_spi.c b/tests/raiden_debug_spi.c index 4f0bdd3..8ec0617 100644 --- a/tests/raiden_debug_spi.c +++ b/tests/raiden_debug_spi.c @@ -13,6 +13,8 @@ * GNU General Public License for more details. */ +#include <stdlib.h> + #include "lifecycle.h" #if CONFIG_RAIDEN_DEBUG_SPI == 1 diff --git a/tests/tests.c b/tests/tests.c index 8a9dc6b..3fee056 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -20,6 +20,7 @@ #include "io_real.h" #include <stdio.h> +#include <stdlib.h> #include <string.h> #include <stdint.h> #include <pthread.h> -- To view, visit https://review.coreboot.org/c/flashrom/+/84455?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4b79c5f86c074c456533296c309293e4064abe3f Gerrit-Change-Number: 84455 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in flashrom[main]: doc: Convert doc for ft2232_spi
by Anastasia Klimchuk (Code Review) 25 Sep '24

25 Sep '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/83866?usp=email ) Change subject: doc: Convert doc for ft2232_spi ...................................................................... doc: Convert doc for ft2232_spi From page: https://wiki.flashrom.org/FT2232SPI_Programmer The sections about openbiosprog-spi, RushSPI, Amontec have broken links and are not added to this patch. If we find out where these project live now (if they still are active), would be good to add the info later. Change-Id: Id30b6c92838d7ca6e26a4cc3e0aeeb3f3ce07668 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/83866 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A doc/supported_hw/supported_prog/ARM-USB-TINY_pinout.png A doc/supported_hw/supported_prog/Dlp_usb1232h_bottom.jpg A doc/supported_hw/supported_prog/Dlp_usb1232h_side.jpg A doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer.jpg A doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_1.jpg A doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_2.jpg A doc/supported_hw/supported_prog/Ft2232spi_programer.jpg A doc/supported_hw/supported_prog/Openmoko_0001.jpeg A doc/supported_hw/supported_prog/Openmoko_0002.jpeg A doc/supported_hw/supported_prog/Openmoko_0003.jpeg A doc/supported_hw/supported_prog/Via_epia_m700_bios.jpg A doc/supported_hw/supported_prog/Via_epia_m700_programer.jpg A doc/supported_hw/supported_prog/ft2232_spi.rst M doc/supported_hw/supported_prog/index.rst 14 files changed, 309 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/doc/supported_hw/supported_prog/ARM-USB-TINY_pinout.png b/doc/supported_hw/supported_prog/ARM-USB-TINY_pinout.png new file mode 100644 index 0000000..aa95a59 --- /dev/null +++ b/doc/supported_hw/supported_prog/ARM-USB-TINY_pinout.png Binary files differ diff --git a/doc/supported_hw/supported_prog/Dlp_usb1232h_bottom.jpg b/doc/supported_hw/supported_prog/Dlp_usb1232h_bottom.jpg new file mode 100644 index 0000000..5ebf9b7 --- /dev/null +++ b/doc/supported_hw/supported_prog/Dlp_usb1232h_bottom.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/Dlp_usb1232h_side.jpg b/doc/supported_hw/supported_prog/Dlp_usb1232h_side.jpg new file mode 100644 index 0000000..0a17f6e --- /dev/null +++ b/doc/supported_hw/supported_prog/Dlp_usb1232h_side.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer.jpg b/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer.jpg new file mode 100644 index 0000000..94eecb1 --- /dev/null +++ b/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_1.jpg b/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_1.jpg new file mode 100644 index 0000000..61a7a18 --- /dev/null +++ b/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_1.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_2.jpg b/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_2.jpg new file mode 100644 index 0000000..92e143a --- /dev/null +++ b/doc/supported_hw/supported_prog/Dlp_usb1232h_spi_programmer_breadboard_2.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/Ft2232spi_programer.jpg b/doc/supported_hw/supported_prog/Ft2232spi_programer.jpg new file mode 100644 index 0000000..84f618c --- /dev/null +++ b/doc/supported_hw/supported_prog/Ft2232spi_programer.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/Openmoko_0001.jpeg b/doc/supported_hw/supported_prog/Openmoko_0001.jpeg new file mode 100644 index 0000000..7ea7968 --- /dev/null +++ b/doc/supported_hw/supported_prog/Openmoko_0001.jpeg Binary files differ diff --git a/doc/supported_hw/supported_prog/Openmoko_0002.jpeg b/doc/supported_hw/supported_prog/Openmoko_0002.jpeg new file mode 100644 index 0000000..be60d56 --- /dev/null +++ b/doc/supported_hw/supported_prog/Openmoko_0002.jpeg Binary files differ diff --git a/doc/supported_hw/supported_prog/Openmoko_0003.jpeg b/doc/supported_hw/supported_prog/Openmoko_0003.jpeg new file mode 100644 index 0000000..74109de --- /dev/null +++ b/doc/supported_hw/supported_prog/Openmoko_0003.jpeg Binary files differ diff --git a/doc/supported_hw/supported_prog/Via_epia_m700_bios.jpg b/doc/supported_hw/supported_prog/Via_epia_m700_bios.jpg new file mode 100644 index 0000000..6103838 --- /dev/null +++ b/doc/supported_hw/supported_prog/Via_epia_m700_bios.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/Via_epia_m700_programer.jpg b/doc/supported_hw/supported_prog/Via_epia_m700_programer.jpg new file mode 100644 index 0000000..bc69bcb --- /dev/null +++ b/doc/supported_hw/supported_prog/Via_epia_m700_programer.jpg Binary files differ diff --git a/doc/supported_hw/supported_prog/ft2232_spi.rst b/doc/supported_hw/supported_prog/ft2232_spi.rst new file mode 100644 index 0000000..8f87117 --- /dev/null +++ b/doc/supported_hw/supported_prog/ft2232_spi.rst @@ -0,0 +1,308 @@ +========== +FT2232 SPI +========== + +flashrom supports the ``-p ft2232_spi`` (or ``-p ft2232spi`` in very old flashrom revisions) option +which allows you to use an FTDI FT2232/FT4232H/FT232H based device as external SPI programmer. + +This is made possible by using `libftdi <http://www.intra2net.com/en/developer/libftdi/>`_. +flashrom autodetects the presence of libftdi headers and enables FT2232/FT4232H/FT232H support if they are available. + +Currently known FT2232/FT4232H/FT232H based devices which can be used as SPI programmer +together with flashrom are described below. + +DLP Design DLP-USB1232H +======================= + +The `DLP Design DLP-USB1232H <http://www.dlpdesign.com/usb/usb1232h.shtml>`_ +(`datasheet DLP-USB1232H <http://www.dlpdesign.com/usb1232h-ds-v13.pdf>`_) can be used with flashrom +for programming SPI chips. + +Where to buy: `Digikey <https://www.digikey.com/>`_, +`Mouser <https://www.mouser.de/ProductDetail/?qs=sGAEpiMZZMt/5FJRvmqHBjWi/VTYGDW6>`_, +`Saelig <https://www.saelig.com/product/UB068.htm>`_ + +Setup +----- + +DLP-USB1232H based SPI programmer schematics + +.. image:: Dlp_usb1232h_spi_programmer.jpg + +In order to use the DLP-USB1232H device as SPI programmer you have to setup a small circuit +(e.g. on a breadboard). See the schematics for details (you can also +`download the schematics as PDF <http://www.coreboot.org/images/2/26/Dlp_usb1232h_spi_programmer.pdf>`_ +for easier printing). + +What you will need +------------------ + +=============== ======================= ============= ====== =============================================== +Quantity Device Footprint Value Comments +=============== ======================= ============= ====== =============================================== +1 DLP Design DLP-USB1232H — — ... +1 Breadboard — — ... +many Jumper wires — — ... +1 DIP-8 SPI chip — — This is the chip you want to program/read/erase +1 3.3V voltage regulator TO-220 3.3V E.g. **LD33V** or **LD1117xx** +1 Electrolytic capacitor single ended 100nF ... +1 Electrolytic capacitor single ended 10uF ... +=============== ======================= ============= ====== =============================================== + +Instructions and hints +---------------------- + +* You must connect/shorten pins 8 and 9, which configures the device to be powered by USB. + Without this connection it will not be powered, and thus not be detected by your OS + (e.g. it will not appear in the ``lsusb`` output). + +* You need a 3.3V voltage regulator to convert the 5V from USB to 3.3V, + so you can power the 3.3V SPI BIOS chip. + + * You can probably use pretty much any 3.3V voltage regulator, e.g. **LD33V** or **LD1117xx**. + For usage on a breadboard the TO-220 packaging is probably most useful. + * You have to connect two capacitors (e.g. 100nF and 10uF as per datasheets, + but using two 10uF capacitors, or even two 47uF capacitors also works in practice) as shown in the schematics, + otherwise the voltage regulator will not work correctly and reliably. + +* Connect the following pins from the DLP-USB1232H to the SPI BIOS chip: + + * **18 (SK)** to **SCLK** + * **16 (DO)** to **SI** + * **2 (DI)** to **SO** + * **5 (CS)** to **CS#** + * The **WP# and HOLD#** pins should be tied to **VCC**! If you leave them unconnected + you'll likely experience strange issues. + * All **GND** pins should be connected together (**pins 1i and 10** on the DLP-USB1232H, + **pin 8** on the SPI chip, **pin 1** on the voltage regulator). + +You have to invoke flashrom with the following parameters:: + + $ flashrom -p ft2232_spi:type=2232H,port=A + +Photos +------ + +Module, top + +.. image:: Dlp_usb1232h_side.jpg + + +Module, bottom + +.. image:: Dlp_usb1232h_bottom.jpg + + +SPI header on a mainboard + +.. image:: Via_epia_m700_bios.jpg + + +Module on a breadboard, connected to the mainboard's SPI header + +.. image:: Via_epia_m700_programer.jpg + + +Breadboard setup + +.. image:: Ft2232spi_programer.jpg + + +Another breadboard setup + +.. image:: Dlp_usb1232h_spi_programmer_breadboard_1.jpg + + +Module and parts + +.. image:: Dlp_usb1232h_spi_programmer_breadboard_2.jpg + +FTDI FT2232H Mini-Module +======================== + +The `FTDI FT2232H Mini-Module Evaluation Kit <http://www.ftdichip.com/Products/Modules/DevelopmentModules.htm#FT2232H%20M…>`_ +(`the datasheet <http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_FT2232H_Min…>`_) +can be used with flashrom for programming SPI chips. + +Pinout +------ + +=============== ======= ======= =============== =========================== +Module Pin FTDI MPSSE SPI SPI Flash (vendor specific) +=============== ======= ======= =============== =========================== +CN2-7 AD0 TCK/SK (S)CLK (S)CLK +CN2-10 AD1 TDI/DO MOSI SI / DI +CN2-9 AD2 TDO/DI MISO SO / DO +CN2-12 AD3 TMS/CS /CS / /SS /CS +CN3-26 BD0 TCK/SK (S)CLK (S)CLK +CN3-25 BD1 TDI/DO MOSI SI / DI +CN3-24 BD2 TDO/DI MISO SO / DO +CN3-23 BD3 TMS/CS /CS / /SS /CS +=============== ======= ======= =============== =========================== + +FTDI FT4232H Mini-Module +======================== + +The `FTDI FT4232H Mini-Module Evaluation Kit <http://www.ftdichip.com/Products/Modules/DevelopmentModules.htm#FT4232H%20M…>`_ +(`datasheet <http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_FT4232H_Min…>`_) +can be used with flashrom for programming SPI chips. + +Olimex ARM-USB-TINY/-H and ARM-USB-OCD/-H +========================================= + +The `Olimex <http://www.olimex.com/dev/index.html>`_ `ARM-USB-TINY <http://www.olimex.com/dev/arm-usb-tiny.html>`_ +(VID:PID 15BA:0004) and `ARM-USB-OCD <http://www.olimex.com/dev/arm-usb-ocd.html>`_ (15BA:0003) +can be used with flashrom for programming SPI chips. +The `ARM-USB-TINY-H <http://www.olimex.com/dev/arm-usb-tiny-h.html>`_ (15BA:002A) +and `ARM-USB-OCD-H <http://www.olimex.com/dev/arm-usb-ocd-h.html>`_ (15BA:002B) should also work, +though the tested status is unconfirmed. + +The following setup can then be used to flash a BIOS chip through SPI. + +Pinout: + + .. image:: ARM-USB-TINY_pinout.png + +=============== ========================= +Pin (JTAG Name) SPI/Voltage Source +=============== ========================= +1 (VREF) VCC (from Voltage Source) +2 (VTARGET) VCC (to SPI target) +4 (GND) GND (from Voltage Source) +5 (TDI) SI +6 (GND) GND (to SPI target) +7 (TMS) CE# +9 (TCK) SCK +13 (TDO) SO +=============== ========================= + +On the ARM-USB-TINY, VREF, and VTARGET are internally connected, and all the GND lines +(even numbered pins, from 4 to 20) share the same line as well, so they can be used +to split VCC/GND between the voltage source and the target. + +The voltage source should provide 3.0V to 3.3V DC but doesn't have to come from USB: +it can be as simple as two AA or AAA batteries placed in serial (2 x 1.5V). + +Invoking flashrom +----------------- + +You first need to add the ``-p ft2232_spi`` option, and then specify one of ``arm-usb-tiny``, +``arm-usb-tiny-h``, ``arm-usb-ocd`` or ``arm-usb-ocd-f`` for the type. +For instance, to use an ARM-USB-TINY, you would use:: + + $ flashrom -p ft2232_spi:type=arm-usb-tiny + +Openmoko +======== + +The openmoko debug board (which can also do serial+jtag for the openmoko phones, or for other phones) +has `its shematics available here <http://people.openmoko.org/joerg/schematics/debug_board/OpenMoKo_Debug_Boar…>`_. + +Informations +------------ + +The openmoko debug board can act as an SPI programmer bitbanging the FTDI +(no need of an openmoko phone), you just need: + +* a breadboard +* some wires +* The openmoko debug board(v2 and after,but only tested with v3) + +The voltage is provided by the board itself. The connector to use is the JTAG one +(very similar to what's documented in the previous section(Olimex ARM-USB-TINY/-H and ARM-USB-OCD/-H ) + +Building +-------- + +**WARNING: This was tested with 3.3v chips only.** + +Here's the pinout of the JTAG connector of the openmoko debug board +(copied from ARM-USB-tiny because it's the same pinout): + + .. image:: ARM-USB-TINY_pinout.png + +=============== =============================== ======================== +Pin (JTAG Name) SPI/Voltage Source BIOS Chip connector name +=============== =============================== ======================== +1 (VREF) VCC (from Voltage Source) VCC (3.3v only) +2 (VTARGET) VCC (to SPI target) Not connected +4 (GND) GND (from Voltage Source) Ground +5 (TDI) SI DIO (Data Input) +6 (GND) GND (to SPI target) Not connected +7 (TMS) CE# CS (Chip select) +9 (TCK) SCK CLK (Clock) +13 (TDO) SO DO (Data output) +=============== =============================== ======================== + +* Also connect the BIOS chip's write protect(WP) to VCC + +* Also connect the BIOS chips's HOLD to VCC + +Pictures +-------- + +.. image:: Openmoko_0001.jpeg + +.. image:: Openmoko_0002.jpeg + +.. image:: Openmoko_0003.jpeg + +Performances +------------ + +:: + + $ time ./flashrom/flashrom -p ft2232_spi:type=openmoko -r coreboot.rom + flashrom v0.9.5.2-r1545 on Linux 3.0.0-20-generic (x86_64) + flashrom is free software, get the source code at http://www.flashrom.org + + Calibrating delay loop... OK. + Found Winbond flash chip "W25X80" (1024 kB, SPI) on ft2232_spi. + Reading flash... done. + + real 0m19.459s + user 0m1.244s + sys 0m0.000s + +:: + + $ time ./flashrom/flashrom -p ft2232_spi:type=openmoko -w coreboot.rom + flashrom v0.9.5.2-r1545 on Linux 3.0.0-20-generic (x86_64) + flashrom is free software, get the source code at http://www.flashrom.org + + Calibrating delay loop... OK. + Found Winbond flash chip "W25X80" (1024 kB, SPI) on ft2232_spi. + Reading old flash chip contents... done. + Erasing and writing flash chip... Erase/write done. + Verifying flash... VERIFIED. + + real 1m1.366s + user 0m7.692s + sys 0m0.044s + +Advantages/disadvantages +------------------------ + +* fast(see above) + +* easily available (many people in the free software world have openmoko debug board + and they don't know what to do with them), can still be bought + +* stable + +* SPI only + +Generic Pinout +============== + +There are many more simple modules that feature the FT*232H. +Actual pinouts depend on each module, the FTDI names map to SPI as follows: + +=============== ======= =============== =========================== +Pin Name MPSSE SPI SPI Flash (vendor specific) +=============== ======= =============== =========================== +DBUS0 TCK/SK (S)CLK (S)CLK +DBUS1 TDI/DO MOSI SI / DI +DBUS2 TDO/DI MISO SO / DO +DBUS3 TMS/CS /CS / /SS /CS +=============== ======= =============== =========================== diff --git a/doc/supported_hw/supported_prog/index.rst b/doc/supported_hw/supported_prog/index.rst index ec96b9f..7912f34 100644 --- a/doc/supported_hw/supported_prog/index.rst +++ b/doc/supported_hw/supported_prog/index.rst @@ -17,4 +17,5 @@ buspirate dummyflasher + ft2232_spi serprog/index -- To view, visit https://review.coreboot.org/c/flashrom/+/83866?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Id30b6c92838d7ca6e26a4cc3e0aeeb3f3ce07668 Gerrit-Change-Number: 83866 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in flashrom[main]: doc: Add manpage item for nicintel_spi
by Anastasia Klimchuk (Code Review) 25 Sep '24

25 Sep '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/83751?usp=email ) Change subject: doc: Add manpage item for nicintel_spi ...................................................................... doc: Add manpage item for nicintel_spi The existing page on old wiki is very small and fits into a manpage item: https://wiki.flashrom.org/NICIntel Change-Id: I139065611c68c0fa0a675fe49a6f8bc20e9057f7 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/83751 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- M doc/classic_cli_manpage.rst 1 file changed, 5 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst index c8aa61f..cdb7060 100644 --- a/doc/classic_cli_manpage.rst +++ b/doc/classic_cli_manpage.rst @@ -670,6 +670,11 @@ Please note that the small number of address lines connected to the chip may make accessing large chips impossible. The maximum supported chip size is 128KB. +nicintel_spi programmer +^^^^^^^^^^^^^^^^^^^^^^^ + +Programmer for SPI flash ROMs on Intel Gigabit network cards. Tested on 32-bit hardware/PCI only. + nicintel_eeprom programmer ^^^^^^^^^^^^^^^^^^^^^^^^^^ -- To view, visit https://review.coreboot.org/c/flashrom/+/83751?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I139065611c68c0fa0a675fe49a6f8bc20e9057f7 Gerrit-Change-Number: 83751 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in flashrom[main]: dummyflasher: Enable higher frequency emulation, add docs and tests
by Anastasia Klimchuk (Code Review) 25 Sep '24

25 Sep '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84423?usp=email ) Change subject: dummyflasher: Enable higher frequency emulation, add docs and tests ...................................................................... dummyflasher: Enable higher frequency emulation, add docs and tests The patch adds a section on a manpage to explain the freq parameter in dummyflasher, and tests for various valid and invalid values of freq parameter. Co-developed-by: Anastasia Klimchuk <aklm(a)flashrom.org> Co-developed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Change-Id: Iaca5d95f8f977bf0c2283c6458d8977e6ce70251 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84423 Reviewed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M doc/classic_cli_manpage.rst M dummyflasher.c M tests/dummyflasher.c M tests/tests.c M tests/tests.h 5 files changed, 41 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Sergii Dmytruk: Looks good to me, approved diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst index e2ce684..c8aa61f 100644 --- a/doc/classic_cli_manpage.rst +++ b/doc/classic_cli_manpage.rst @@ -616,6 +616,18 @@ syntax where ``state`` is ``yes`` or ``no`` (default value). ``yes`` means active state of the pin implies that chip is write-protected (on real hardware the pin is usually negated, but not here). +**Frequency** + Frequency can be specified in ``Hz`` (default), ``KHz``, or ``MHz`` (not case sensitive). + If ``freq`` parameter is passed in from command line, commands will delay for certain time before returning, + so that to emulate the requested frequency. + + Valid range is [1Hz, 8000Mhz] and there is no delay by default. + + The delay of an SPI command is proportional to the number of bits send over SPI bus in both directions + and is calculated based on the assumption that we transfer at 1 bit/Hz:: + + flashrom -p dummy:emulate=W25Q128FV,freq=64mhz + nic3com, nicrealtek, nicnatsemi, nicintel, nicintel_eeprom, nicintel_spi, gfxnvidia, ogp_spi, drkaiser, satasii, satamv, atahpt, atavia, atapromise, it8212 programmers ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/dummyflasher.c b/dummyflasher.c index cf4ca03..ef49f48 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -55,7 +55,7 @@ uint8_t emu_status_len; /* number of emulated status registers */ /* If "freq" parameter is passed in from command line, commands will delay * for this period before returning. */ - unsigned long int delay_us; + unsigned long long delay_ns; unsigned int emu_max_byteprogram_size; unsigned int emu_max_aai_size; unsigned int emu_jedec_se_size; @@ -901,7 +901,7 @@ msg_pspew(" 0x%02x", readarr[i]); msg_pspew("\n"); - default_delay((writecnt + readcnt) * emu_data->delay_us); + default_delay(((writecnt + readcnt) * emu_data->delay_ns) / 1000); return 0; } @@ -1128,7 +1128,7 @@ /* frequency to emulate in Hz (default), KHz, or MHz */ tmp = extract_programmer_param_str(cfg, "freq"); if (tmp) { - unsigned long int freq; + unsigned long long freq; char *units = tmp; char *end = tmp + strlen(tmp); @@ -1166,13 +1166,13 @@ } } - if (freq == 0) { - msg_perr("%s: invalid value 0 for freq parameter\n", __func__); + if (freq == 0 || freq > 8000000000) { + msg_perr("%s: invalid value %llu for freq parameter\n", __func__, freq); free(tmp); return 1; } /* Assume we only work with bytes and transfer at 1 bit/Hz */ - data->delay_us = (1000000 * 8) / freq; + data->delay_ns = (1000000000ull * 8) / freq; } free(tmp); @@ -1402,7 +1402,7 @@ return 1; } data->emu_chip = EMULATE_NONE; - data->delay_us = 0; + data->delay_ns = 0; data->spi_write_256_chunksize = 256; msg_pspew("%s\n", __func__); diff --git a/tests/dummyflasher.c b/tests/dummyflasher.c index 052938b..9878bef 100644 --- a/tests/dummyflasher.c +++ b/tests/dummyflasher.c @@ -141,6 +141,25 @@ run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=parallel+lpc+spi"); } +void dummy_freq_param_init(void **state) +{ + struct io_mock_fallback_open_state dummy_fallback_open_state = { + .noc = 0, + .paths = { NULL }, + }; + const struct io_mock dummy_io = { + .fallback_open_state = &dummy_fallback_open_state, + }; + + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=spi,freq=12Hz"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=spi,freq=123KHz"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=spi,freq=345MHz"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=spi,freq=8000MHz"); + /* Valid values for freq param are within the range [1Hz, 8000Mhz] */ + run_init_error_path(state, &dummy_io, &programmer_dummy, "bus=spi,freq=0Hz", 0x1); + run_init_error_path(state, &dummy_io, &programmer_dummy, "bus=spi,freq=8001Mhz", 0x1); +} + #else SKIP_TEST(dummy_basic_lifecycle_test_success) SKIP_TEST(dummy_probe_lifecycle_test_success) @@ -150,4 +169,5 @@ SKIP_TEST(dummy_init_success_unhandled_param_test_success) SKIP_TEST(dummy_null_prog_param_test_success) SKIP_TEST(dummy_all_buses_test_success) + SKIP_TEST(dummy_freq_param_init) #endif /* CONFIG_DUMMY */ diff --git a/tests/tests.c b/tests/tests.c index 78f1b47..8a9dc6b 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -461,6 +461,7 @@ cmocka_unit_test(dummy_init_success_unhandled_param_test_success), cmocka_unit_test(dummy_null_prog_param_test_success), cmocka_unit_test(dummy_all_buses_test_success), + cmocka_unit_test(dummy_freq_param_init), cmocka_unit_test(nicrealtek_basic_lifecycle_test_success), cmocka_unit_test(raiden_debug_basic_lifecycle_test_success), cmocka_unit_test(raiden_debug_targetAP_basic_lifecycle_test_success), diff --git a/tests/tests.h b/tests/tests.h index 3536d1d..100bda1 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -53,6 +53,7 @@ void dummy_init_success_unhandled_param_test_success(void **state); void dummy_null_prog_param_test_success(void **state); void dummy_all_buses_test_success(void **state); +void dummy_freq_param_init(void **state); void nicrealtek_basic_lifecycle_test_success(void **state); void raiden_debug_basic_lifecycle_test_success(void **state); void raiden_debug_targetAP_basic_lifecycle_test_success(void **state); -- To view, visit https://review.coreboot.org/c/flashrom/+/84423?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Iaca5d95f8f977bf0c2283c6458d8977e6ce70251 Gerrit-Change-Number: 84423 Gerrit-PatchSet: 4 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in flashrom[main]: ichspi: Restore Sector erase opcode after send command
by Nikolai Artemiev (Code Review) 24 Sep '24

24 Sep '24

Attention is currently required from: Anastasia Klimchuk, Bill XIE, Peter Marheine. Nikolai Artemiev has posted comments on this change by Bill XIE. ( https://review.coreboot.org/c/flashrom/+/84253?usp=email ) Change subject: ichspi: Restore Sector erase opcode after send command ...................................................................... Patch Set 1: (3 comments) File ichspi.c: https://review.coreboot.org/c/flashrom/+/84253/comment/661d1ac2_06d8ba1a?us… : PS1, Line 402: static OPCODE POSSIBLE_OPCODES[] = { > What is the meaning of this array ? It is called POSSIBLE_OPCODES , but for example in the logs of t […] There's some logic in reprogram_opcode_on_the_fly() to handle the case where an opcode isn't found in this array (i.e. when lookup_spi_type() returns 0xFF). The array name is misleading since it doesn't contain all possible opcodes. https://review.coreboot.org/c/flashrom/+/84253/comment/e3b78988_a3e33b48?us… : PS1, Line 664: int oppos = 2; // use original JEDEC_BE_D8 offset > I have questions in my head […] The choice of index 2 here does seem suboptimal. It might be good to change it in a different CL since it could possibly break something. It's worth noting that newer CPUs don't support this code path (they use hwseq) so it's hard to test any changes thoroughly. https://review.coreboot.org/c/flashrom/+/84253/comment/258fe60e_590e2c87?us… : PS1, Line 1843: : static bool ich_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode) : { : return find_opcode(curopcodes, opcode) >= 0; Rather than restoring JEDEC_SE after every ich_spi_send_command() call, we could add a check here to see if the opcode is in POSSIBLE_OPCODES and return true if it is. That way, ich_spi_send_command will automatically reprogram the required opcode if it is missing and we don't have to restore JEDEC_SE after every command that reprograms it. -- To view, visit https://review.coreboot.org/c/flashrom/+/84253?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3fc831fc072e2af9265835cb2f71bf8c222c6a64 Gerrit-Change-Number: 84253 Gerrit-PatchSet: 1 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Tue, 24 Sep 2024 02:33:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[L] Change in flashrom[main]: Fwd: Software info for Willem/EZOflash
by Keith Hui (Code Review) 24 Sep '24

24 Sep '24

Attention is currently required from: Balázs Vinarz. Keith Hui has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/flashrom/+/23053?usp=email ) Change subject: Fwd: Software info for Willem/EZOflash ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I have a homemade PCB3B variant that was later modified to (apparently proprietary) PCB45 specs, following a forum post. It passes a static multimeter test, but not sure if it actually works. When you have the code ready, I'll see that I can do. (The main difference between PCB3B and PCB45 is that the latter uses a 3-bit serial protocol instead of 1-bit serial, so 3x faster.) -- To view, visit https://review.coreboot.org/c/flashrom/+/23053?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idc4d98593076c80fd1d6ac4596940d1d7977343c Gerrit-Change-Number: 23053 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Balázs Vinarz <vinibali1(a)gmail.com> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Balázs Vinarz <vinibali1(a)gmail.com> Gerrit-Comment-Date: Tue, 24 Sep 2024 02:06:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in flashrom[main]: doc: Add html_logo and html_title to sphinx config
by Anastasia Klimchuk (Code Review) 23 Sep '24

23 Sep '24

Anastasia Klimchuk has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/77438?usp=email ) Change subject: doc: Add html_logo and html_title to sphinx config ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/flashrom/+/77438?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I9a530f7143880393fffc2a97327416f2cd688586 Gerrit-Change-Number: 77438 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in flashrom[main]: doc: Add html_logo and html_title to sphinx config
by Anastasia Klimchuk (Code Review) 23 Sep '24

23 Sep '24

Attention is currently required from: Alexander Goncharov, Thomas Heijligen. Anastasia Klimchuk has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/77438?usp=email ) Change subject: doc: Add html_logo and html_title to sphinx config ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: I looked again at this patch... and I don't think it's needed at all. I am not sure about the logo (there are other comments discussing logo placement and alignment), and html_title is exactly the title we already have by default: https://www.sphinx-doc.org/en/master/usage/configuration.html#confval-html_… Sorry for the noise! I will abandon this for now. -- To view, visit https://review.coreboot.org/c/flashrom/+/77438?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I9a530f7143880393fffc2a97327416f2cd688586 Gerrit-Change-Number: 77438 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Mon, 23 Sep 2024 10:12:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in flashrom[main]: en29lv640b.c: Fix the comment about chunksize
by Anastasia Klimchuk (Code Review) 23 Sep '24

23 Sep '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84422?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: en29lv640b.c: Fix the comment about chunksize ...................................................................... en29lv640b.c: Fix the comment about chunksize Co-developed-by: Anastasia Klimchuk <aklm(a)flashrom.org> Co-developed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Change-Id: I104611d42b301662e2c833498aca99c879685846 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84422 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M en29lv640b.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Sergii Dmytruk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/en29lv640b.c b/en29lv640b.c index 8a8d641..4d93844 100644 --- a/en29lv640b.c +++ b/en29lv640b.c @@ -26,7 +26,7 @@ * functions. */ -/* chunksize is 1 */ +/* chunksize is 2 */ int write_en29lv640b(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int len) { unsigned int i; -- To view, visit https://review.coreboot.org/c/flashrom/+/84422?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I104611d42b301662e2c833498aca99c879685846 Gerrit-Change-Number: 84422 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in flashrom[main]: dediprog: Fix comment about usb transfer size
by Anastasia Klimchuk (Code Review) 23 Sep '24

23 Sep '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84421?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: dediprog: Fix comment about usb transfer size ...................................................................... dediprog: Fix comment about usb transfer size Co-developed-by: Anastasia Klimchuk <aklm(a)flashrom.org> Co-developed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Change-Id: I1ad7f89b0a6c91907440e3897ac262bd82f846d5 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84421 Reviewed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M dediprog.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Sergii Dmytruk: Looks good to me, approved diff --git a/dediprog.c b/dediprog.c index 734fcfa..aa3a1cf 100644 --- a/dediprog.c +++ b/dediprog.c @@ -593,7 +593,7 @@ static int dediprog_spi_bulk_write(struct flashctx *flash, const uint8_t *buf, unsigned int chunksize, unsigned int start, unsigned int len, uint8_t dedi_spi_cmd) { - /* USB transfer size must be 512, other sizes will NOT work at all. + /* USB transfer size must be 256, other sizes will NOT work at all. * chunksize is the real data size per USB bulk transfer. The remaining * space in a USB bulk transfer must be filled with 0xff padding. */ -- To view, visit https://review.coreboot.org/c/flashrom/+/84421?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1ad7f89b0a6c91907440e3897ac262bd82f846d5 Gerrit-Change-Number: 84421 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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