August 2024 - flashrom-gerrit - mail.coreboot.org

[S] Change in flashrom[main]: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register
by Peter Marheine (Code Review) 22 Aug '24

22 Aug '24

Peter Marheine has submitted this change. ( https://review.coreboot.org/c/flashrom/+/83896?usp=email ) Change subject: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register ...................................................................... chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register In the latest pciutils(v3.13.0), it supports accessing pci registers by ecam. This patch uses libpci version check to decide whether flashrom calls libpci and use 0xcf8/0xcfc or ecam to access pci registers. BUG=b:359813524 TEST=with libpci >= 3.13.0, flashrom is working with ECAM access Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Signed-off-by: Kane Chen <kane.chen(a)intel.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/83896 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Hsuan-ting Chen <roccochen(a)google.com> Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> --- M chipset_enable.c M doc/release_notes/devel.rst M meson.build 3 files changed, 22 insertions(+), 1 deletion(-) Approvals: Hsuan-ting Chen: Looks good to me, approved Peter Marheine: Looks good to me, approved build bot (Jenkins): Verified diff --git a/chipset_enable.c b/chipset_enable.c index facf29e..9f0a0bb 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -938,7 +938,13 @@ msg_perr("Can't allocate PCI accessor.\n"); return ret; } +#if CONFIG_USE_LIBPCI_ECAM == 1 + pci_acc->method = PCI_ACCESS_ECAM; + msg_pdbg("Using libpci PCI_ACCESS_ECAM\n"); +#else pci_acc->method = PCI_ACCESS_I386_TYPE1; + msg_pdbg("Using libpci PCI_ACCESS_I386_TYPE1\n"); +#endif pci_init(pci_acc); register_shutdown(enable_flash_pch100_shutdown, pci_acc); diff --git a/doc/release_notes/devel.rst b/doc/release_notes/devel.rst index e28e347..5243f7c 100644 --- a/doc/release_notes/devel.rst +++ b/doc/release_notes/devel.rst @@ -22,4 +22,12 @@ As documented in the :doc:`v1.4 release notes <v_1_4>`, support for building flashrom with make has been removed; all Makefiles have been deleted. Meson is -now the only supported tool for building flashrom from source. \ No newline at end of file +now the only supported tool for building flashrom from source. + +New Feature +=========== +Libpci 3.13.0 and onwards support ECAM to access pci registers. Flashrom will +be moved to ECAM from IO port 0xcf8/0xcfc if the libpci version is >= 3.13.0. +The ECAM has been supported for a very long time, most platforms should support +it. For those platforms don't support ECAM, libpci will terminate the process by +exit. diff --git a/meson.build b/meson.build index 85d69b8..26d96d9 100644 --- a/meson.build +++ b/meson.build @@ -165,6 +165,13 @@ libftdi1 = dependency('libftdi1', required : group_ftdi) libjaylink = dependency('libjaylink', required : group_jlink, version : '>=0.3.0') +# ECAM is supported in libpci after 3.13.0 +if libpci.version().version_compare('>=3.13.0') + add_project_arguments('-DCONFIG_USE_LIBPCI_ECAM=1', language: 'c') +else + add_project_arguments('-DCONFIG_USE_LIBPCI_ECAM=0', language: 'c') +endif + if host_machine.system() == 'windows' # Specifying an include_path that doesn't exist is an error, # but we only use this if the library is found in the same directory. -- To view, visit https://review.coreboot.org/c/flashrom/+/83896?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Gerrit-Change-Number: 83896 Gerrit-PatchSet: 8 Gerrit-Owner: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com>

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[M] Change in flashrom[main]: flashchips: Add definitions for Fudan FM25Q04, FM25Q64 and FM25Q128
by Samantaz Fox (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer. Samantaz Fox has posted comments on this change by Samantaz Fox. ( https://review.coreboot.org/c/flashrom/+/83969?usp=email ) Change subject: flashchips: Add definitions for Fudan FM25Q04, FM25Q64 and FM25Q128 ...................................................................... Patch Set 2: (1 comment) File flashchips.c: https://review.coreboot.org/c/flashrom/+/83969/comment/29973fc1_59d12432?us… : PS2, Line 6228: {2700, 3600} > For Q04 and Q64, datasheet says 2.3-3.6V, is there a reason why you put 2.7-3.6 here? […] As I wasn't really sure what to trust* and haven't done any testing to confirm that, I preferred to use the same values as the other FM25Qxx chip definitions. In addition, the comment left on line 6146 ("2.3-2.7V acceptable results in lower performance") for the "FM25F02(A)" leads me to believe that this product range might not have the spec they claim. \* [Fudan's website](https://eng.fmsh.com/442f95b6-77cd-1d42-4f8e-4ddc187481d1/) says that the whole FM25Fxx/FM25Qxx product range should run on 2.3V-3.6V, but the table on that same page contradicts itself (the FM25Q32 is listed as 2.7V-3.6V) and so does multiple datasheets, as you can see. -- To view, visit https://review.coreboot.org/c/flashrom/+/83969?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I88fcc2bbb9706c8adb3722da6aa0e1d2d04c3fde Gerrit-Change-Number: 83969 Gerrit-PatchSet: 2 Gerrit-Owner: Samantaz Fox <coding(a)samantaz.fr> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Thu, 22 Aug 2024 16:01:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[M] Change in flashrom[main]: ch347_spi: Add spi clock frequency selection
by Anastasia Klimchuk (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Nicholas Chin, ZhiYuanNJ. Anastasia Klimchuk has posted comments on this change by ZhiYuanNJ. ( https://review.coreboot.org/c/flashrom/+/82776?usp=email ) Change subject: ch347_spi: Add spi clock frequency selection ...................................................................... Patch Set 13: (1 comment) File ch347_spi.c: https://review.coreboot.org/c/flashrom/+/82776/comment/163c8bd0_3a8f8b02?us… : PS13, Line 291: int speed_index = 2; > Hi, Change here. Yes, I see you changed speed_index, thank you! But have you seen my previous comment, I had one more idea: to remove `int divisor` Which means: remove line 287 remove line 360 line 370 will be: `ch347_spi_config(ch347_data, spispeeds[speed_index].divisor)` The main advantage: you have only one variable to maintain: speed_index. And then later if you need to change the default, you only need to change speed_index. Do you agree? If you don't like the idea for some reasons, please tell me! -- To view, visit https://review.coreboot.org/c/flashrom/+/82776?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If2be48929db540a6598ac0b60b37e64597156db7 Gerrit-Change-Number: 82776 Gerrit-PatchSet: 13 Gerrit-Owner: ZhiYuanNJ Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: ZhiYuanNJ Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Thu, 22 Aug 2024 13:18:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ZhiYuanNJ

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[XS] Change in flashrom[main]: flashchips: add GD25B256E and GD25R256E
by Anastasia Klimchuk (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Nikolai Artemiev, Stefan Reinauer, Victor Lim. Anastasia Klimchuk has posted comments on this change by Victor Lim. ( https://review.coreboot.org/c/flashrom/+/83998?usp=email ) Change subject: flashchips: add GD25B256E and GD25R256E ...................................................................... Patch Set 1: (2 comments) File flashchips.c: https://review.coreboot.org/c/flashrom/+/83998/comment/3aaef22f_b53c17f6?us… : PS1, Line 7461: FEATURE_WRSR_EXT2 From the datasheet you linked, I think `FEATURE_WRSR_EXT2` not needed. `FEATURE_WRSR_EXT2` means that two bytes of status register are read together at the same time. `FEATURE_WRSR2` and `FEATURE_WRSR3` mean that second byte and third byte can be read individually. Which is what I see in the datasheet. Is this correct? Also, I know that this line was here before, but it might be wrong? The models that were in this definition previously were GD25Q256D and GD25Q256E, is it possible that you check their datasheets how status register is read? is it one command for two bytes, or each byte can be read independently? https://review.coreboot.org/c/flashrom/+/83998/comment/cf6034a4_d4f75ddf?us… : PS1, Line 7493: SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD I think this needs SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD if all the models have BP4 -- To view, visit https://review.coreboot.org/c/flashrom/+/83998?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ie733e0c2e35fa4797f5198f2c8334469b65f402c Gerrit-Change-Number: 83998 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Victor Lim <vlim(a)gigadevice.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Thu, 22 Aug 2024 11:00:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in flashrom[main]: flashchips: Update test status for Fudan FM25Q08 and FM25Q128
by Anastasia Klimchuk (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Nikolai Artemiev, Samantaz Fox, Stefan Reinauer. Anastasia Klimchuk has posted comments on this change by Samantaz Fox. ( https://review.coreboot.org/c/flashrom/+/83970?usp=email ) Change subject: flashchips: Update test status for Fudan FM25Q08 and FM25Q128 ...................................................................... Patch Set 2: Code-Review+2 (1 comment) File flashchips.c: https://review.coreboot.org/c/flashrom/+/83970/comment/6db38900_f9aa7bf5?us… : PS1, Line 6243: { .probe = NT, .read = OK, .erase = OK, .write = OK }, > Ah, for some reason I was convinced that flashrom would not probe when `-c name` was passed ^^ I even checked the code :) Yes it still probes when `-c` passed, but only for that one chip which is passed as an argument. You can check, if you run command with `-VV` option (very verbose), it should print "Probing for " and then the name of chip. -- To view, visit https://review.coreboot.org/c/flashrom/+/83970?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ib3c94f03a132a912bb4bb9d36e8783f4468587c4 Gerrit-Change-Number: 83970 Gerrit-PatchSet: 2 Gerrit-Owner: Samantaz Fox <coding(a)samantaz.fr> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Samantaz Fox <coding(a)samantaz.fr> Gerrit-Comment-Date: Thu, 22 Aug 2024 09:45:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Samantaz Fox <coding(a)samantaz.fr>

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[M] Change in flashrom[main]: flashchips: Add definitions for Fudan FM25Q04, FM25Q64 and FM25Q128
by Anastasia Klimchuk (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Nikolai Artemiev, Samantaz Fox, Stefan Reinauer. Anastasia Klimchuk has posted comments on this change by Samantaz Fox. ( https://review.coreboot.org/c/flashrom/+/83969?usp=email ) Change subject: flashchips: Add definitions for Fudan FM25Q04, FM25Q64 and FM25Q128 ...................................................................... Patch Set 2: (2 comments) File flashchips.c: https://review.coreboot.org/c/flashrom/+/83969/comment/79ecc99d_c6b1035b?us… : PS2, Line 6203: /* 128 * 4KB sectors */ Just saying (for future), the comments for eraseblock definitions are not needed. You don't have to change it here, it's fine to keep here. https://review.coreboot.org/c/flashrom/+/83969/comment/d0b62bac_001c9152?us… : PS2, Line 6228: {2700, 3600} For Q04 and Q64, datasheet says 2.3-3.6V, is there a reason why you put 2.7-3.6 here? (for Q128, it is indeed 2.7-3.6V) -- To view, visit https://review.coreboot.org/c/flashrom/+/83969?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I88fcc2bbb9706c8adb3722da6aa0e1d2d04c3fde Gerrit-Change-Number: 83969 Gerrit-PatchSet: 2 Gerrit-Owner: Samantaz Fox <coding(a)samantaz.fr> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Samantaz Fox <coding(a)samantaz.fr> Gerrit-Comment-Date: Thu, 22 Aug 2024 08:53:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in flashrom[main]: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register
by Anastasia Klimchuk (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Hsuan Ting Chen, Kane Chen, Subrata Banik. Anastasia Klimchuk has posted comments on this change by Kane Chen. ( https://review.coreboot.org/c/flashrom/+/83896?usp=email ) Change subject: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: > may i know who can help to merge? […] Kane, thank you for your contribution! Our guidelines about merging patches are documented on official website: https://flashrom.org/dev_guide/development_guide.html#merging-patches In this case, I think everything going well, so I assume Peter will merge this change tomorrow (as you will read in the doc, we are merging 3 days after approval). -- To view, visit https://review.coreboot.org/c/flashrom/+/83896?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Gerrit-Change-Number: 83896 Gerrit-PatchSet: 7 Gerrit-Owner: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Comment-Date: Thu, 22 Aug 2024 05:48:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kane Chen <kane.chen(a)intel.com>

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[S] Change in flashrom[main]: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register
by Kane Chen (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Subrata Banik. Kane Chen has posted comments on this change by Kane Chen. ( https://review.coreboot.org/c/flashrom/+/83896?usp=email ) Change subject: chipset_enable.c: Use PCI_ACCESS_ECAM to access pci register ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: may i know who can help to merge? thank u -- To view, visit https://review.coreboot.org/c/flashrom/+/83896?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4549f87c8b01da0a1d3d8ce0b3b75c1f5fa2cbab Gerrit-Change-Number: 83896 Gerrit-PatchSet: 7 Gerrit-Owner: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 22 Aug 2024 05:06:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in flashrom[main]: ch347_spi: Add spi clock frequency selection
by ZhiYuanNJ (Code Review) 22 Aug '24

22 Aug '24

Attention is currently required from: Anastasia Klimchuk, Nicholas Chin. ZhiYuanNJ has posted comments on this change by ZhiYuanNJ. ( https://review.coreboot.org/c/flashrom/+/82776?usp=email ) Change subject: ch347_spi: Add spi clock frequency selection ...................................................................... Patch Set 13: (1 comment) File ch347_spi.c: https://review.coreboot.org/c/flashrom/+/82776/comment/985562b0_6c3ed199?us… : PS13, Line 291: int speed_index = 2; Hi, Change here. -- To view, visit https://review.coreboot.org/c/flashrom/+/82776?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If2be48929db540a6598ac0b60b37e64597156db7 Gerrit-Change-Number: 82776 Gerrit-PatchSet: 13 Gerrit-Owner: ZhiYuanNJ Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Thu, 22 Aug 2024 03:08:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in flashrom[main]: doc: Remove leftover reference to building_with_make
by Anastasia Klimchuk (Code Review) 22 Aug '24

22 Aug '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/83942?usp=email ) Change subject: doc: Remove leftover reference to building_with_make ...................................................................... doc: Remove leftover reference to building_with_make Change-Id: If6d3580972ea7d42503004b922b90829025bd62d Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/83942 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> --- M doc/user_docs/example_partial_wp.rst 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Peter Marheine: Looks good to me, approved diff --git a/doc/user_docs/example_partial_wp.rst b/doc/user_docs/example_partial_wp.rst index 67a382a..811c772 100644 --- a/doc/user_docs/example_partial_wp.rst +++ b/doc/user_docs/example_partial_wp.rst @@ -14,8 +14,8 @@ Write-protect manipulation functionality is included in flashrom since release v1.3.0. If for any reasons you need the latest code from head, you might need to build :code:`flashrom` -from scratch. The following docs describe how to do this :doc:`/dev_guide/building_from_source` and -:doc:`/dev_guide/building_with_make`. See also :doc:`/dev_guide/development_guide`. +from scratch. The following doc describe how to do this: :doc:`/dev_guide/building_from_source`. +See also :doc:`/dev_guide/development_guide`. Alternatively, your operating system might provide development version of :code:`flashrom` as a package. -- To view, visit https://review.coreboot.org/c/flashrom/+/83942?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If6d3580972ea7d42503004b922b90829025bd62d Gerrit-Change-Number: 83942 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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