May 2024 - flashrom-gerrit - mail.coreboot.org

[S] Change in flashrom[main]: Make sleep threshold for delays configurable
by Anastasia Klimchuk (Code Review) May 3, 2024

May 3, 2024

Attention is currently required from: Peter Marheine, Thomas Heijligen. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81606?usp=email ) Change subject: Make sleep threshold for delays configurable ...................................................................... Patch Set 4: (2 comments) File tests/udelay.c: https://review.coreboot.org/c/flashrom/+/81606/comment/fa51b879_bd7bdbb4 : PS2, Line 52: if (delay_us >= CONFIG_DELAY_MINIMUM_SLEEP_US) > The test always takes at least as long to run as the chosen delay time, so 0. […] I am now re-reading and don't understand myself what I was asking :D File udelay_dos.c: https://review.coreboot.org/c/flashrom/+/81606/comment/6bf73c6e_85bac27b : PS4, Line 161: CONFIG_DELAY_MINIMUM_SLEEP_US probably also needs the same `static const` trick? -- To view, visit https://review.coreboot.org/c/flashrom/+/81606?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ida96e0816ac914ed69d6fd82ad90ebe89cdef1cc Gerrit-Change-Number: 81606 Gerrit-PatchSet: 4 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Fri, 03 May 2024 08:10:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in flashrom[main]: flashchips.c: Add support for XM25RU256C
by Anastasia Klimchuk (Code Review) May 3, 2024

May 3, 2024

Attention is currently required from: Georg Gottleuber, Nikolai Artemiev, Stefan Reinauer. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/82101?usp=email ) Change subject: flashchips.c: Add support for XM25RU256C ...................................................................... Patch Set 1: (2 comments) Patchset: PS1: Thank you! Do you have a link to the datasheet for the chip? File flashchips.c: https://review.coreboot.org/c/flashrom/+/82101/comment/1fde39ab_ce0b513c : PS1, Line 21731: TEST_UNTESTED You tested it, from the logs your provided you did probe, read, write, so this should be `TEST_OK_PREW` -- To view, visit https://review.coreboot.org/c/flashrom/+/82101?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I431474a662304d09438e274706d3fc9cfbbe0bd6 Gerrit-Change-Number: 82101 Gerrit-PatchSet: 1 Gerrit-Owner: Georg Gottleuber <ggo(a)tuxedo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Georg Gottleuber <ggo(a)tuxedo.de> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Fri, 03 May 2024 07:46:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in flashrom[main]: doc: Convert serprog docs to rst and add to doc directory
by Stefan Reinauer (Code Review) May 3, 2024

May 3, 2024

Attention is currently required from: Anastasia Klimchuk, J. Neuschäfer, Riku Viitanen, Swift Geek (Sebastian Grzywna), Thomas Heijligen, Urja Rannikko. Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/82018?usp=email ) Change subject: doc: Convert serprog docs to rst and add to doc directory ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/82018?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ie52f1e051ed215d61d5fb535e3eddeac71f64d13 Gerrit-Change-Number: 82018 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Sydney <git(a)funkeleinhorn.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: J. Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Attention: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Attention: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Attention: J. Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Fri, 03 May 2024 05:21:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L1633E
by Anastasia Klimchuk (Code Review) May 3, 2024

May 3, 2024

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/81836?usp=email ) Change subject: flashchips: Add support for MXIC MX25L1633E ...................................................................... flashchips: Add support for MXIC MX25L1633E The MX25L1633E has been tested by ch341a programmer : read, write, erase and wp. We have tested --wp-enable, --wp-disable, --wp-list and --wp-range commands for write-protect feature. MX25L1633E datasheet is available at the following URL: https://www.macronix.com/Lists/Datasheet/Attachments/8617/MX25L1633E,%203V,… Change-Id: I63ee0182ad6e62b7408136285aa0e927d53f7bc8 Signed-off-by: DanielZhang <danielzhang(a)mxic.com.cn> Reviewed-on: https://review.coreboot.org/c/flashrom/+/81836 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M flashchips.c M include/flashchips.h 2 files changed, 44 insertions(+), 1 deletion(-) Approvals: Anastasia Klimchuk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/flashchips.c b/flashchips.c index 80355e4..041ac40 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9374,6 +9374,49 @@ { .vendor = "Macronix", + .name = "MX25L1633E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L1635D, + .total_size = 2048, + .page_size = 256, + /* OTP: 64B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP , + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", .name = "MX25L1635E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, diff --git a/include/flashchips.h b/include/flashchips.h index 2add46d..6008ad1 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -518,7 +518,7 @@ #define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6408E (4k 0x20); MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E (4k 0x20, 32k 0x52) */ #define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E, MX25L12873F, MX25L12833F, MX25L12850F (32k 0x52) */ #define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */ -#define MACRONIX_MX25L1635D 0x2415 +#define MACRONIX_MX25L1635D 0x2415 /* MX25L1633E */ #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ #define MACRONIX_MX66L51235F 0x201a /* MX66L51235F, MX25L51245G */ #define MACRONIX_MX66L1G45G 0x201b /* MX66L1G45G */ -- To view, visit https://review.coreboot.org/c/flashrom/+/81836?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I63ee0182ad6e62b7408136285aa0e927d53f7bc8 Gerrit-Change-Number: 81836 Gerrit-PatchSet: 6 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in flashrom[main]: flashrom: Change chip unlock error to warning
by Nikolai Artemiev (Code Review) May 3, 2024

May 3, 2024

Attention is currently required from: Anastasia Klimchuk, Brian Norris. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/82175?usp=email ) Change subject: flashrom: Change chip unlock error to warning ...................................................................... Patch Set 1: Verified+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/82175?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I14c3b55e387443909ca1efab2fc1901f87dd66d6 Gerrit-Change-Number: 82175 Gerrit-PatchSet: 1 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 03 May 2024 00:54:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: flashrom: Change chip unlock error to warning
by Nikolai Artemiev (Code Review) May 3, 2024

May 3, 2024

Nikolai Artemiev has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/82175?usp=email ) Change subject: flashrom: Change chip unlock error to warning ...................................................................... flashrom: Change chip unlock error to warning Failing to disable WP before write/erase doesn't necessarily indicate an error and flashrom doesn't treat it as such. Print a warning instead on an error. BUG=b:336220545 BRANCH=none TEST=build Change-Id: I14c3b55e387443909ca1efab2fc1901f87dd66d6 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M flashrom.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/82175/1 diff --git a/flashrom.c b/flashrom.c index 630c69d..39c3612 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2092,7 +2092,7 @@ warn_out: if (ret) - msg_cerr("Failed to unlock flash status reg with wp support.\n"); + msg_cwarn("Failed to unlock flash status reg with wp support.\n"); return ret; } -- To view, visit https://review.coreboot.org/c/flashrom/+/82175?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I14c3b55e387443909ca1efab2fc1901f87dd66d6 Gerrit-Change-Number: 82175 Gerrit-PatchSet: 1 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newchange

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[XS] Change in flashrom[main]: flashrom_udev.rules: Add rule for CH347
by Nicholas Chin (Code Review) May 3, 2024

May 3, 2024

Nicholas Chin has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/82162?usp=email ) Change subject: flashrom_udev.rules: Add rule for CH347 ...................................................................... flashrom_udev.rules: Add rule for CH347 This allows the CH347 programmer to be used without root permissions. Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> Change-Id: Ia83fa08f6d7c2f449b1a5c0c387c6d4368b99e3a --- M util/flashrom_udev.rules 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/82162/1 diff --git a/util/flashrom_udev.rules b/util/flashrom_udev.rules index 9fd3330..331fee6 100644 --- a/util/flashrom_udev.rules +++ b/util/flashrom_udev.rules @@ -93,4 +93,7 @@ # Winchiphead (WCH) CH341a based programmer ATTRS{idVendor}=="1a86", ATTRS{idProduct}=="5512", MODE="664", GROUP="plugdev" +# Winchiphead (WCH) CH347 based programmer +ATTRS{idVendor}=="1a86", ATTRS{idProduct}=="55db", MODE="664", GROUP="plugdev" + LABEL="flashrom_rules_end" -- To view, visit https://review.coreboot.org/c/flashrom/+/82162?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ia83fa08f6d7c2f449b1a5c0c387c6d4368b99e3a Gerrit-Change-Number: 82162 Gerrit-PatchSet: 1 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake
by Hsuan-ting Chen (Code Review) May 2, 2024

May 2, 2024

Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Subrata Banik. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81357?usp=email ) Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ...................................................................... Patch Set 12: (1 comment) File ichspi.c: https://review.coreboot.org/c/flashrom/+/81357/comment/599f5715_b3596c79 : PS10, Line 1854: *region_write_access = mmio_readw(ich_spibar + ICH_REG_BIOS_BM_WAP); > Done For your reference, the output would like ``` 0x118: 0x00c2 (BIOS_BM_RAP) 0x11a: 0x0042 (BIOS_BM_WAP) ``` If it is the default value https://edc.intel.com/content/www/de/de/design/publications/14th-generation… https://edc.intel.com/content/www/de/de/design/publications/14th-generation… -- To view, visit https://review.coreboot.org/c/flashrom/+/81357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Gerrit-Change-Number: 81357 Gerrit-PatchSet: 12 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 02 May 2024 12:39:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hsuan-ting Chen <roccochen(a)google.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake
by Hsuan-ting Chen (Code Review) May 2, 2024

May 2, 2024

Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Subrata Banik. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81357?usp=email ) Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ...................................................................... Patch Set 12: (11 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/81357/comment/6d3a3826_39bbca85 : PS10, Line 28: > Is MTL a Meteor Lake and ADL Alder Point? YES Sure, let me add a test for APL. (apollo lake) File ichspi.c: https://review.coreboot.org/c/flashrom/+/81357/comment/5ba96866_bb53f848 : PS10, Line 1853: mmio_readw > Why it is `readw` (reads into uint16_t) here, but `readl` below (reads into uint32_t)? […] You could see the document of Intel Core Ultra: For `BIOS_BM_RAP` and `BIOS_BM_WAP`: https://edc.intel.com/content/www/de/de/design/publications/14th-generation… ``` +-----------+--------------------------------------+ | Bit Range | Filed Name and Description | +-----------+--------------------------------------+ | 31:16 | Reserved | +-----------+--------------------------------------+ | 15:0 | BIOSS Master Read Access Permissions | +-----------+--------------------------------------+ ``` As only bits 15:0 are meaningful, using `mmio_readw()` (which reads 16 bits) is sufficient. (There are also a maximum of 15 regions at present.) For `FRAP`: https://www.intel.sg/content/dam/doc/datasheet/io-controller-hub-9-datashee… page 827 ``` +-----------+--------------------------------------+-------------+ | Bit Range | Filed Name and Description | In flashrom | +-----------+--------------------------------------+-------------+ | 31:24 | BIOS Master Write Access Grant | ICH_BMWAG() | +-----------+--------------------------------------+-------------+ | 23:16 | BIOS Master Read Access Grant | ICH_BMRAG() | +-----------+--------------------------------------+-------------+ | 15:8 | BIOS Region Write Access | ICH_BRWA() | +-----------+--------------------------------------+-------------+ | 7:0 | BIOS Region Read Access | ICH_BRRA() | +-----------+--------------------------------------+-------------+ ``` As we need all 32 bits, using `mmio_readl()` (which reads 32 bits) is necessary. Therefore, I suggest using `region_read_access` and `region_write_access` as `uint16_t*`, rather than changing any of the current `mmio_read` functions. https://review.coreboot.org/c/flashrom/+/81357/comment/bafbee7d_a43f666b : PS10, Line 1854: *region_write_access = mmio_readw(ich_spibar + ICH_REG_BIOS_BM_WAP); > Maybe you can also add some debugging prints in this branch too Done https://review.coreboot.org/c/flashrom/+/81357/comment/7ab01994_497a6e1e : PS10, Line 1876: inline > I don't think this needs to be inline? Done Could I know if there's any concern of inline it? https://review.coreboot.org/c/flashrom/+/81357/comment/4467c8a7_b696bbcc : PS10, Line 1877: if (ich_generation >= CHIPSET_METEOR_LAKE) : return 16; : return 8; > maybe make it one line […] Done https://review.coreboot.org/c/flashrom/+/81357/comment/d08d8da3_5a41563d : PS10, Line 2109: case CHIPSET_METEOR_LAKE: > Let's re-order Meteor Lake here too Done https://review.coreboot.org/c/flashrom/+/81357/comment/3f3bbbae_7ad5fcd5 : PS10, Line 2149: case CHIPSET_METEOR_LAKE: > and here Done https://review.coreboot.org/c/flashrom/+/81357/comment/4d25f45a_f00ff889 : PS10, Line 2211: case CHIPSET_METEOR_LAKE: > and here Done https://review.coreboot.org/c/flashrom/+/81357/comment/dddfd728_c6289bb2 : PS10, Line 2229: > you can leave the word "registers", so that it is "... […] Done https://review.coreboot.org/c/flashrom/+/81357/comment/099ee78e_80fb4172 : PS10, Line 2291: case CHIPSET_METEOR_LAKE: > and here Done https://review.coreboot.org/c/flashrom/+/81357/comment/1e511f27_37e13d65 : PS10, Line 2331: case CHIPSET_METEOR_LAKE: > and here Done -- To view, visit https://review.coreboot.org/c/flashrom/+/81357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Gerrit-Change-Number: 81357 Gerrit-PatchSet: 12 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 02 May 2024 11:50:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake
by Hsuan-ting Chen (Code Review) May 2, 2024

May 2, 2024

Attention is currently required from: Hsuan-ting Chen, Subrata Banik. Hello Anastasia Klimchuk, Hsuan Ting Chen, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/81357?usp=email to look at the new patch set (#11). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ...................................................................... ichspi.c: Add support for region 9 and beyond in Meteor Lake Since Meteor Lake, configuring region access for FREG9 and higher is necessary. This configuration is determined using BIOS_BM registers: BIOS_BM_RAP (Offset 0x118): BIOS Master Read Access Permissions. Each bit [15:0] corresponds to a region [15:0]. A set bit grants BIOS master read access. BIOS_BM_WAP (Offset 0x11c): BIOS Master Write Access Permissions. Each bit [15:0] corresponds to a region [15:0]. A set bit grants BIOS master write/erase access. Move CHIPSET_METEOR_LAKE to the bottom of the ich_chipset list to ensure that all the newer chipsets in the future will use BIOS_BM check by default. BUG=b:319773700, b:304439294 BUG=b:319336080 TEST=On MTL, use flashrom -VV to see correct FREG9 access TEST=On ADL, use flashrom -VV to see not break anything TEST=On APL, use flashrom -VV to see not break anything Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Signed-off-by: Hsuan Ting Chen <roccochen(a)chromium.org> --- M ichspi.c M include/programmer.h 2 files changed, 67 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/81357/11 -- To view, visit https://review.coreboot.org/c/flashrom/+/81357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Gerrit-Change-Number: 81357 Gerrit-PatchSet: 11 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-MessageType: newpatchset

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