March 2024 - flashrom-gerrit - mail.coreboot.org

[S] Change in flashrom[main]: udelay: clock_getres() does not provide clock_gettime() resolution
by Anastasia Klimchuk (Code Review) 22 Mar '24

22 Mar '24

Attention is currently required from: Brian Norris, Chen, Nikolai Artemiev, Peter Marheine, Stefan Reinauer. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/80806?usp=email ) Change subject: udelay: clock_getres() does not provide clock_gettime() resolution ...................................................................... Patch Set 3: (2 comments) Patchset: PS3: > Although I use macOS, I can't give an answer to this question. […] Thanks for quick response anyway, I appreciate it! (sorry my response wasn't that quick) PS3: Peter, I wanted to ask you, maybe you have some thoughts on this, you have experience with non-Linux. Thank you! -- To view, visit https://review.coreboot.org/c/flashrom/+/80806?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Icdc6e184eacb14d3bd27029e3fc75be4431d82b4 Gerrit-Change-Number: 80806 Gerrit-PatchSet: 3 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Chen <c(a)jia.je> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Chen <c(a)jia.je> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Fri, 22 Mar 2024 03:38:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Chen <c(a)jia.je> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: cli_common: Add link to the documentation how to mark chip tested
by Anastasia Klimchuk (Code Review) 21 Mar '24

21 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/81266?usp=email ) Change subject: cli_common: Add link to the documentation how to mark chip tested ...................................................................... cli_common: Add link to the documentation how to mark chip tested Perhaps some of the users will be able to follow the instructions and send a patch to mark chip as tested. The option to send report to the mailing list remains available as before. Change-Id: I36105725058f2fecb82408c369b70b3324502ece Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/81266 Reviewed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> --- M cli_common.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: Peter Marheine: Looks good to me, approved Sergii Dmytruk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/cli_common.c b/cli_common.c index 5373585..afcd1f3 100644 --- a/cli_common.c +++ b/cli_common.c @@ -80,6 +80,8 @@ "work correctly for you with this flash chip. Please include the flashrom log\n" "file for all operations you tested (see the man page for details), and mention\n" "which mainboard or programmer you tested in the subject line.\n" + "You can also try to follow the instructions here:\n" + "https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html\n" "Thanks for your help!\n"); } } -- To view, visit https://review.coreboot.org/c/flashrom/+/81266?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I36105725058f2fecb82408c369b70b3324502ece Gerrit-Change-Number: 81266 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in flashrom[main]: flashchips: Add Zetta Device ZD25LQ128
by Anton Samsonov (Code Review) 21 Mar '24

21 Mar '24

Anton Samsonov has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81392?usp=email ) Change subject: flashchips: Add Zetta Device ZD25LQ128 ...................................................................... flashchips: Add Zetta Device ZD25LQ128 Datasheet: http://www.zettadevice.com/uploads/files/163410630201e3483211247ac1.pdf Tested probe, read, erase, write, verify on ZD25LQ128AWIG chips using Linux SPI and DediProg SF100 programmers. Renamed ZETTADEVICE_ macros to ZETTA_ to accomodate longer suffixes. Change-Id: I5cb20158e81ab109f16958285b8787858efb4831 Signed-off-by: Anton Samsonov <devel(a)zxlab.ru> --- M flashchips.c M include/flashchips.h 2 files changed, 46 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/81392/1 diff --git a/flashchips.c b/flashchips.c index 204f34f..74953d1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -21593,8 +21593,8 @@ .vendor = "Zetta Device", .name = "ZD25D20", .bustype = BUS_SPI, - .manufacture_id = ZETTADEVICE_ID, - .model_id = ZETTADEVICE_ZD25D20, + .manufacture_id = ZETTA_ID, + .model_id = ZETTA_ZD25D20, .total_size = 256, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, @@ -21631,8 +21631,8 @@ .vendor = "Zetta Device", .name = "ZD25D40", .bustype = BUS_SPI, - .manufacture_id = ZETTADEVICE_ID, - .model_id = ZETTADEVICE_ZD25D40, + .manufacture_id = ZETTA_ID, + .model_id = ZETTA_ZD25D40, .total_size = 512, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, @@ -21666,6 +21666,44 @@ }, { + .vendor = "Zetta Device", + .name = "ZD25LQ128", + .bustype = BUS_SPI, + .manufacture_id = ZETTA_ID, + .model_id = ZETTA_ZD25LQ128_REMS, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = PROBE_SPI_REMS, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ + .unlock = SPI_DISABLE_BLOCKPROTECT, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {1650, 1950}, + }, + + { .vendor = "Unknown", .name = "SFDP-capable chip", .bustype = BUS_SPI, diff --git a/include/flashchips.h b/include/flashchips.h index d0a858b..932e458 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -1055,8 +1055,9 @@ #define XTX_XT25F02E 0x4012 #define XTX_XT25F64B 0x4017 -#define ZETTADEVICE_ID 0xBA /* Zetta Device */ -#define ZETTADEVICE_ZD25D20 0x2012 -#define ZETTADEVICE_ZD25D40 0x2013 +#define ZETTA_ID 0xBA /* Zetta Device */ +#define ZETTA_ZD25D20 0x2012 +#define ZETTA_ZD25D40 0x2013 +#define ZETTA_ZD25LQ128_REMS 0x17 /* RDID = 0x4218 */ #endif /* !FLASHCHIPS_H */ -- To view, visit https://review.coreboot.org/c/flashrom/+/81392?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I5cb20158e81ab109f16958285b8787858efb4831 Gerrit-Change-Number: 81392 Gerrit-PatchSet: 1 Gerrit-Owner: Anton Samsonov <devel(a)zxlab.ru> Gerrit-MessageType: newchange

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[XS] Change in flashrom[main]: serprog: Fix scan-build warning of resource leak
by Anastasia Klimchuk (Code Review) 21 Mar '24

21 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/81032?usp=email ) Change subject: serprog: Fix scan-build warning of resource leak ...................................................................... serprog: Fix scan-build warning of resource leak Warning found by the latest scan-build run: *** CID 1534883: (RESOURCE_LEAK) /serprog.c: 853 in serprog_init() 847 "by programmer!\n", cs_num8); 848 goto init_err_cleanup_exit; 849 } 850 } 851 bt = serprog_buses_supported; 852 if (sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL)) >>>CID 1534883: (RESOURCE_LEAK) >>>Variable "cs" going out of scope leaks the storage it points to. 853 goto init_err_cleanup_exit; 854 } Follow up on commit e8c350f55e596aae3ab2bbc210b68389e2301a6c Change-Id: Id9cf211de3c482f702adebfcfa274a183c83a33f Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/81032 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Alexander Goncharov <chat(a)joursoir.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- M serprog.c 1 file changed, 4 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Alexander Goncharov: Looks good to me, but someone else must approve Stefan Reinauer: Looks good to me, approved diff --git a/serprog.c b/serprog.c index c2965c5..f738ef3 100644 --- a/serprog.c +++ b/serprog.c @@ -835,9 +835,9 @@ free(cs); goto init_err_cleanup_exit; } - free(cs); if (!sp_check_commandavail(S_CMD_S_SPI_CS)) { msg_perr("Error: Setting SPI chip select is not supported!\n"); + free(cs); goto init_err_cleanup_exit; } msg_pdbg(MSGHEADER "Requested to use chip select %lu.\n", cs_num); @@ -845,9 +845,12 @@ if (sp_docommand(S_CMD_S_SPI_CS, 1, &cs_num8, 0, NULL)) { msg_perr("Error: Chip select %u not supported " "by programmer!\n", cs_num8); + free(cs); goto init_err_cleanup_exit; } } + free(cs); + bt = serprog_buses_supported; if (sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL)) goto init_err_cleanup_exit; -- To view, visit https://review.coreboot.org/c/flashrom/+/81032?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Id9cf211de3c482f702adebfcfa274a183c83a33f Gerrit-Change-Number: 81032 Gerrit-PatchSet: 4 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L12850F
by DZ (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Alexander Goncharov, Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer. DZ has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81350?usp=email ) Change subject: flashchips: Add support for MXIC MX25L12850F ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Why do you need to add this chip as a standalone entry? It's really similar to `MX25L12833F/MX25L128 […] MX25L12845E and MX25L12865E have no configuration register. -- To view, visit https://review.coreboot.org/c/flashrom/+/81350?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I71ac70d273904f94d015401f9d8df587084efad0 Gerrit-Change-Number: 81350 Gerrit-PatchSet: 1 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Thu, 21 Mar 2024 01:14:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alexander Goncharov <chat(a)joursoir.net> Gerrit-MessageType: comment

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L12850F
by Alexander Goncharov (Code Review) 20 Mar '24

20 Mar '24

Attention is currently required from: Anastasia Klimchuk, DZ, Nikolai Artemiev, Stefan Reinauer. Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81350?usp=email ) Change subject: flashchips: Add support for MXIC MX25L12850F ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Why do you need to add this chip as a standalone entry? It's really similar to `MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F`, the only differences are: 1. Extra flag in `feature_bits` 2. Specified `reg_bits` 3. Specified `decode_range` But quick research through these chips shows me that these changes can be applied to them as well. Does something go wrong when you use the entry I mentioned before? -- To view, visit https://review.coreboot.org/c/flashrom/+/81350?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I71ac70d273904f94d015401f9d8df587084efad0 Gerrit-Change-Number: 81350 Gerrit-PatchSet: 1 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: DZ <danielzhang(a)mxic.com.cn> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 20 Mar 2024 15:36:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: serprog: Fix scan-build warning of resource leak
by Alexander Goncharov (Code Review) 20 Mar '24

20 Mar '24

Attention is currently required from: Anastasia Klimchuk, Riku Viitanen. Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81032?usp=email ) Change subject: serprog: Fix scan-build warning of resource leak ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/81032?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Id9cf211de3c482f702adebfcfa274a183c83a33f Gerrit-Change-Number: 81032 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 20 Mar 2024 14:58:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L12850F
by DZ (Code Review) 20 Mar '24

20 Mar '24

DZ has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81350?usp=email ) Change subject: flashchips: Add support for MXIC MX25L12850F ...................................................................... flashchips: Add support for MXIC MX25L12850F The MX25L12850F has been tested by ch341a programmer : read, write, erase and wp. MX25L12850F datasheet is available at the following URL: https://www.macronix.com/Lists/Datasheet/Attachments/8632/MX25L12850F,%203V… Change-Id: I71ac70d273904f94d015401f9d8df587084efad0 Signed-off-by: DanielZhang <danielzhang(a)mxic.com.cn> --- M flashchips.c 1 file changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/50/81350/1 diff --git a/flashchips.c b/flashchips.c index 204f34f..0c4bc39 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9045,6 +9045,52 @@ { .vendor = "Macronix", + .name = "MX25L12850F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L12805D, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", .name = "MX25L1605", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, -- To view, visit https://review.coreboot.org/c/flashrom/+/81350?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I71ac70d273904f94d015401f9d8df587084efad0 Gerrit-Change-Number: 81350 Gerrit-PatchSet: 1 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-MessageType: newchange

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[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake
by Subrata Banik (Code Review) 20 Mar '24

20 Mar '24

Attention is currently required from: Hsuan-ting Chen. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81357?usp=email ) Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ...................................................................... Patch Set 2: (1 comment) File ichspi.c: https://review.coreboot.org/c/flashrom/+/81357/comment/82abe3d6_838d31df : PS1, Line 1848: case CHIPSET_METEOR_LAKE: > It was your previous CL that put MTL in that position For sure that is my CL which added MTL after ADL but there is no such restriction to maintain the order. You can move the macro at the end of the list. > (https://review.coreboot.org/c/flashrom/+/62783) Could you share if (1) We could move it to the very end Please move MTL as the end so we can add LNL and PTL after MTL. > (2) Will there be any other chipset name which will be moved to make the order makes sense? Looking at ur current logic, i felt the MTL is the first SOC where we would like to enable this support hence, moving MTL is okay and new Intel SOC can be added after MTL so, the suggested logic (by me) works w/o any maintenance burden. -- To view, visit https://review.coreboot.org/c/flashrom/+/81357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Gerrit-Change-Number: 81357 Gerrit-PatchSet: 2 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Comment-Date: Wed, 20 Mar 2024 03:15:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-MessageType: comment

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[S] Change in flashrom[main]: doc/dev_guide: Add section about Jenkins build, and scan-build
by Peter Marheine (Code Review) 19 Mar '24

19 Mar '24

Attention is currently required from: Anastasia Klimchuk, Thomas Heijligen. Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81261?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: doc/dev_guide: Add section about Jenkins build, and scan-build ...................................................................... Patch Set 1: (1 comment) File doc/dev_guide/development_guide.rst: https://review.coreboot.org/c/flashrom/+/81261/comment/c9bbd0f9_62450e2c : PS1, Line 226: need to "should" seems better, since you're saying authors should review the report but aren't required to. -- To view, visit https://review.coreboot.org/c/flashrom/+/81261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I416b632c55d1ceb925456ac8c8947dfbcef2e888 Gerrit-Change-Number: 81261 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Tue, 19 Mar 2024 22:54:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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