flashrom-gerrit March 2024

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[XS] Change in flashrom[main]: serprog: clean up documentation
by Anastasia Klimchuk (Code Review) 01 Mar '24

01 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/80499?usp=email ) Change subject: serprog: clean up documentation ...................................................................... serprog: clean up documentation * serprog.h doesn't exist, so refer to .c source instead * in the doc, no other command has S_CMD_ prefix either Change-Id: Ic83e7fd80840f2db0b006935a964721da0388068 Signed-off-by: Riku Viitanen <riku.viitanen(a)protonmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/80499 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M Documentation/serprog-protocol.txt 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: Anastasia Klimchuk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/Documentation/serprog-protocol.txt b/Documentation/serprog-protocol.txt index d58b8e9..3d4aa1a 100644 --- a/Documentation/serprog-protocol.txt +++ b/Documentation/serprog-protocol.txt @@ -84,7 +84,7 @@ lower than the one requested. If there is no lower frequency available the lowest possible should be used. The value chosen is sent back in the reply with an ACK. - 0x15 (S_CMD_S_PIN_STATE): + 0x15 (S_PIN_STATE): Sets the state of the pin drivers connected to the flash chip. Disabling them allows other devices (e.g. a mainboard's chipset) to access the chip. This way the serprog controller can remain attached to the flash chip even when the board is running. The user is responsible to @@ -103,4 +103,4 @@ In addition, support for these commands is recommended: S_CMD_Q_PGMNAME, S_CMD_Q_BUSTYPE, S_CMD_Q_CHIPSIZE (if parallel). -See also serprog.h. +See also serprog.c -- To view, visit https://review.coreboot.org/c/flashrom/+/80499?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ic83e7fd80840f2db0b006935a964721da0388068 Gerrit-Change-Number: 80499 Gerrit-PatchSet: 4 Gerrit-Owner: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[main]: serprog: Add support for multiple SPI chip selects
by Anastasia Klimchuk (Code Review) 01 Mar '24

01 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/80498?usp=email ) Change subject: serprog: Add support for multiple SPI chip selects ...................................................................... serprog: Add support for multiple SPI chip selects Tested with an EliteBook 8560w, Pi Pico, and my serprog firmware: https://codeberg.org/Riku_V/pico-serprog/ As seen on Flashprog: https://review.sourcearcade.org/c/flashprog/+/51 Change-Id: If8052bc6f5c314dcc493bc083bb8270723efaae7 Signed-off-by: Riku Viitanen <riku.viitanen(a)protonmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/80498 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M Documentation/serprog-protocol.txt M doc/classic_cli_manpage.rst M serprog.c 3 files changed, 39 insertions(+), 1 deletion(-) Approvals: Anastasia Klimchuk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/Documentation/serprog-protocol.txt b/Documentation/serprog-protocol.txt index 6b7e7e3..d58b8e9 100644 --- a/Documentation/serprog-protocol.txt +++ b/Documentation/serprog-protocol.txt @@ -35,6 +35,7 @@ + slen bytes of data 0x14 Set SPI clock frequency in Hz 32-bit requested frequency ACK + 32-bit set frequency / NAK 0x15 Toggle flash chip pin drivers 8-bit (0 disable, else enable) ACK / NAK +0x16 Set SPI Chip Select 8-bit ACK / NAK 0x?? unimplemented command - invalid. @@ -89,6 +90,9 @@ remain attached to the flash chip even when the board is running. The user is responsible to NOT connect VCC and other permanently externally driven signals to the programmer as needed. If the value is 0, then the drivers should be disabled, otherwise they should be enabled. + 0x16 (S_SPI_CS): + Set which SPI Chip Select pin to use. This operation is immediate, + meaning it doesn't use the operation buffer. About mandatory commands: The only truly mandatory commands for any device are 0x00, 0x01, 0x02 and 0x10, but one can't really do anything with these commands. diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst index 0cd45ca..c46edf6 100644 --- a/doc/classic_cli_manpage.rst +++ b/doc/classic_cli_manpage.rst @@ -741,6 +741,14 @@ flashrom -p serprog:dev=/dev/device:baud,spispeed=2M +Optional ``cs`` parameter can be used to switch which chip select number is used. This allows connecting multiple +chips at once and selecting which one to flash by software means (rather than rewiring):: + + flashrom -p serprog:dev=/dev/device:baud,cs=0 + +The particular programmer implementation needs to support this feature, for it to work. If the requested chip +select isn't available, flashrom will fail safely. + More information about serprog is available in **serprog-protocol.txt** in the source distribution. diff --git a/serprog.c b/serprog.c index b51f0cf..c2965c5 100644 --- a/serprog.c +++ b/serprog.c @@ -3,6 +3,7 @@ * * Copyright (C) 2009, 2011 Urja Rannikko <urjaman(a)gmail.com> * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2024 Riku Viitanen <riku.viitanen(a)protonmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -63,6 +64,7 @@ #define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ #define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ #define S_CMD_S_PIN_STATE 0x15 /* Enable/disable output drivers */ +#define S_CMD_S_SPI_CS 0x16 /* Set SPI chip select to use */ #define MSGHEADER "serprog: " @@ -742,7 +744,7 @@ /* Check for the minimum operational set of commands. */ if (serprog_buses_supported & BUS_SPI) { uint8_t bt = BUS_SPI; - char *spispeed; + char *spispeed, *cs; if (sp_check_commandavail(S_CMD_O_SPIOP) == 0) { msg_perr("Error: SPI operation not supported while the " "bustype is SPI\n"); @@ -822,6 +824,30 @@ } } free(spispeed); + cs = extract_programmer_param_str(cfg, "cs"); + if (cs && strlen(cs)) { + char *endptr = NULL; + errno = 0; + unsigned long cs_num = strtoul(cs, &endptr, 0); + if (errno || *endptr || cs_num > 255) { + msg_perr("Error: Invalid chip select requested! " + "Only 0-255 are valid.\n"); + free(cs); + goto init_err_cleanup_exit; + } + free(cs); + if (!sp_check_commandavail(S_CMD_S_SPI_CS)) { + msg_perr("Error: Setting SPI chip select is not supported!\n"); + goto init_err_cleanup_exit; + } + msg_pdbg(MSGHEADER "Requested to use chip select %lu.\n", cs_num); + uint8_t cs_num8 = cs_num; + if (sp_docommand(S_CMD_S_SPI_CS, 1, &cs_num8, 0, NULL)) { + msg_perr("Error: Chip select %u not supported " + "by programmer!\n", cs_num8); + goto init_err_cleanup_exit; + } + } bt = serprog_buses_supported; if (sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL)) goto init_err_cleanup_exit; -- To view, visit https://review.coreboot.org/c/flashrom/+/80498?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If8052bc6f5c314dcc493bc083bb8270723efaae7 Gerrit-Change-Number: 80498 Gerrit-PatchSet: 4 Gerrit-Owner: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in flashrom[main]: udelay: Lower the sleep vs delay threshold
by Brian Norris (Code Review) 01 Mar '24

01 Mar '24

Brian Norris has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/80808?usp=email ) Change subject: udelay: Lower the sleep vs delay threshold ...................................................................... udelay: Lower the sleep vs delay threshold By default, we busy-loop (a.k.a., "delay") for most delay values, and only allow sleeping for large delays. But busy-looping is expensive, as it wastes CPU cycles. In a simple program that runs a bunch of samples of [1] over 1000 samples, I find that for 0.1 s (100000 us): 64x2 AMD CPU (CONFIG_HZ=250 / CONFIG_NO_HZ_FULL=y): min diff: 60 us max diff: 831 us mean diff: 135 us 4+2 Mediatek MT8183 CPU (CONFIG_HZ=1000 / CONFIG_NO_HZ_IDLE=y / sysctl kernel.timer_highres=1): min diff: 70 us max diff: 1556 us mean diff: 146 us 4+2 Mediatek MT8183 CPU (CONFIG_HZ=1000 / CONFIG_NO_HZ_IDLE=y / sysctl kernel.timer_highres=0): min diff: 94 us max diff: 7222 us mean diff: 1201 us i.e., maximum 1.5% error, typically ~0.1% error with high resolution timers. Max 7% error, typical 1% error with low resolution timers. This seems reasonable. [1] Stripped / pseudocode: clock_gettime(CLOCK_MONOTONIC, before); nanosleep({ .tv_nsec = usecs * 1000 }, NULL); clock_gettime(CLOCK_MONOTONIC, after); diff = abs((after - before) / 1000 - usecs)); Change-Id: Ifd4821c66c5564f7c975c08769a6742f645e9be0 Signed-off-by: Brian Norris <briannorris(a)chromium.org> --- M udelay.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/08/80808/1 diff --git a/udelay.c b/udelay.c index 0005d39..c42de25 100644 --- a/udelay.c +++ b/udelay.c @@ -220,8 +220,8 @@ /* Precise delay. */ void default_delay(unsigned int usecs) { - /* If the delay is >1 s, use internal_sleep because timing does not need to be so precise. */ - if (usecs > 1000000) { + /* If the delay is >0.1 s, use internal_sleep because timing does not need to be so precise. */ + if (usecs > 100000) { internal_sleep(usecs); } else if (use_clock_gettime) { clock_usec_delay(usecs); -- To view, visit https://review.coreboot.org/c/flashrom/+/80808?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ifd4821c66c5564f7c975c08769a6742f645e9be0 Gerrit-Change-Number: 80808 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-MessageType: newchange

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[XS] Change in flashrom[main]: [RFC] flashrom: Don't throw around "delay 1 second" so lightly
by Brian Norris (Code Review) 01 Mar '24

01 Mar '24

Brian Norris has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/80807?usp=email ) Change subject: [RFC] flashrom: Don't throw around "delay 1 second" so lightly ...................................................................... [RFC] flashrom: Don't throw around "delay 1 second" so lightly Waiting a full second is a very long time, especially when default_delay() chooses to busy-loop. This code has been around for a decade, with vague references to user reports: https://review.coreboot.org/plugins/gitiles/flashrom/+/8ab49e72af8465d4527d… Still, this logic does not belong in the the high-level library logic, used by all programmers and all chips. If there is a timing issue, it should either be encoded in the appropriate programmer or flashchip timing. Change-Id: Ie09651fede3f9f03425244c94a2da8bae00315fc Signed-off-by: Brian Norris <briannorris(a)chromium.org> --- M flashrom.c 1 file changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/07/80807/1 diff --git a/flashrom.c b/flashrom.c index 630c69d..f4f9e7f 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2330,9 +2330,6 @@ if (verify && !all_skipped) { msg_cinfo("Verifying flash... "); - /* Work around chips which need some time to calm down. */ - programmer_delay(flashctx, 1000*1000); - if (verify_all) combine_image_by_layout(flashctx, newcontents, oldcontents); ret = verify_by_layout(flashctx, verify_layout, curcontents, newcontents); -- To view, visit https://review.coreboot.org/c/flashrom/+/80807?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ie09651fede3f9f03425244c94a2da8bae00315fc Gerrit-Change-Number: 80807 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-MessageType: newchange

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flashrom-gerrit March 2024