March 2024 - flashrom-gerrit - mail.coreboot.org

[XS] Change in flashrom[main]: [RFC] flashrom: Don't throw around "delay 1 second" so lightly
by Nikolai Artemiev (Code Review) 06 Mar '24

06 Mar '24

Attention is currently required from: Brian Norris. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/80807?usp=email ) Change subject: [RFC] flashrom: Don't throw around "delay 1 second" so lightly ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: I fully support this change, chips shouldn't require a delay unless they're clearing the WIP/BUSY flag too early. If we find any aberrant chips that still require an extra delay, we can add a quirk flag for them. -- To view, visit https://review.coreboot.org/c/flashrom/+/80807?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ie09651fede3f9f03425244c94a2da8bae00315fc Gerrit-Change-Number: 80807 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Comment-Date: Wed, 06 Mar 2024 23:47:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: cli_classic: Defer flashrom_init calibration until after options parsing
by Nikolai Artemiev (Code Review) 06 Mar '24

06 Mar '24

Attention is currently required from: Anastasia Klimchuk, Brian Norris. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/80772?usp=email ) Change subject: cli_classic: Defer flashrom_init calibration until after options parsing ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/80772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I57949ab511df04c6922008fa8cb12467154e2c5e Gerrit-Change-Number: 80772 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 06 Mar 2024 23:39:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: linux_mtd: Provide no-op delay implementation
by Nikolai Artemiev (Code Review) 06 Mar '24

06 Mar '24

Attention is currently required from: Anastasia Klimchuk, Brian Norris. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/80771?usp=email ) Change subject: linux_mtd: Provide no-op delay implementation ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/80771?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3ac69d3fd7cfc689c5b32c130d044516ed846c29 Gerrit-Change-Number: 80771 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 06 Mar 2024 23:39:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: cli_classic: Defer flashrom_init calibration until after options parsing
by Hsuan-ting Chen (Code Review) 06 Mar '24

06 Mar '24

Attention is currently required from: Anastasia Klimchuk, Brian Norris. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/80772?usp=email ) Change subject: cli_classic: Defer flashrom_init calibration until after options parsing ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/80772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I57949ab511df04c6922008fa8cb12467154e2c5e Gerrit-Change-Number: 80772 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 06 Mar 2024 12:17:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: linux_mtd: Provide no-op delay implementation
by Hsuan-ting Chen (Code Review) 06 Mar '24

06 Mar '24

Attention is currently required from: Anastasia Klimchuk, Brian Norris, Nikolai Artemiev. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/80771?usp=email ) Change subject: linux_mtd: Provide no-op delay implementation ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/80771?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3ac69d3fd7cfc689c5b32c130d044516ed846c29 Gerrit-Change-Number: 80771 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 06 Mar 2024 06:46:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in flashrom[main]: flashchips: Add Macronix Flash EPN support
by DZ (Code Review) 06 Mar '24

06 Mar '24

DZ has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81096?usp=email ) Change subject: flashchips: Add Macronix Flash EPN support ...................................................................... flashchips: Add Macronix Flash EPN support We have tested read/write/erase and write protection function for following Macronix Flash. --MX25R2035F - MX25R4035F - MX25R8035F - MX25R1635F - MX25L1633E - MX25L1636E - MX25L3239E - MX25L3273F - MX25L12850F The Flash datasheet is available at: https://www.mxic.com.tw/en-us/support/design-support/Pages/technical-docume… Change-Id: Ia07032c1a3168bd595cea6b24e4875843e20190c Signed-off-by: DanielZhang <danielzhang(a)mxic.com.cn> --- M flashchips.c M include/flashchips.h 2 files changed, 356 insertions(+), 46 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/96/81096/1 diff --git a/flashchips.c b/flashchips.c index 204f34f..3fce4f8 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6198,7 +6198,7 @@ /* OTP: 1024B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* QPI enable 0x38, disable 0xFF */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, - .tested = TEST_OK_PR, + .tested = TEST_UNTESTED, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = { @@ -9005,15 +9005,15 @@ { .vendor = "Macronix", - .name = "MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F", + .name = "MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F/MX25L12850F", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L12805D, .total_size = 16384, .page_size = 256, /* OTP: MX25L12833F has 1KB total, others have 512B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_OK_PREW, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = @@ -9041,6 +9041,14 @@ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, }, { @@ -9228,15 +9236,15 @@ { .vendor = "Macronix", - .name = "MX25L1635E", + .name = "MX25L1635E/MX25L1636E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L1635E, .total_size = 2048, .page_size = 256, /* OTP: 64B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = @@ -9260,6 +9268,57 @@ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", + .name = "MX25L1633E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L1633E, + .total_size = 2048, + .page_size = 256, + /* OTP: 64B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP , + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + }, + + .decode_range = DECODE_RANGE_SPI25, }, { @@ -9466,6 +9525,101 @@ .decode_range = DECODE_RANGE_SPI25_BIT_CMP, }, + { + .vendor = "Macronix", + .name = "MX25L3273F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L3205, + .total_size = 4096, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", + .name = "MX25L3239E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L3239E, + .total_size = 4096, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR | FEATURE_SCUR , + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP}, + .wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */ + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + { .vendor = "Macronix", .name = "MX25L3235D", @@ -10050,45 +10204,6 @@ { .vendor = "Macronix", - .name = "MX25R1635F", - .bustype = BUS_SPI, - .manufacture_id = MACRONIX_ID, - .model_id = MACRONIX_MX25R1635F, - .total_size = 2048, - .page_size = 256, - /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_OK_PREW, - .probe = PROBE_SPI_RDID, - .probe_timing = TIMING_ZERO, - .block_erasers = - { - { - .eraseblocks = { {4 * 1024, 512} }, - .block_erase = SPI_BLOCK_ERASE_20, - }, { - .eraseblocks = { {32 * 1024, 64} }, - .block_erase = SPI_BLOCK_ERASE_52, - }, { - .eraseblocks = { {64 * 1024, 32} }, - .block_erase = SPI_BLOCK_ERASE_D8, - }, { - .eraseblocks = { {2 * 1024 * 1024, 1} }, - .block_erase = SPI_BLOCK_ERASE_60, - }, { - .eraseblocks = { {2 * 1024 * 1024, 1} }, - .block_erase = SPI_BLOCK_ERASE_C7, - } - }, - .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, - .write = SPI_CHIP_WRITE256, - .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ - .voltage = {1650, 3600}, - }, - - { - .vendor = "Macronix", .name = "MX25R3235F", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, @@ -10167,6 +10282,194 @@ { .vendor = "Macronix", + .name = "MX25R1635F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25R1635F, + .total_size = 2048, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", + .name = "MX25R8035F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25R8035F, + .total_size = 1024, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", + .name = "MX25R4035F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25R4035F, + .total_size = 512, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {1 * 512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {1 * 512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", + .name = "MX25R2035F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25R2035F, + .total_size = 256, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 8} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {1 * 256 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {1 * 256 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", .name = "MX25V4035F", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, @@ -10200,6 +10503,7 @@ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2300, 3600}, }, + { .vendor = "Macronix", .name = "MX25V8035F", diff --git a/include/flashchips.h b/include/flashchips.h index d0a858b..cc3996d 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -519,6 +519,7 @@ #define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E, MX25L12873F, MX25L12833F (32k 0x52) */ #define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */ #define MACRONIX_MX25L1635D 0x2415 +#define MACRONIX_MX25L1633E 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ #define MACRONIX_MX66L51235F 0x201a /* MX66L51235F, MX25L51245G */ #define MACRONIX_MX66L1G45G 0x201b /* MX66L1G45G */ @@ -534,12 +535,17 @@ #define MACRONIX_MX25U51245G 0x253a #define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ #define MACRONIX_MX25L6495F 0x9517 +#define MACRONIX_MX25L3239E 0x2536 #define MACRONIX_MX25L3255E 0x9e16 #define MACRONIX_MX77L25650F 0x7519 #define MACRONIX_MX25R1635F 0x2815 #define MACRONIX_MX25R3235F 0x2816 #define MACRONIX_MX25R6435F 0x2817 +#define MACRONIX_MX25R8035F 0x2814 +#define MACRONIX_MX25R4035F 0x2813 +#define MACRONIX_MX25R1635F 0x2815 +#define MACRONIX_MX25R2035F 0x2812 #define MACRONIX_MX29F001B 0x19 #define MACRONIX_MX29F001T 0x18 -- To view, visit https://review.coreboot.org/c/flashrom/+/81096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ia07032c1a3168bd595cea6b24e4875843e20190c Gerrit-Change-Number: 81096 Gerrit-PatchSet: 1 Gerrit-Owner: DZ Gerrit-MessageType: newchange

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[XS] Change in flashrom[main]: fmap: Update major/minor version check
by Paul Menzel (Code Review) 05 Mar '24

05 Mar '24

Attention is currently required from: Brian Norris, Hsuan-ting Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79060?usp=email ) Change subject: fmap: Update major/minor version check ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/79060/comment/b65e3555_1188d7ad : PS2, Line 7: Update > Except, it does more than that. There's only so much one can fit in a commit subject. No it would come quite close. ;-) -- To view, visit https://review.coreboot.org/c/flashrom/+/79060?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I984835579d3b257a2462906f1f5091b179891bd0 Gerrit-Change-Number: 79060 Gerrit-PatchSet: 3 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Comment-Date: Tue, 05 Mar 2024 12:15:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Brian Norris <briannorris(a)chromium.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in flashrom[main]: doc: Add doc how to support flashrom project
by Anastasia Klimchuk (Code Review) 05 Mar '24

05 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/80729?usp=email ) Change subject: doc: Add doc how to support flashrom project ...................................................................... doc: Add doc how to support flashrom project Change-Id: I59a4f5978bc8ffa8ca3a3dc3f15c770ef5fcedce Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/80729 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <patrick(a)coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> --- M doc/contact.rst M doc/contrib_howtos/index.rst M doc/dev_guide/development_guide.rst A doc/how_to_support_flashrom.rst M doc/index.rst 5 files changed, 177 insertions(+), 2 deletions(-) Approvals: Stefan Reinauer: Looks good to me, approved build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Peter Marheine: Looks good to me, approved diff --git a/doc/contact.rst b/doc/contact.rst index 57a9390..79cdb91 100644 --- a/doc/contact.rst +++ b/doc/contact.rst @@ -33,8 +33,10 @@ If your mail contains any BIOS images or F segment dumps (instead of links which are fine), the mail will be rejected for legal reasons (we do not have the right to distribute BIOS images). -Real time chats ---------------- +.. _real time channels: + +Real time channels +------------------ Flashrom has real time channels where you have the chance to talk to people being involved or interested in the project. Most of the discussion is about flashrom development, contributions, tech talk and user help. diff --git a/doc/contrib_howtos/index.rst b/doc/contrib_howtos/index.rst index b33482d..cb74e1c 100644 --- a/doc/contrib_howtos/index.rst +++ b/doc/contrib_howtos/index.rst @@ -8,3 +8,4 @@ how_to_mark_chip_tested how_to_add_unit_test ../how_to_add_docs + ../how_to_support_flashrom diff --git a/doc/dev_guide/development_guide.rst b/doc/dev_guide/development_guide.rst index 247a31a..0b64325 100644 --- a/doc/dev_guide/development_guide.rst +++ b/doc/dev_guide/development_guide.rst @@ -323,6 +323,8 @@ Note the search is not a replacement for Merge checklist, but it can help find candidates for merging. +.. _bugtracker: + Bugtracker ========== diff --git a/doc/how_to_support_flashrom.rst b/doc/how_to_support_flashrom.rst new file mode 100644 index 0000000..372ef38 --- /dev/null +++ b/doc/how_to_support_flashrom.rst @@ -0,0 +1,169 @@ +======================= +How to support flashrom +======================= + +Intro +========= + +This document is for people and companies who want to help flashrom, and it explains +various ways how to do this. + +There are lots of ways to help (as you can see below), whether you have little time or a lot, +whether you are a developer, a user or a company. +flashrom is a free open source software project, and all the contributions are publicly visible - +which means you get all the glory for your work, and you help the whole open source ecosystem. +Thank you! + +flashrom supports a huge variety of environments, platforms and hardware, and there is +no one person or one company on earth which has setup to test and maintain all of these +(and realistically, never will be). The only way we can maintain all of these, +is together as a community. + +To be aware of what's going on, subscribe to our :ref:`mailing list` and/or join our :ref:`real time channels`. + +Development +=========== + +Development, or in other words, sending patches to flashrom, is what probably comes to mind first +when you think about helping and contributing. And indeed, this is a great help, +and patches are always welcome. + +If your idea fits into one patch, you can just send it. If you have bigger plans in mind, +a large amount of work over a longer time frame, the best way is to start a topic on the mailing list. +This helps with planning, and also people in the community, whoever is interested, +will be able to support your effort. + +If you are new to flashrom development process, please start by reading :doc:`/dev_guide/development_guide`. +It's also useful to check `existing patches <https://review.coreboot.org/q/status:open+project:flashrom>`_ +for examples on how the dev process works. + +For some types of contributions we have more detailed guidelines, check the list :doc:`/contrib_howtos/index`. + +Code reviews +============ + +Did you know: code reviews are equally important as writing the code! + +For each patch, we need at least one reviewer, and often more than one. +Doing code reviews is highly appreciated and highly respected! +All reviewers' names are immortalised in git history together with authors names, +as "Reviewed-by" and "Signed-off-by" tags in a commit message (see `example <https://review.coreboot.org/c/flashrom/+/80729>`_). + +Code review involves carefully inspecting the patch in Gerrit, and adding comments if anything +is unclear/potential errors/issues/something missing etc. If you think the patch is ready, +you can vote on the patch. Every Gerrit user with a registered account can add comments to patches +and vote +1/-1. Note that if you vote -1, you need to add a comment explaining why you gave a negative vote, +and what specific big issues that you see with the patch. Negative vote is a stronger opinion, +and in most cases just adding comments is enough. + +The group of people who can fully approve the patch (i.e. vote +2, see :doc:`/about_flashrom/team`) +is limited, however every Gerrit user can do code reviews. This increases overall confidence +in the reviewed patch. Approving the patch is much easier when the code reviews are done well. + +You can check pending patches under review `in Gerrit <https://review.coreboot.org/q/status:open+project:flashrom>`_ +and help with code review if a patch looks useful, you understand what it is about, and want to have it submitted. + +Building and testing +==================== + +Given the large variety of environments and hardware that flashrom supports, +the question of building and testing flashrom is always relevant. +Try to build flashrom at head on your environment and if it doesn't build, +send a patch to fix (see :doc:`/dev_guide/development_guide`) or file a ticket in :ref:`bugtracker` +with as many details as possible. + +A special case of this is, the time when flashrom team is preparing the release. +The release candidate tag is announced on the mailing list, and it is a great help to try and build and test +a release candidate in whatever your environment is. Both positive and negative results are important, +and you are welcome to share the results, just don't forget to include environment details. +In case of issues, as always: patches are very very welcome. + +Documentation +============= + +You don't have to be a flashrom developer to add, update or review documentation. In fact, +lots of users' docs can greatly benefit from reviews by the users, who are supposed to read and use the docs. +Doc how to update the docs is here: :doc:`/how_to_add_docs` + +As for specific ideas: + +#. If there is an announcement on the mailing list about new doc under review, + have a look and you can join the review + +#. Help migrate information from `old website <https://wiki.flashrom.org/>`_ to `new website <https://www.flashrom.org/>`_. + The rule is, all useful docs need to be migrated but they should be reviewed. Concrete example, + there are docs for programmers, written a while ago. If you are using the programmer regularly + you can review the existing doc and help update it (if needed) and then the updated doc will + go to the new website. + +#. New documentation welcome. + +Mailing list +============ + +If you are not subscribed: please subscribe (see :ref:`mailing list`) so you can see what's going on. + +Oftentimes, mailing list has questions from flashrom users. If it so happens +that you maybe know what they are asking, or have ideas about it - you are welcome to respond! +This will be very helpful. + +Similarly, if there is a development discussion that makes sense to you and is relevant: please join the discussion. + +Mailing list is archived, and archives are public and searchable. Which means, +when you respond to the post you not only help that one person who is asking, +but you also help one hundred people in future, who have the same question and can search the answer on the list archives. + +Joining the team +================ + +If you have experience of flashrom development, good knowledge of some of the areas of flashrom code, +some time and motivation, you can consider joining the team, more info here (:doc:`/about_flashrom/team`). +Unlike the previous ideas, this means some *regular* time commitment (the amount of time +can be small or large, but it is regular). + +If you are not at this stage yet, but are considering this as a potential goal for the future, +check the :doc:`/about_flashrom/team` page for what it means. + +Special appeal for companies +============================ + +There are lots of companies that have their own forks of flashrom, and it would be a great help +if you could contribute back to the upstream project! + +Try to keep your fork as close as possible to upstream, do not diverge without a strong reason. +This makes it easier for you to downstream patches, and also makes it easier to contribute patches +from your fork upstream. As an end result, you will be exchanging code and knowledge with a large ecosystem +rather than hiding in your own corner. Working together we can achieve a higher quality bar, +which is better for the upstream project, and better for your fork. + +Consider the following ideas: + +#. Send upstream the bug fixes you found + +#. Add unit tests for the areas you are using actively + +#. Add new features or add support for new platforms/hardware, especially if you have that in your lab + and can reliably test and maintain + +#. Help with releases: if you have an automated test suite, run it on release candidates. + Build and test flashrom for the devices you have in the lab. + +#. If possible, allocate an engineer(s) to contribute to upstream project (and all their work + you can downstream straight away). Upstream early, upstream often: anything you can upstream sooner + will make your life easier in the future. + +#. Have someone subscribed to the mailing list and respond when the topic is relevant to you, + and you have a knowledge of questions or ideas how to help. + +#. On a long term, consider joining the :doc:`/about_flashrom/team`, pick something to maintain: + for example a programmer you are using often + +Outro +======== + +If you read all of the above and still unsure what to do, but actually want to help, +please don't be afraid to ask flashrom project lead directly (Anastasia Klimchuk, +and you can find email in `Gerrit <https://review.coreboot.org/c/flashrom/+/80729>`_ +or tag aklm on Discord (see :ref:`real time channels`). + +**Every bit of help matters and you can help make flashrom a better place. Thank you!** diff --git a/doc/index.rst b/doc/index.rst index 2fdf778..60c42b0 100644 --- a/doc/index.rst +++ b/doc/index.rst @@ -16,6 +16,7 @@ contact release_notes/index about_flashrom/index + how_to_support_flashrom how_to_add_docs documentation_license Old wiki website <https://wiki.flashrom.org/> -- To view, visit https://review.coreboot.org/c/flashrom/+/80729?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I59a4f5978bc8ffa8ca3a3dc3f15c770ef5fcedce Gerrit-Change-Number: 80729 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in flashrom[main]: fmap: Update major/minor version check
by Anastasia Klimchuk (Code Review) 05 Mar '24

05 Mar '24

Attention is currently required from: Brian Norris, Hsuan-ting Chen. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79060?usp=email ) Change subject: fmap: Update major/minor version check ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/79060?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I984835579d3b257a2462906f1f5091b179891bd0 Gerrit-Change-Number: 79060 Gerrit-PatchSet: 3 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Brian Norris <briannorris(a)chromium.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Comment-Date: Tue, 05 Mar 2024 11:21:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: fmap: Update major/minor version check
by Brian Norris (Code Review) 04 Mar '24

04 Mar '24

Attention is currently required from: Anastasia Klimchuk, Hsuan-ting Chen. Brian Norris has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79060?usp=email ) Change subject: fmap: Update major/minor version check ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/79060/comment/c19a799b_0e636e17 : PS2, Line 9: It's not valid to separately check the major and minor versions. The : proper minor check would be something like: : : if (fmap->ver_major == FMAP_VER_MAJOR && : fmap->ver_minor > FMAP_VER_MINOR) > Brian, thank you so much for lots of details and links, this is really cool! 👍 > However, I found one gem in cbfstool code , which is a comment for the `is_valid_fmap` function, > > /* Make a best-effort assessment if the given fmap is real */ > > If you could add this comment to the functions, that would be it! Thank you! Done. Thanks for looking! -- To view, visit https://review.coreboot.org/c/flashrom/+/79060?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I984835579d3b257a2462906f1f5091b179891bd0 Gerrit-Change-Number: 79060 Gerrit-PatchSet: 3 Gerrit-Owner: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 04 Mar 2024 23:04:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Brian Norris <briannorris(a)chromium.org> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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