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Change subject: ich: Add names for region 5, 9, 10, 11, 12, 13, 15
......................................................................
Patch Set 1:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/81356/comment/5c1681e1_94d906a1 :
PS1, Line 521: msg_pdbg2(" FD BIOS ME GbE Pltf DE BIOS2 Reg7 EC DE2 ");
> Yes, we used to pad names to 4 characters (lines 534 and 538). […]
Before: (width=84)
```
--- Details ---
FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9 RegA RegB RegC RegD RegE RegF
BIOS r rw r r
ME r rw
```
After: (width=115)
```
--- Details ---
FD BIOS ME GbE Pltf DE BIOS2 Reg7 EC DE2 IE 10GbE0 10GbE1 RegD RegE PTT
BIOS r rw r r
ME r rw
```
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Change subject: flashchips: Add support for MXIC MX25L12850F
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Yes right, the difference is in configuration register which changes the way `. […]
I haven't noticed the configuration register ahah. Thanks for pointing that out, then it's fine!
P.S. I feel the same, thank you :)
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Change subject: ich: Add names for region 5, 9, 10, 11, 12, 13, 15
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/81356/comment/64e08be4_fc4f7d5c :
PS1, Line 12: * Incorporate missing region names from https://github.com/coreboot/coreboot/blob/main/util/ifdtool/ifdtool.c for completeness.
> Thank you for syncing region names in two places! I am curious, is there any official doc from Intel […]
I believe there should be a document with its name like 'MTL SPI Programming Guide,' but I don't think it's publicly accessible. (I'm afraid I can't share anything since I don't have access myself.)
Perhaps Subrata could share some knowledge about where are those region names?
Patchset:
PS1:
Hi Subrata:
Could you share if there's any basic knowledge about how Intel introduce those region names?
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/81356/comment/e0df6408_081eda1f :
PS1, Line 521: msg_pdbg2(" FD BIOS ME GbE Pltf DE BIOS2 Reg7 EC DE2 ");
> For this line (and diffs below in this file) you have changed the number of spaces between names? So […]
Yes, we used to pad names to 4 characters (lines 534 and 538). However, some newer names like '10GbE0' are too long.
To accommodate this, I now pad all names to 6 characters (with center alignment).
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Change subject: Add support for Idaville HCC platform and iRC regions
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Hi Angel
Can you help review this?
Thanks
Kevin Yu
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Change subject: doc/dev_guide: Add section about Jenkins build, and scan-build
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Patch Set 2: Code-Review+2
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Change subject: doc/dev_guide: Add section about Jenkins build, and scan-build
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Change subject: serprog: Add SPI Mode and CS Mode commands
......................................................................
Patch Set 1: Code-Review+2
(2 comments)
Patchset:
PS1:
Urja, good day, I thought maybe you are still around and have some interest to review the update to serprog protocol? Thank you!
PS1:
Thank you for detailed explanation, I think I understand now.
> What do you mean with add implementation to upstream serprog?
I was wondering, but you answered just above these words:
> so far I only add the commands to the documentation/the spec but do not implement them in flashrom.
I wasn't looking into details, but I just quickly looked into the code of avrgirl serprog-programmer and noticed that S_SPI_MODE and S_CS_MODE are handled there, this is where my question came from.
I agree supporting dual or quad SPI is a good idea.
But I think this patch can go ahead, doesn't have to wait.
> Yes sure I am up for reviewing changes to the serprog documentation.
Great. I really appreciate it!
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Change subject: serprog: Add SPI Mode and CS Mode commands
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Nice to meet you, and thank you for the patch! […]
Heyy nice to meet you too.
Sorry that you missed the discussion on IRC. I didn't know about the Discord and that the main discussions are there now.
1
Yess so far I only add the commands to the documentation/the spec but do not implement them in flashrom. This is because as I understand flashrom is targeted at reading/writing flash chips and the current commands suffice for that. But we could add additional SPI modes to the 0x17 SPI mode command which could be useful for the current flashrom implementation. For example we could allow programmers to support dual or quad SPI which could speed up read/writes on supported chips and programmers. I hope that makes some things more clear. What do you mean with add implementation to upstream serprog? Are you talking about adding support for flashing AVR microcontrollers to flashrom? I so far considered this out of scope for the project as it would require some bigger changes like also implementing the AVR ISP protocol.
2
It would be cool to have some group to coordinate the serprog protocol spec across projects using it but as I know there is no central authority or working group for the serprog protocol so far. This is why I would consider flashrom and its fork flashprog the authority over the serprog spec (serprog-protocol.txt) as the protocol evolved there. The numbers 0x17 and 0x18 where chosen because they are the lowest unassigned ones and I tought it would be nice to have no gaps in the specified commands. But we could choose them arbitarily from the unassigned range.
3
Yes sure I am up for reviewing changes to the serprog documentation.
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Change subject: serprog: Add SPI Mode and CS Mode commands
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Nice to meet you, and thank you for the patch!
Sorry I missed your discussion in IRC (I have relocated to flashrom Discord channel some time ago) but in any case you did the right thing to send the patch! I have a few questions, sorry again if that's something you have discussed on IRC earlier, but I think it's good to have relevant info here on the patch.
1
You are adding the new commands to the documentation, but not to implementation? I understand that it is implemented in the forks you linked. Do you have any plans to add implementation to upstream serprog? That would be so cool!
2
Who decides on the serprog spec, is there a spec somewhere? Basically I want to understand why it's 0x17 and 0x18 and not something else. Can any other number be fine if it's implemented, or is it documented somewhere?
3
Lastly, the question which goes further than this patch!
flashrom is currently in the process of reviewing/updating documentation and converting it to a new format. There are a few serprog docs, and I am asking people who have knowledge of it, to help review the docs. I will do the boring part of converting to a new format and creating the patch, would you agree to be one of the reviewers for the content?
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