March 2024 - flashrom-gerrit - mail.coreboot.org

[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake
by Hsuan-ting Chen (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Subrata Banik. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81357?usp=email ) Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ...................................................................... Patch Set 4: (1 comment) File ichspi.c: https://review.coreboot.org/c/flashrom/+/81357/comment/294c928b_838f957a : PS1, Line 1848: case CHIPSET_METEOR_LAKE: > > It was your previous CL that put MTL in that position […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/81357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Gerrit-Change-Number: 81357 Gerrit-PatchSet: 4 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 26 Mar 2024 09:54:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-MessageType: comment

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[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake
by Hsuan-ting Chen (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Hsuan-ting Chen. Hello Hsuan Ting Chen, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/81357?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ...................................................................... ichspi.c: Add support for region 9 and beyond in Meteor Lake Since Meteor Lake, configuring region access for FREG9 and higher is necessary. This configuration is determined using BIOS_BM registers: BIOS_BM_RAP (Offset 0x118): BIOS Master Read Access Permissions. Each bit [15:0] corresponds to a region [15:0]. A set bit grants BIOS master read access. BIOS_BM_WAP (Offset 0x11c): BIOS Master Write Access Permissions. Each bit [15:0] corresponds to a region [15:0]. A set bit grants BIOS master write/erase access. Move CHIPSET_METEOR_LAKE to the bottom of the ich_chipset list to ensure that all the newer chipsets in the future will use BIOS_BM check by default. BUG=b:319773700, b:304439294 BUG=b:319336080 TEST=On MTL, use flashrom -VV to see correct FREG9 access TEST=On ADL, use flashrom -VV to see not break anything Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Signed-off-by: roccochen(a)chromium.com <roccochen(a)chromium.org> --- M ichspi.c M include/programmer.h 2 files changed, 62 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/81357/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/81357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Gerrit-Change-Number: 81357 Gerrit-PatchSet: 4 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[main]: ichspi.c: Add support for region 9 and beyond in Meteor Lake
by Hsuan-ting Chen (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Hsuan Ting Chen, Hsuan-ting Chen. Hello Hsuan Ting Chen, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/81357?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake ...................................................................... ichspi.c: Add support for region 9 and beyond in Meteor Lake Since Meteor Lake, configuring region access for FREG9 and higher is necessary. This configuration is determined using BIOS_BM registers: BIOS_BM_RAP (Offset 0x118): BIOS Master Read Access Permissions. Each bit [15:0] corresponds to a region [15:0]. A set bit grants BIOS master read access. BIOS_BM_WAP (Offset 0x11c): BIOS Master Write Access Permissions. Each bit [15:0] corresponds to a region [15:0]. A set bit grants BIOS master write/erase access. Move CHIPSET_METEOR_LAKE to the bottom of the ich_chipset list to ensure that all the newer chipsets in the future will use BIOS_BM check by default. BUG=b:319773700, b:304439294 BUG=b:319336080 TEST=On MTL, use flashrom -VV to see correct FREG9 access TEST=On ADL, use flashrom -VV to see not break anything Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Signed-off-by: roccochen(a)chromium.com <roccochen(a)chromium.org> --- M ichspi.c M include/programmer.h 2 files changed, 63 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/81357/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/81357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9 Gerrit-Change-Number: 81357 Gerrit-PatchSet: 3 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[main]: ich: Add names for region 5, 9, 10, 11, 12, 13, 15
by Hsuan-ting Chen (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Stefan Reinauer. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81356?usp=email ) Change subject: ich: Add names for region 5, 9, 10, 11, 12, 13, 15 ...................................................................... Patch Set 1: (1 comment) File ich_descriptors.c: https://review.coreboot.org/c/flashrom/+/81356/comment/5c1681e1_94d906a1 : PS1, Line 521: msg_pdbg2(" FD BIOS ME GbE Pltf DE BIOS2 Reg7 EC DE2 "); > Yes, we used to pad names to 4 characters (lines 534 and 538). […] Before: (width=84) ``` --- Details --- FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9 RegA RegB RegC RegD RegE RegF BIOS r rw r r ME r rw ``` After: (width=115) ``` --- Details --- FD BIOS ME GbE Pltf DE BIOS2 Reg7 EC DE2 IE 10GbE0 10GbE1 RegD RegE PTT BIOS r rw r r ME r rw ``` -- To view, visit https://review.coreboot.org/c/flashrom/+/81356?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3b164ce4ae84bfd523fcd8be416c5d13183ed632 Gerrit-Change-Number: 81356 Gerrit-PatchSet: 1 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Tue, 26 Mar 2024 06:58:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hsuan-ting Chen <roccochen(a)google.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[main]: flashchips: Add Zetta Device ZD25LQ128
by Anastasia Klimchuk (Code Review) 26 Mar '24

26 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/81392?usp=email ) Change subject: flashchips: Add Zetta Device ZD25LQ128 ...................................................................... flashchips: Add Zetta Device ZD25LQ128 Datasheet: http://www.zettadevice.com/uploads/files/163410630201e3483211247ac1.pdf Tested probe, read, erase, write, verify on ZD25LQ128AWIG chips using Linux SPI and DediProg SF100 programmers. Renamed ZETTADEVICE_ macros to ZETTA_ to accomodate longer suffixes. Change-Id: I5cb20158e81ab109f16958285b8787858efb4831 Signed-off-by: Anton Samsonov <devel(a)zxlab.ru> Reviewed-on: https://review.coreboot.org/c/flashrom/+/81392 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M flashchips.c M include/flashchips.h 2 files changed, 46 insertions(+), 7 deletions(-) Approvals: Anastasia Klimchuk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/flashchips.c b/flashchips.c index 204f34f..74953d1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -21593,8 +21593,8 @@ .vendor = "Zetta Device", .name = "ZD25D20", .bustype = BUS_SPI, - .manufacture_id = ZETTADEVICE_ID, - .model_id = ZETTADEVICE_ZD25D20, + .manufacture_id = ZETTA_ID, + .model_id = ZETTA_ZD25D20, .total_size = 256, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, @@ -21631,8 +21631,8 @@ .vendor = "Zetta Device", .name = "ZD25D40", .bustype = BUS_SPI, - .manufacture_id = ZETTADEVICE_ID, - .model_id = ZETTADEVICE_ZD25D40, + .manufacture_id = ZETTA_ID, + .model_id = ZETTA_ZD25D40, .total_size = 512, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, @@ -21666,6 +21666,44 @@ }, { + .vendor = "Zetta Device", + .name = "ZD25LQ128", + .bustype = BUS_SPI, + .manufacture_id = ZETTA_ID, + .model_id = ZETTA_ZD25LQ128_REMS, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = PROBE_SPI_REMS, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ + .unlock = SPI_DISABLE_BLOCKPROTECT, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {1650, 1950}, + }, + + { .vendor = "Unknown", .name = "SFDP-capable chip", .bustype = BUS_SPI, diff --git a/include/flashchips.h b/include/flashchips.h index d0a858b..932e458 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -1055,8 +1055,9 @@ #define XTX_XT25F02E 0x4012 #define XTX_XT25F64B 0x4017 -#define ZETTADEVICE_ID 0xBA /* Zetta Device */ -#define ZETTADEVICE_ZD25D20 0x2012 -#define ZETTADEVICE_ZD25D40 0x2013 +#define ZETTA_ID 0xBA /* Zetta Device */ +#define ZETTA_ZD25D20 0x2012 +#define ZETTA_ZD25D40 0x2013 +#define ZETTA_ZD25LQ128_REMS 0x17 /* RDID = 0x4218 */ #endif /* !FLASHCHIPS_H */ -- To view, visit https://review.coreboot.org/c/flashrom/+/81392?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I5cb20158e81ab109f16958285b8787858efb4831 Gerrit-Change-Number: 81392 Gerrit-PatchSet: 2 Gerrit-Owner: Anton Samsonov <devel(a)zxlab.ru> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L12850F
by Alexander Goncharov (Code Review) 25 Mar '24

25 Mar '24

Attention is currently required from: DZ. Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81350?usp=email ) Change subject: flashchips: Add support for MXIC MX25L12850F ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Yes right, the difference is in configuration register which changes the way `. […] I haven't noticed the configuration register ahah. Thanks for pointing that out, then it's fine! P.S. I feel the same, thank you :) -- To view, visit https://review.coreboot.org/c/flashrom/+/81350?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I71ac70d273904f94d015401f9d8df587084efad0 Gerrit-Change-Number: 81350 Gerrit-PatchSet: 1 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: DZ <danielzhang(a)mxic.com.cn> Gerrit-Comment-Date: Mon, 25 Mar 2024 10:39:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: DZ <danielzhang(a)mxic.com.cn> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Alexander Goncharov <chat(a)joursoir.net> Gerrit-MessageType: comment

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[S] Change in flashrom[main]: ich: Add names for region 5, 9, 10, 11, 12, 13, 15
by Hsuan-ting Chen (Code Review) 25 Mar '24

25 Mar '24

Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Stefan Reinauer. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81356?usp=email ) Change subject: ich: Add names for region 5, 9, 10, 11, 12, 13, 15 ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/81356/comment/64e08be4_fc4f7d5c : PS1, Line 12: * Incorporate missing region names from https://github.com/coreboot/coreboot/blob/main/util/ifdtool/ifdtool.c for completeness. > Thank you for syncing region names in two places! I am curious, is there any official doc from Intel […] I believe there should be a document with its name like 'MTL SPI Programming Guide,' but I don't think it's publicly accessible. (I'm afraid I can't share anything since I don't have access myself.) Perhaps Subrata could share some knowledge about where are those region names? Patchset: PS1: Hi Subrata: Could you share if there's any basic knowledge about how Intel introduce those region names? File ich_descriptors.c: https://review.coreboot.org/c/flashrom/+/81356/comment/e0df6408_081eda1f : PS1, Line 521: msg_pdbg2(" FD BIOS ME GbE Pltf DE BIOS2 Reg7 EC DE2 "); > For this line (and diffs below in this file) you have changed the number of spaces between names? So […] Yes, we used to pad names to 4 characters (lines 534 and 538). However, some newer names like '10GbE0' are too long. To accommodate this, I now pad all names to 6 characters (with center alignment). -- To view, visit https://review.coreboot.org/c/flashrom/+/81356?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3b164ce4ae84bfd523fcd8be416c5d13183ed632 Gerrit-Change-Number: 81356 Gerrit-PatchSet: 1 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 25 Mar 2024 03:04:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[main]: Add support for Idaville HCC platform and iRC regions
by Kevin Yu (Code Review) 25 Mar '24

25 Mar '24

Attention is currently required from: Angel Pons, Paul Menzel. Kevin Yu has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81327?usp=email ) Change subject: Add support for Idaville HCC platform and iRC regions ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Hi Angel Can you help review this? Thanks Kevin Yu -- To view, visit https://review.coreboot.org/c/flashrom/+/81327?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I39e7fa56b1b1de429f413ce32e69c8d8c769b6a9 Gerrit-Change-Number: 81327 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Yu <ykevin(a)celestica.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 25 Mar 2024 01:40:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in flashrom[main]: doc/dev_guide: Add section about Jenkins build, and scan-build
by Peter Marheine (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Anastasia Klimchuk, Thomas Heijligen. Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81261?usp=email ) Change subject: doc/dev_guide: Add section about Jenkins build, and scan-build ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/81261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I416b632c55d1ceb925456ac8c8947dfbcef2e888 Gerrit-Change-Number: 81261 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Sun, 24 Mar 2024 22:26:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[main]: doc/dev_guide: Add section about Jenkins build, and scan-build
by Stefan Reinauer (Code Review) 24 Mar '24

24 Mar '24

Attention is currently required from: Anastasia Klimchuk, Peter Marheine, Thomas Heijligen. Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81261?usp=email ) Change subject: doc/dev_guide: Add section about Jenkins build, and scan-build ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/81261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I416b632c55d1ceb925456ac8c8947dfbcef2e888 Gerrit-Change-Number: 81261 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Sun, 24 Mar 2024 14:42:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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